CN105786071B - A kind of low-dropout linear voltage-regulating circuit and low pressure difference linearity stable-pressure device - Google Patents
A kind of low-dropout linear voltage-regulating circuit and low pressure difference linearity stable-pressure device Download PDFInfo
- Publication number
- CN105786071B CN105786071B CN201410837237.5A CN201410837237A CN105786071B CN 105786071 B CN105786071 B CN 105786071B CN 201410837237 A CN201410837237 A CN 201410837237A CN 105786071 B CN105786071 B CN 105786071B
- Authority
- CN
- China
- Prior art keywords
- transistor
- pressure difference
- low pressure
- low
- difference linearity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The invention discloses a kind of low-dropout linear voltage-regulating circuits and low pressure difference linearity stable-pressure device, the low-dropout linear voltage-regulating circuit includes low pressure difference linearity voltage regulation unit and zero-regulator resistor unit, wherein, the operating voltage that the first input end of low pressure difference linearity voltage regulation unit inputs for reception, for second input terminal for receiving the reference voltage of input, output terminal output is used for the load current of loaded work piece；The input terminal of zero-regulator resistor unit is connected with the output terminal of low pressure difference linearity voltage regulation unit, the input terminal of zero-regulator resistor is used to sample the load current, according to the resistance value of the adaptive adjustment equivalent resistance of the load current sampled, and the resistance value of equivalent resistance is fed back to the feedback input end of low pressure difference linearity voltage regulation unit, so that low pressure difference linearity voltage regulation unit adjusts the poles and zeros assignment of low-dropout linear voltage-regulating circuit according to the equivalent resistance resistance value of feedback.The present invention need not consider the length and width of PCB trace so that the stable voltage of low-dropout linear voltage-regulating circuit output.
Description
Technical field
The present invention relates to field of power management, and in particular to a kind of low-dropout linear voltage-regulating circuit and low pressure difference linearity voltage stabilizing
Device.
Background technology
With the high speed development of science and technology, power supply has become the heart of electronic equipment, and power management techniques also develop
For technology essential in electronic system, wherein, low pressure difference linear voltage regulator (Low Dropout Regulator, referred to as
LDO) since power consumption is relatively low, it is widely used in DC-DC power source managing chip.
For LDO chips, high current and the trend that stability is industry development, but with the increasing of output current
Greatly, the length and width of the printed circuit around LDO chips (Printed Circuit Board, abbreviation PCB) cabling is to LDO
Stability have a great impact.Table 1 is dead resistance R and parasitic inductance L of the PCB lines under frequency 100KHz-10MHz
Parameter value, as shown in Figure 1, in table 1 parameter respectively include PCB wire lengths (Length/mm), link width (Width/mm),
Square number (SquareNumber/), dead resistance resistance value (R/m Ω), parasitic inductance resistance value (L/nH), the parasitism electricity per square
Hinder resistance value (m Ω/) and the parasitic inductance resistance value (nH/) per square.
As can be drawn from Table 1, there is linear between square inductance resistance value (L/) and square resistance resistance value (R/)
Relational expression, i.e. square inductance resistance value minimum value (L/) min=9.3*1012R/ or square inductance resistance value maximum value (L/)
Max=15*1012R/□.From table 1 it follows that the magnitude of the dead resistance of PCB trace is in Ω ranks, the parasitism of PCB trace
The magnitude of inductance is located at several in the medium-high frequency zero pole point that nH ranks, the dead resistance of Ω ranks and the parasitic inductance of nH ranks introduce
Ten MHz or so, the strong influence bandwidth of LDO, the severe exacerbation stability of LDO so that oscillation is presented in LDO outputs, because
This, existing LDO is in design, it is necessary to which the length and width of stringent control PCB trace avoids the parasitism electricity due to PCB trace
Resistance and parasitic inductance influence the stability of LDO.
Invention content
The object of the present invention is to provide a kind of low-dropout linear voltage-regulating circuits and low pressure difference linearity stable-pressure device, low to optimize
The design of pressure difference linear voltage-stabilizing circuit, without considering the length and width of PCB trace around low-dropout linear voltage-regulating circuit, so as to
Improve the stability of low-dropout linear voltage-regulating circuit.
It is steady including low pressure difference linearity in a first aspect, an embodiment of the present invention provides a kind of low-dropout linear voltage-regulating circuit
Unit and zero-regulator resistor unit are pressed, wherein,
The first input end of the low pressure difference linearity voltage regulation unit is for the operating voltage of reception input, the low voltage difference line
Property voltage regulation unit the second input terminal for receiving the reference voltage of input, the output terminal of the low pressure difference linearity voltage regulation unit is defeated
Go out the load current for loaded work piece；
The input terminal of the zero-regulator resistor unit is connected with the output terminal of the low pressure difference linearity voltage regulation unit, the zeroing
The input terminal of resistance is for sampling the load current, according to the adaptive adjustment equivalent resistance of the load current sampled
Resistance value, and the resistance value of the equivalent resistance is fed back to the feedback input end of the low pressure difference linearity voltage regulation unit, so that institute
State low pressure difference linearity voltage regulation unit adjusts the low-dropout linear voltage-regulating circuit according to the equivalent resistance resistance value of the feedback zero
Pole distribution.
Further, the low pressure difference linearity voltage regulation unit includes the first transport and placing device, the first transistor, first resistor and the
Two resistance, wherein,
The first input end of first transport and placing device is used for as the second input terminal of the low pressure difference linearity voltage regulation unit
Receive the reference voltage of input, the second input terminal of first transport and placing device respectively with the second end of the first resistor and with
The first end of the second resistance is connected, and the third input terminal and the 4th input terminal of first transport and placing device are used for as described low
The feedback input end of pressure difference linear voltage stabilization unit, the output terminal of first transport and placing device and the first end phase of the first transistor
Even；
The second end of the first transistor is connected with the first input end of the low pressure difference linearity voltage regulation unit, and described
The third end of one transistor is connected with the first end of the first resistor, the third end of the first transistor and the described first electricity
Output terminal of the midpoint of the first end line of resistance as the low pressure difference linearity voltage regulation unit；
The second end of the second resistance is connected to the ground.
Further, the first transistor is PMOS tube, and the first end of the first transistor is the grid of PMOS tube,
The second end of the first transistor is the source electrode of PMOS tube, and the third end of the first transistor is the drain electrode of PMOS tube；Or
Person
The first transistor is PNP type triode, and the first end of the first transistor is the base of PNP type triode
Pole, the second end of the first transistor are the emitter of PNP type triode, and the third end of the first transistor is NPN type
The collector of triode.
Further, the zero-regulator resistor unit includes current source, current mirror, the second transport and placing device, second transistor and the
Three transistors, wherein,
The input terminal of the current source is connected with the output terminal of the low pressure difference linearity voltage regulation unit, the current source it is defeated
Outlet is connected with the input terminal of the current mirror；
The output terminal of the current mirror respectively with the second input terminal of second transport and placing device and with second crystal
The second end of pipe is connected；
The first end of the second transistor respectively with the output terminal of second transport and placing device and with the third crystal
The first end of pipe is connected, and the third end of the second transistor is connected with the first end of the second transistor；
The second end of the third transistor is respectively with the first input end of second transport and placing device and with described first
The third input terminal of transport and placing device is connected, the third end of the third transistor and the 4th input terminal phase of first transport and placing device
Even.
Further, the current mirror includes the 4th transistor and the 5th transistor, wherein,
The first end of 4th transistor respectively with the output terminal of the current source and with the 5th transistor
First end is connected, and the second end of the 4th transistor is connected to the ground, third end and the current source of the 4th transistor
Output terminal be connected；
The second end of 5th transistor as the current mirror output terminal respectively with second transport and placing device
Two input terminals and it is connected with the second end of the second transistor, the third end of the 5th transistor is connected to the ground.
Further, the second transistor is NMOS tube, and the first end of the second transistor is the grid of NMOS tube,
The second end of the second transistor is the source electrode of NMOS tube, and the third end of the second transistor is the drain electrode of NMOS tube；Or
Person
The second transistor is NPN type triode, and the first end of the second transistor is the base of NPN type triode
Pole, the second end of the second transistor are the emitter of NPN type triode, and the third end of the second transistor is NPN type
The collector of triode.
Further, the 4th transistor is NMOS tube, and the 5th transistor is NMOS tube, wherein,
The first end of 4th transistor is the grid of NMOS tube, and the second end of the 4th transistor is NMOS tube
Source electrode, the third end of the 4th transistor are the drain electrode of NMOS tube, and the first end of the 5th transistor is the grid of NMOS tube
Pole, the second end of the 5th transistor are the source electrode of NMOS tube, and the third end of the 5th transistor is the drain electrode of NMOS tube；
Or
4th transistor is NPN type triode, and the 5th transistor is NPN type triode, wherein,
The first end of 4th transistor is the base stage of NPN type triode, and the second end of the 4th transistor is NPN
The emitter of type triode, the third end of the 4th transistor are the collector of NPN type triode, the 5th transistor
First end is the base stage of NPN type triode, and the second end of the 5th transistor is the emitter of NPN type triode, described the
The third end of five transistors is the collector of NPN type triode.
Further, the ratio of the breadth length ratio of the breadth length ratio and the 5th transistor of the 4th transistor is N：1,
In, N is positive integer.
Second aspect, an embodiment of the present invention provides a kind of low pressure difference linearity stable-pressure device, the low pressure difference linearity voltage stabilizing
Device includes the low-dropout linear voltage-regulating circuit described in first aspect.
Low-dropout linear voltage-regulating circuit and low pressure difference linearity stable-pressure device provided in an embodiment of the present invention, passes through zero-regulator resistor
Unit samples load current, in entirely load variation range, according to the adaptive adjustment of the load current sampled
The resistance value of equivalent resistance, and the resistance value of the equivalent resistance is fed back into low pressure difference linearity voltage regulation unit, the linear voltage stabilization list
Member adjusts the poles and zeros assignment of low-dropout linear voltage-regulating circuit according to the equivalent resistance of feedback, without considering low pressure difference linearity
The length and width of PCB trace around regulator circuit so that the stable voltage of low-dropout linear voltage-regulating circuit output.
Description of the drawings
Exemplary embodiments of the present invention will be described in detail referring to the drawings by general below, makes those of ordinary skill in the art
The above-mentioned and other feature and advantage of the present invention are become apparent from, in attached drawing：
Fig. 1 is the structure chart for the low-dropout linear voltage-regulating circuit that the embodiment of the present invention one provides；
Fig. 2 is the amplitude versus frequency characte schematic diagram of low-dropout linear voltage-regulating circuit provided in an embodiment of the present invention at light load；
Fig. 3 is the amplitude versus frequency characte schematic diagram of low-dropout linear voltage-regulating circuit full load provided in an embodiment of the present invention；
Fig. 4 is the amplitude versus frequency characte schematic diagram of low-dropout linear voltage-regulating circuit full load provided in an embodiment of the present invention；
Fig. 5 is the amplitude versus frequency characte schematic diagram of low-dropout linear voltage-regulating circuit full load provided in an embodiment of the present invention；
Fig. 6 is the structure chart of low-dropout linear voltage-regulating circuit provided by Embodiment 2 of the present invention.
Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention rather than limitation of the invention.It also should be noted that in order to just
Part related to the present invention rather than full content, and same or similar mark in attached drawing are illustrated only in description, attached drawing
Number represent same or similar element or the element with same or like function.
Embodiment one
Fig. 1 is the structure chart for the low-dropout linear voltage-regulating circuit that the embodiment of the present invention one provides, and the low pressure difference linearity is steady
Volt circuit can be applied to high-performance portable equipment (such as：Mobile phone, MP3 player, palm PC (Personal Digital
Assistant, abbreviation PDA) or the low work(such as dynamic stability control system (Dynamic Stability Control, abbreviation DSC)
Consume product) in, it is particularly applicable in battery power supply system with the voltage of output stabilization.As shown in Figure 1, the low pressure difference linearity
Regulator circuit includes low pressure difference linearity voltage regulation unit 11 and zero-regulator resistor unit 12.
For the first input end of low pressure difference linearity voltage regulation unit 11 for receiving the operating voltage VBAT of input, the work is electric
VBAT is pressed to be used to power for entire low-dropout linear voltage-regulating circuit, the second input terminal of low pressure difference linearity voltage regulation unit 11 is used to connect
The reference voltage VREF of input is received, the output terminal VOUT of low pressure difference linearity voltage regulation unit 11 is used to load 14 work for exporting
Load current, the load 14 can be connected to the output terminal VOUT of low pressure difference linearity voltage regulation unit 11 by PCB trace 13.Zeroing
The input terminal of resistance unit 12 is connected with the output terminal VOUT of low pressure difference linearity voltage regulation unit 11, the input of zero-regulator resistor unit 12
End adaptively adjusts the resistance value of equivalent resistance according to the load current sampled, and by described in for sampling the load current
The resistance value of equivalent resistance feeds back to the feedback input end of the low pressure difference linearity voltage regulation unit 11, so that low pressure difference linearity voltage stabilizing list
Member 11 adjusts the poles and zeros assignment of low-dropout linear voltage-regulating circuit according to the equivalent resistance resistance value of feedback, ensure that linear voltage stabilization list
The voltage of first output terminal VOUT does not change with the variation of load and the variation of the length and width of PCB trace, so as to export
Stable voltage.
Wherein, the PCB trace 13 includes parasitic inductance L and dead resistance R, one end and the low voltage difference line of parasitic inductance L
Property voltage regulation unit 11 output terminal VOUT be connected, the other end of parasitic inductance L is connected with one end of dead resistance R, load 14 packet
Include the other end of remote capacitive C0 and load resistance RL, shown dead resistance R respectively with one end of remote capacitive C0 and load
One end of resistance RL is connected, the other end ground connection of remote capacitive C0, the other end ground connection of load resistance RL, the PCB trace 13
Further include the proximal end capacitance C1 close to 11 output terminal VOUT of low pressure difference linearity voltage regulation unit.
Low pressure difference linearity voltage stabilizing (LDO) circuit is degeneration factor, therefore there are stability problems.Ensure the steady of system
It is fixed, it is necessary to maintain enough phase margins.And the stability of system has directly with closed-loop bandwidth, output capacitance and equivalent series resistance
The relationship connect, output capacitance form a pole with output impedance, and dominant pole, output capacitance etc. is generally in small load application
The zero that effect series resistance is formed with output capacitance can also influence the stability of circuit, LDO circuit provided in this embodiment, when negative
It, can be according to the resistance value of the adaptive adjustment equivalent resistance of the load current sampled, so as to dynamically adjust when load changes
The poles and zeros assignment of whole system, without examining dead resistance R and parasitic inductance caused by the length and width of PCB trace twice
Influences of the L to system poles and zeros assignment.
Preferably, the low pressure difference linearity voltage regulation unit 11 includes the first transport and placing device OP1, the first transistor M1, the first electricity
Hinder Rf1 and second resistance Rf2.Wherein, the first input end of the first transport and placing device OP1 as low pressure difference linearity voltage regulation unit 11
Two input terminals are for receiving the reference voltage VREF of input, and the second input terminal of the first transport and placing device OP1 is respectively at first resistor Rf1
Second end and be connected with the first end of second resistance Rf2, the third input terminal of the first transport and placing device OP1 and the 4th input terminal are used
In the feedback input end as low pressure difference linearity voltage regulation unit 11, the output terminal VOUT and the first transistor of the first transport and placing device OP1
The first end of M1 is connected, and the second end of the first transistor M1 is connected with the first input end of low pressure difference linearity voltage regulation unit 11, the
The third end of one transistor M1 is connected with the first end of first resistor Rf1, third end and the first resistor Rf1 of the first transistor M1
First end line output terminal VOUT of the midpoint as low pressure difference linearity voltage regulation unit 11, the second end of second resistance Rf2 with
Ground is connected.
The zero-regulator resistor unit 12 include current source I0, current mirror 121, the second transport and placing device OP1, second transistor M2 and
Third transistor M3, the input terminal of the current source I0 are connected with the output terminal VOUT of the low pressure difference linearity voltage regulation unit 11,
The output terminal of the current source I0 is connected with the input terminal of the current mirror 121, the output terminal of the current mirror 121 respectively with institute
It states the second input terminal of the second transport and placing device OP1 and is connected with the second end of the second transistor M2, the second transistor
The first end of M2 is connected respectively with the output terminal of the second transport and placing device OP2 and with the first end of the third transistor M3,
The third end of the second transistor M2 is connected with the first end of the second transistor M2, and the second of the third transistor M3
End is connected respectively with the first input end of the second transport and placing device OP2 and with the third input terminal of the first transport and placing device OP1,
The third end of the third transistor M3 is connected with the 4th input terminal of the first transport and placing device OP2.
Preferably, the first transistor M1 is PMOS tube, and the first end of the first transistor M1 is the grid of PMOS tube
The second end of pole G, the first transistor M1 are the source S of PMOS tube, and the third end of the first transistor M1 is PMOS tube
Drain D, the current mirror 121 include the 4th transistor M4 and the 5th transistor M5, the first end of the 4th transistor M4
It is connected respectively with the output terminal of the current source I0 and with the first end of the 5th transistor M5, the 4th transistor M4
Second end be connected to the ground, the third end of the 4th transistor M4 is connected with the output terminal of the current source I0, the described 5th
Output terminal respectively second input terminal with the second transport and placing device OP2 of the second end of transistor M5 as the current mirror 121
And be connected with the second end of the second transistor M2, the third end of the 5th transistor M5 is connected to the ground, and described second
Transistor M2 is NMOS tube, and the first end of the second transistor M2 is the grid G of NMOS tube.The of the second transistor M2
Two ends are the source S of NMOS tube, and the third end of the second transistor M2 is the drain D of NMOS tube, the 4th transistor M4
For NMOS tube, the 5th transistor M5 is NMOS tube, wherein, the first end of the 4th transistor M4 is the grid of NMOS tube
The second end of G, the 4th transistor M4 are the source S of NMOS tube, and the third end of the 4th transistor M4 is NMOS tube
Drain D, the first end of the 5th transistor M5 are the grid G of NMOS tube, and the second end of the 5th transistor M5 is NMOS
The source S of pipe, the third end of the 5th transistor M5 are the drain D of NMOS tube.The breadth length ratio of the 4th transistor M4 with
The ratio of the breadth length ratio of the 5th transistor M5 is N：1.
As shown in Figure 1, when LDO circuit system worked well, load current is sampled by current source I0, passes through current mirror
The load current that 121 replica samples arrive, and proportionally send the drivings of the second transistor M2 in zero-regulator resistor unit 12 the to
Two-transistor M2 works, and since the grid G of second transistor M2 is connected with drain D, second transistor M2 is operated in saturation work
Area.Under the action of the second transport and placing device OP2, the gate source voltage of second transistor M2 and the gate source voltage phase of third transistor M3
Deng, thus third transistor M3 is operated in the range of linearity.When loading 14 and changing, load current that current source I0 is used
It changes, thus the equivalent resistance R of third transistor M3eIt changes, and by the equivalent resistance ReResistance value feed back to it is low
The feedback input end of pressure difference linear voltage stabilization unit 11, and the capacitance of the first transport and placing device OP1 is combined, it completes LDO systems and entirely bears
The change of poles and zeros assignment in the range of load.The Distribution of Zeros formula such as following formula of LDO systems：
Wherein, ReRepresent the equivalent resistance resistance value of third transistor M3 in zero-regulator resistor unit 12, COP1Represent the first amplifier
The capacitance of device OP1, due to the capacitance C of the first transport and placing device OP1OP1It is constant, when load changes, third transistor M3 etc.
Imitate resistance ReCorresponding change occurs so that the zero of LDO systems changes, so that LDO systems are in different loads
The stable voltage of lower output.
Specifically, as shown in Fig. 2, Fig. 2 is the width of low-dropout linear voltage-regulating circuit provided in an embodiment of the present invention at light load
Frequency characteristic schematic diagram, abscissa represents the output frequency of low-dropout linear voltage-regulating circuit in figure, and ordinate represents low pressure difference linearity
The phase margin of regulator circuit, low-dropout linear voltage-regulating circuit shown in Fig. 2 emulation when, low pressure difference linearity voltage regulation unit 11
The size of operating voltage VBAT that first input end receives is 3.7V, and the output terminal VOUT of low pressure difference linearity voltage regulation unit 11 is defeated
Go out voltage for 3.0V, the size of output current is 10uA, and the resistance value of the reference resistance of PCB trace is 0, the reference electricity of PCB trace
Inductance value is 0, i.e., the parasitic parameter of PCB trace is 0, at this point, the resistance value for the equivalent resistance that third transistor M3 is generated is 47.95K
Ω, phase margin are that PM (Phase Margin) is 78.9 °, and loop bandwidth 4.7KHz, LDO system is with good stability
Energy.
As shown in figure 3, the amplitude versus frequency characte that Fig. 3 is low-dropout linear voltage-regulating circuit full load provided in an embodiment of the present invention is shown
It is intended to, abscissa represents the output frequency of low-dropout linear voltage-regulating circuit in figure, and ordinate represents low-dropout linear voltage-regulating circuit
Phase margin, low-dropout linear voltage-regulating circuit shown in Fig. 3 emulation when, low pressure difference linearity voltage regulation unit 11 first input
It is 3.7V to terminate the size of operating voltage VBAT received, and the output terminal VOUT output voltages of low pressure difference linearity voltage regulation unit 11 are
3.0V, the size of output current is 300mA, and the resistance value of the reference resistance of PCB trace is 0, and the reference inductance value of PCB trace is 0,
I.e. the parasitic parameter of PCB trace is 0, at this point, the resistance value for the equivalent resistance that third transistor M3 is generated is 5.47K Ω, phase is abundant
It is 32.8 °, loop bandwidth 0.65MHz to spend for PM (Phase Margin), and low pressure difference linearity voltage-stabilizing system has preferable steady
Qualitative energy.
As shown in figure 4, the amplitude versus frequency characte that Fig. 4 is low-dropout linear voltage-regulating circuit full load provided in an embodiment of the present invention is shown
It is intended to, abscissa represents the output frequency of low-dropout linear voltage-regulating circuit in figure, and ordinate represents low-dropout linear voltage-regulating circuit
Phase margin, low-dropout linear voltage-regulating circuit shown in Fig. 4 emulation when, low pressure difference linearity voltage regulation unit 11 first input
It is 3.7V to terminate the size of operating voltage VBAT received, and the output terminal VOUT output voltages of low pressure difference linearity voltage regulation unit 11 are
3.0V, the size of output current is 300mA, and the resistance value of the reference resistance of PCB trace is 1.5 Ω, the parasitic inductance L of PCB trace
It is worth for 100nH, at this point, the resistance value for the equivalent resistance that third transistor M3 is generated is 5.92K Ω, phase margin is PM (Phase
Margin it is) 109.1 °, loop bandwidth 7.968MHz, low pressure difference linearity voltage-stabilizing system has preferable stability.At this point,
Referring to table 2, table 2 is that the resistance value of the reference resistance of PCB trace is 1.5 Ω, the length of PCB trace when parasitic inductance L values are 100nH
With width mapping table, as can be seen from the table, in output frequency 100KHz~10MHz of low-dropout linear voltage-regulating circuit
Under, if PCB link widths are 0.15mm, corresponding PCB wire lengths 210mm；It is corresponding if PCB link widths are 0.2mm
PCB wire lengths 330mm；If PCB link widths are 0.25mm, corresponding PCB wire lengths 250mm.At this point, PCB is walked
The length of line has much met the needs of LDO systems design.
As shown in figure 5, the amplitude versus frequency characte that Fig. 5 is low-dropout linear voltage-regulating circuit full load provided in an embodiment of the present invention is shown
It is intended to, abscissa represents the output frequency of low-dropout linear voltage-regulating circuit in figure, and ordinate represents low-dropout linear voltage-regulating circuit
Phase margin, low-dropout linear voltage-regulating circuit shown in fig. 5 emulation when, low pressure difference linearity voltage regulation unit 11 first input
It is 3.7V to terminate the size of operating voltage VBAT received, and the output terminal VOUT output voltages of low pressure difference linearity voltage regulation unit 11 are
3.0V, the size of output current is 300mA, and the resistance value of the reference resistance of PCB trace is 6.0 Ω, the parasitic inductance L of PCB trace
It is worth for 400nH, at this point, the resistance value for the equivalent resistance that third transistor M3 is generated is 7.14K Ω, phase margin is PM (Phase
Margin it is) 59.1 °, loop bandwidth 15.8MHz, LDO system still have preferable stability.At this point, referring to table 3,
Table 3 is that the resistance value of the reference resistance of PCB trace is 6 Ω, and the length and width of PCB trace corresponds to when parasitic inductance L values are 400nH
Relation table, as can be seen from the table, under output frequency 100KHz~10MHz of low-dropout linear voltage-regulating circuit, if PCB lines
When width is 0.15mm, corresponding wire length 840mm；If PCB link widths are 0.2mm, corresponding wire length
1320mm；If PCB link widths are 0.25mm, corresponding wire length 1000mm.At this point, the length of PCB trace is remote
It is remote to meet the needs of LDO systems design.
The embodiment of the present invention additionally provides a kind of low pressure difference linearity stable-pressure device, and shown low pressure difference linearity stable-pressure device includes
Low-dropout linear voltage-regulating circuit described in above-described embodiment.
The low-dropout linear voltage-regulating circuit and low pressure difference linearity stable-pressure device that the embodiment of the present invention one provides, pass through the electricity that returns to zero
Resistance unit samples load current, in entirely load variation range, according to the adaptive tune of the load current sampled
The resistance value of whole equivalent resistance, and the resistance value of the equivalent resistance is fed back into low pressure difference linearity voltage regulation unit, the linear voltage stabilization
Unit adjusts the poles and zeros assignment of low-dropout linear voltage-regulating circuit according to the equivalent resistance of feedback, without considering low voltage difference line
Property regulator circuit around PCB trace length and width so that the stable voltage of low-dropout linear voltage-regulating circuit output.
Embodiment two
Fig. 6 is the structure chart of low-dropout linear voltage-regulating circuit provided by Embodiment 2 of the present invention, and the low pressure difference linearity is steady
Volt circuit can be applied to high-performance portable equipment (such as：Mobile phone, MP3 player, palm PC (Personal Digital
Assistant, abbreviation PDA) or the low work(such as dynamic stability control system (Dynamic Stability Control, abbreviation DSC)
Consume product) in, it is particularly applicable in battery power supply system with the voltage of output stabilization.As shown in fig. 6, the low pressure difference linearity
Regulator circuit includes low pressure difference linearity voltage regulation unit 21 and zero-regulator resistor unit 22.
For the first input end of low pressure difference linearity voltage regulation unit 21 for receiving the operating voltage VBAT of input, the work is electric
VBAT is pressed to be used to power for entire low-dropout linear voltage-regulating circuit, the second input terminal of low pressure difference linearity voltage regulation unit 21 is used to connect
The reference voltage VREF of input is received, the output terminal VOUT of low pressure difference linearity voltage regulation unit 21 is used to load 24 work for exporting
24 electric currents are loaded, the load 24 can be connected to the output terminal VOUT of low pressure difference linearity voltage regulation unit 21 by PCB lines.Zeroing
The input terminal of resistance unit 22 is connected with the output terminal VOUT of low pressure difference linearity voltage regulation unit 21, the input of zero-regulator resistor unit 22
End is for sampling 24 electric currents of the load, according to the resistance value of 24 current automatic adaptation of load adjustment equivalent resistance sampled, and will
The resistance value of the equivalent resistance feeds back to the feedback input end of the low pressure difference linearity voltage regulation unit 21, so that low pressure difference linearity is steady
Unit 21 is pressed to adjust the poles and zeros assignment of low-dropout linear voltage-regulating circuit according to the equivalent resistance resistance value of feedback, ensure that linear steady
The voltage of pressure unit output terminal VOUT does not change with the variation of the length and width of the variation and PCB trace 23 of load 24,
So as to export stable voltage.
Wherein, the PCB trace 23 includes parasitic inductance L and dead resistance R, one end and the low voltage difference line of parasitic inductance L
Property regulator circuit output terminal VOUT be connected, the other end of parasitic inductance L is connected with one end of dead resistance R, and load 24 includes
24 resistance of remote capacitive C0 and load, the other end of shown dead resistance R respectively with one end of remote capacitive C0 and load 24
One end of resistance is connected, and the other end ground connection of remote capacitive C0, the other end ground connection of 24 resistance of load, the PCB trace 23 is also
Including the proximal end capacitance C1 close to 21 output terminal VOUT of low pressure difference linearity voltage regulation unit.
Preferably, the low pressure difference linearity voltage regulation unit 21 includes the first transport and placing device OP1, the first transistor M1, the second electricity
Hinder Rf1 and second resistance Rf2.Wherein, the first input end of the first transport and placing device OP1 as low pressure difference linearity voltage regulation unit 21
Two input terminals are for receiving the reference voltage VREF of input, and the second input terminal of the first transport and placing device OP1 is respectively at second resistance Rf1
Second end and be connected with the first end of second resistance Rf2, the third input terminal of the first transport and placing device OP1 and the 4th input terminal are used
In the feedback input end as low pressure difference linearity voltage regulation unit 21, the output terminal of the first transport and placing device OP1 is with the first transistor M1's
First end is connected, and the second end of the first transistor M1 is connected with the first input end of low pressure difference linearity voltage regulation unit 21, and first is brilliant
The third end of body pipe M1 is connected with the first end of second resistance Rf1, and the of the third end of the first transistor M1 and second resistance Rf1
The second end of output terminal VOUT of the midpoint of one end line as low pressure difference linearity voltage regulation unit 21, second resistance Rf2 and ground phase
Even.
The zero-regulator resistor unit 22 include current source I0, current mirror 221, the second transport and placing device OP2, second transistor M2 and
Third transistor M3, the input terminal of the current source I0 are connected with the output terminal VOUT of the low pressure difference linearity voltage regulation unit 21,
The output terminal of the current source I0 is connected with the input terminal of the current mirror 221, the output terminal of the current mirror 221 respectively with institute
It states the second input terminal of the second transport and placing device OP2 and is connected with the second end of the second transistor M2, the second transistor
The first end of M2 is connected respectively with the output terminal of the second transport and placing device OP2 and with the first end of the third transistor M3,
The third end of the second transistor M2 is connected with the first end of the second transistor M2, and the second of the third transistor M3
End is connected respectively with the first input end of the second transport and placing device OP2 and with the third input terminal of the first transport and placing device OP1,
The third end of the third transistor M3 is connected with the 4th input terminal of the first transport and placing device OP1.
Preferably, the first transistor M1 is PNP type triode, and the first end of the first transistor M1 is positive-negative-positive
Emitter E of the second end of the base stage B, the first transistor M1 of triode for PNP type triode, the first transistor M1
Third end be NPN type triode collector C.The second transistor M2 be NPN type triode, the second transistor M2
First end be NPN type triode base stage B, the second transistor M2 second end be NPN type triode emitter E,
The third end of the second transistor M2 is the collector C of NPN type triode.The 4th transistor M4 is NPN type triode,
The 5th transistor M5 is NPN type triode, wherein, the first end of the 4th transistor M4 is the base of NPN type triode
The second end of pole B, the 4th transistor M4 are the emitter E of NPN type triode, and the third end of the 4th transistor M4 is
The first end of the collector C, the 5th transistor M5 of NPN type triode are the base stage B of NPN type triode, and the described 5th is brilliant
The second end of body pipe M5 is the emitter E of NPN type triode, and the third end of the 5th transistor M5 is NPN type triode
Collector C.The ratio of the breadth length ratio of the 4th transistor M4 and the breadth length ratio of the 5th transistor M5 is N：1, wherein, N
For positive integer.
Described in the operation principle of low-dropout linear voltage-regulating circuit described in the embodiment of the present invention two and the embodiment of the present invention one
The operation principle of low-dropout linear voltage-regulating circuit is identical, can refer to the content described in the embodiment of the present invention one to understand this implementation
Example, details are not described herein.
Note that it above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The present invention is not limited to specific embodiment described here, can carry out for a person skilled in the art various apparent variations,
It readjusts and substitutes without departing from protection scope of the present invention.Therefore, although being carried out by above example to the present invention
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
It can include other more equivalent embodiments, and the scope of the present invention is determined by scope of the appended claims.
Claims (7)
1. a kind of low-dropout linear voltage-regulating circuit, which is characterized in that including low pressure difference linearity voltage regulation unit and zero-regulator resistor unit,
Wherein,
For the first input end of the low pressure difference linearity voltage regulation unit for receiving the operating voltage of input, the low pressure difference linearity is steady
The second input terminal of unit is pressed for receiving the reference voltage of input, the output terminal output of the low pressure difference linearity voltage regulation unit is used
In the load current of loaded work piece；
The input terminal of the zero-regulator resistor unit is connected with the output terminal of the low pressure difference linearity voltage regulation unit, the zero-regulator resistor
Input terminal for sampling the load current, according to the resistance of the adaptive adjustment equivalent resistance of the load current sampled
It is worth, and the resistance value of the equivalent resistance is fed back to the feedback input end of the low pressure difference linearity voltage regulation unit, so that described low
Pressure difference linear voltage stabilization unit adjusts the zero pole point of the low-dropout linear voltage-regulating circuit according to the equivalent resistance resistance value of the feedback
Distribution；
Wherein, the low pressure difference linearity voltage regulation unit includes the first transport and placing device, the first transistor, first resistor and second resistance,
Wherein,
The first input end of first transport and placing device is used to receive as the second input terminal of the low pressure difference linearity voltage regulation unit
The reference voltage of input, the second input terminal of first transport and placing device respectively with the second end of the first resistor and with it is described
The first end of second resistance is connected, and the third input terminal and the 4th input terminal of first transport and placing device are used to be used as the low voltage difference
The feedback input end of linear voltage stabilization unit, the output terminal of first transport and placing device are connected with the first end of the first transistor；
The second end of the first transistor is connected with the first input end of the low pressure difference linearity voltage regulation unit, and described first is brilliant
The third end of body pipe is connected with the first end of the first resistor, third end and the first resistor of the first transistor
Output terminal of the midpoint of first end line as the low pressure difference linearity voltage regulation unit；
The second end of the second resistance is connected to the ground；
The zero-regulator resistor unit includes current source, current mirror, the second transport and placing device, second transistor and third transistor, wherein,
The input terminal of the current source is connected with the output terminal of the low pressure difference linearity voltage regulation unit, the output terminal of the current source
It is connected with the input terminal of the current mirror；
The output terminal of the current mirror respectively with the second input terminal of second transport and placing device and with the second transistor
Second end is connected；
The first end of the second transistor respectively with the output terminal of second transport and placing device and with the third transistor
First end is connected, and the third end of the second transistor is connected with the first end of the second transistor；
The second end of the third transistor respectively with the first input end of second transport and placing device and with first amplifier
The third input terminal of device is connected, and the third end of the third transistor is connected with the 4th input terminal of first transport and placing device.
2. low-dropout linear voltage-regulating circuit according to claim 1, which is characterized in that the first transistor is PMOS
Pipe, the first end of the first transistor are the grid of PMOS tube, and the second end of the first transistor is the source electrode of PMOS tube,
The third end of the first transistor is the drain electrode of PMOS tube；Or
The first transistor is PNP type triode, and the first end of the first transistor is the base stage of PNP type triode, institute
The second end for stating the first transistor is the emitter of PNP type triode, and the third end of the first transistor is PNP type triode
Collector.
3. low-dropout linear voltage-regulating circuit according to claim 1, which is characterized in that the current mirror includes the 4th crystal
Pipe and the 5th transistor, wherein,
The first end of 4th transistor respectively with the output terminal of the current source and with the 5th transistor first
End is connected, and the second end of the 4th transistor is connected to the ground, and the third end of the 4th transistor is defeated with the current source
Outlet is connected；
The second end of 5th transistor is defeated with the second of second transport and placing device respectively as the output terminal of the current mirror
Enter end and be connected with the second end of the second transistor, the third end of the 5th transistor is connected to the ground.
4. low-dropout linear voltage-regulating circuit according to claim 1, which is characterized in that the second transistor is NMOS
Pipe, the first end of the second transistor are the grid of NMOS tube, and the second end of the second transistor is the source electrode of NMOS tube,
The third end of the second transistor is the drain electrode of NMOS tube；Or
The second transistor is NPN type triode, and the first end of the second transistor is the base stage of NPN type triode, institute
The second end for stating second transistor is the emitter of NPN type triode, and the third end of the second transistor is NPN type triode
Collector.
5. low-dropout linear voltage-regulating circuit according to claim 3, which is characterized in that the 4th transistor is NMOS
Pipe, the 5th transistor are NMOS tube, wherein,
The first end of 4th transistor is the grid of NMOS tube, and the second end of the 4th transistor is the source of NMOS tube
Pole, the third end of the 4th transistor are the drain electrode of NMOS tube, and the first end of the 5th transistor is the grid of NMOS tube,
The second end of 5th transistor is the source electrode of NMOS tube, and the third end of the 5th transistor is the drain electrode of NMOS tube；Or
Person
4th transistor is NPN type triode, and the 5th transistor is NPN type triode, wherein,
The first end of 4th transistor is the base stage of NPN type triode, and the second end of the 4th transistor is NPN type three
The emitter of pole pipe, the third end of the 4th transistor are the collector of NPN type triode, the first of the 5th transistor
The base stage for NPN type triode is held, the second end of the 5th transistor is the emitter of NPN type triode, and the described 5th is brilliant
The third end of body pipe is the collector of NPN type triode.
6. low-dropout linear voltage-regulating circuit according to claim 5, which is characterized in that the breadth length ratio of the 4th transistor
Ratio with the breadth length ratio of the 5th transistor is N：1, wherein, N is positive integer.
7. a kind of low pressure difference linearity stable-pressure device, which is characterized in that the low pressure difference linearity stable-pressure device includes such as claim
Any low-dropout linear voltage-regulating circuits of 1-6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410837237.5A CN105786071B (en) | 2014-12-24 | 2014-12-24 | A kind of low-dropout linear voltage-regulating circuit and low pressure difference linearity stable-pressure device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410837237.5A CN105786071B (en) | 2014-12-24 | 2014-12-24 | A kind of low-dropout linear voltage-regulating circuit and low pressure difference linearity stable-pressure device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105786071A CN105786071A (en) | 2016-07-20 |
| CN105786071B true CN105786071B (en) | 2018-06-22 |
Family
ID=56389791
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410837237.5A Active CN105786071B (en) | 2014-12-24 | 2014-12-24 | A kind of low-dropout linear voltage-regulating circuit and low pressure difference linearity stable-pressure device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105786071B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102017208187A1 (en) * | 2017-05-16 | 2018-11-22 | Continental Automotive Gmbh | An electronic module and motor vehicle and method for limiting an input current during a power-on of the module |
| CN112527041B (en) * | 2020-12-25 | 2022-04-08 | 北京集创北方科技股份有限公司 | Low dropout regulator circuit |
| CN114006348A (en) * | 2021-12-06 | 2022-02-01 | 之江实验室 | Single-row carrier photoelectric detector bias voltage protection circuit |
| CN115437444B (en) * | 2022-10-12 | 2024-03-12 | 群联电子股份有限公司 | Voltage stabilizing circuit module, memory storage device and voltage control method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101105696A (en) * | 2007-08-08 | 2008-01-16 | 中国航天时代电子公司第七七一研究所 | Voltage buffer circuit for linear potentiostat |
| CN101667812A (en) * | 2009-07-24 | 2010-03-10 | Bcd半导体制造有限公司 | Frequency compensation method and linear voltage stabilizer with ultra low differential pressure |
| CN101957625A (en) * | 2010-11-12 | 2011-01-26 | 复旦大学 | Low dropout linear voltage regulator for driving nF-stage load |
| US8169203B1 (en) * | 2010-11-19 | 2012-05-01 | Nxp B.V. | Low dropout regulator |
| CN102707756A (en) * | 2012-05-30 | 2012-10-03 | 西安航天民芯科技有限公司 | Wide-load linear adjuster using dynamic ESR (Equivalent Series Resistance) compensating resistor |
-
2014
- 2014-12-24 CN CN201410837237.5A patent/CN105786071B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101105696A (en) * | 2007-08-08 | 2008-01-16 | 中国航天时代电子公司第七七一研究所 | Voltage buffer circuit for linear potentiostat |
| CN101667812A (en) * | 2009-07-24 | 2010-03-10 | Bcd半导体制造有限公司 | Frequency compensation method and linear voltage stabilizer with ultra low differential pressure |
| CN101957625A (en) * | 2010-11-12 | 2011-01-26 | 复旦大学 | Low dropout linear voltage regulator for driving nF-stage load |
| US8169203B1 (en) * | 2010-11-19 | 2012-05-01 | Nxp B.V. | Low dropout regulator |
| CN102707756A (en) * | 2012-05-30 | 2012-10-03 | 西安航天民芯科技有限公司 | Wide-load linear adjuster using dynamic ESR (Equivalent Series Resistance) compensating resistor |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105786071A (en) | 2016-07-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN201229513Y (en) | Low voltage difference linear voltage regulator | |
| CN105138062B (en) | Improve the system of low pressure difference linear voltage regulator load regulation | |
| CN105334900B (en) | Fast transient response low pressure difference linear voltage regulator | |
| CN105786071B (en) | A kind of low-dropout linear voltage-regulating circuit and low pressure difference linearity stable-pressure device | |
| US9235222B2 (en) | Hybrid regulator with composite feedback | |
| CN103218003B (en) | Low-dropout voltage stabilizer with multiple power sources input | |
| US20160187902A1 (en) | Two-stage error amplifier with nested-compensation for ldo with sink and source ability | |
| CN110928358B (en) | Low dropout voltage regulating circuit | |
| CN108021177B (en) | NMOS-based voltage regulator | |
| CN102880219A (en) | Linear voltage regulator with dynamic compensation characteristic | |
| CN105992981A (en) | Low dropout voltage regulator circuits | |
| CN108241396A (en) | A kind of low pressure difference linear voltage regulator for improving transient response speed | |
| CN105159383A (en) | Low dropout regulator with high power supply rejection ratio | |
| CN104615185B (en) | A kind of reference voltage source start-up circuit | |
| CN105425888A (en) | Low-output-current LDO (low dropout regulator) circuit applicable to power management and having Q-value adjusting function | |
| CN207490754U (en) | Electronic device with coaxial cable power supply function | |
| CN205375256U (en) | Low output current LDO circuit that Q value was adjusted suitable for power management | |
| CN208819106U (en) | A kind of LDO circuit of ultra low quiescent power consumption and drive heavy load ultra low quiescent power consumption LDO circuit | |
| CN107834850A (en) | DC linear voltage-stabilized power supply circuit | |
| US8692528B2 (en) | Low dropout regulator | |
| CN113098236B (en) | Switching power supply and output voltage compensation circuit thereof | |
| CN208044450U (en) | D.C. regulated power supply | |
| Feng et al. | An efficient and stable power management circuit with high output energy for wireless powering capsule endoscopy | |
| CN202533829U (en) | Non-capacitance low-voltage-differential linear voltage stabilizing system and bias current adjusting circuit thereof | |
| CN106094953B (en) | A kind of compensation circuit and its method of improvement LDO frequencies |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |