CN105762166A - Light-emitting diode array - Google Patents
Light-emitting diode array Download PDFInfo
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- CN105762166A CN105762166A CN201610171733.0A CN201610171733A CN105762166A CN 105762166 A CN105762166 A CN 105762166A CN 201610171733 A CN201610171733 A CN 201610171733A CN 105762166 A CN105762166 A CN 105762166A
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- conductive
- emitting diode
- light emitting
- type semiconductor
- semiconductor layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
Abstract
The invention discloses light-emitting diode (LED) array composed of N (N is greater than or equal to 3) LED units. The LED array comprises a permanent substrate, a bonding layer on the permanent substrate, a second conductive layer on the bonding layer, a second separating layer on the second conductive layer, a bridging metal layer on the second separating layer, a first separating layer on the bridging metal layer, a conductive connection layer on the first separating layer, an epitaxial structure on the conductive connection layer, and a first electrode on the epitaxial structure. The LED units are electrically connected via the bridging metal layer.
Description
The divisional application of application for a patent for invention that the application is the applying date is on 04 25th, 2011, application number is 201110102886.7, denomination of invention is " light emitting diode matrix ".
Technical field
The present invention relates to a kind of light emitting diode matrix, particularly relate to a kind of by N number of (N 3) the formed light emitting diode matrix of light emitting diode.
Background technology
In recent years, due to the progress of extension Yu Technology, make one of light emitting diode (lightemittingdiode is called for short LED) solid-state illumination light source becoming great potential.Due to the restriction of physical mechanism, LED is only capable of with DC powered, therefore, any using LED as the Lighting Design of light source, is required for the collocation electronic building brick such as rectification and blood pressure lowering, is converted to the spendable DC source of LED with alternating current Utilities Electric Co. directly provided.But increase the electronic building brick such as rectification and blood pressure lowering, except the increase causing illumination cost, the low AC/DC conversion efficiency of the electronic building brick such as rectification and blood pressure lowering, volume etc. bigger than normal all can affect LED and be used in reliability when normal lighting is applied and service life.
Summary of the invention
Light emitting diode matrix includes: permanent substrate;Tack coat is positioned on permanent substrate;Second conductive layer is positioned on tack coat;Second separate layer is positioned on the second conductive layer;Bridging metal level is positioned on the second separate layer;First separate layer is positioned on bridging metal level;Electric conductivity articulamentum is positioned on the first separate layer;Epitaxial structure is positioned on electric conductivity articulamentum;And first electrode be positioned on epitaxial structure.
Light emitting diode matrix includes: permanent substrate;Tack coat is positioned on permanent substrate;First conductive layer is positioned on tack coat;Second separate layer is positioned on the first conductive layer;Bridging metal level is positioned on the second separate layer;First separate layer is positioned on bridging metal level;Electric conductivity articulamentum is positioned on the first separate layer;And epitaxial structure is positioned on electric conductivity articulamentum.
Light emitting diode matrix, including N number of light emitting diode (N 3), and is electrically connected to each other through bridging metal level between light emitting diode.
Accompanying drawing explanation
Figure 1A-1I is the structural profile schematic diagram of disclosed light emitting diode matrix 1.
Figure 1A '-1G ' is the structure schematic top plan view of disclosed light emitting diode matrix 1.
Fig. 2 A-2I is the structural profile schematic diagram of disclosed light emitting diode matrix 2.
The structure schematic top plan view that Fig. 2 A '-2G ' is disclosed light emitting diode matrix 2.
Description of reference numerals
1,2: light emitting diode matrix
11: growth substrate
12: the first conductive-type semiconductor layers
13: active layer
14: the second conductive-type semiconductor layers
15: groove
16: platform
17: electric conductivity articulamentum
18: aisle
19: the first separate layers
20: conduction region
21: bridging metal level
22: the second separate layers
23: the second conductive layers
24: tack coat
25: permanent substrate
26: the first conductive layers
27: the first electrodes
28: the second electrodes
I: first area
II: second area
III: the three region
A, b: electrically shallow trench isolation
Detailed description of the invention
The present invention discloses the light emitting diode matrix being made up of N (N 3) individual light emitting diode, including the first light emitting diode, the second light emitting diode ... sequentially to (N-1) light emitting diode and N light emitting diode.Light emitting diode matrix has first area (I), the 3rd region (III) again, and wherein first area (I) includes the first light emitting diode, and the 3rd region (III) includes N light emitting diode;And second area (II) is positioned between first area (I) and the 3rd region (III), and include the second light emitting diode ... sequentially to (N-1) light emitting diode.
Embodiment one is disclosed by being formed light emitting diode matrix 1 by 3 light emitting diodes.Its structural profile schematic diagram is such as shown in Figure 1A-1I, and structure schematic top plan view is such as shown in Figure 1A '-1G '.The manufacture method of light emitting diode matrix 1, comprises the following steps:
1. providing growth substrate 11, and form epitaxial structure on growth substrate 11, its epitaxial structures includes the first conductive-type semiconductor layer 12, active layer 13, and the second conductive-type semiconductor layer 14, as shown in Figure 1A and Figure 1A '.
2. then etch first area (I), second area (II) portion of epi structure to form multiple groove 15, wherein not etched epitaxial structure then forms multiple platform 16;And the 3rd the epitaxial structure in region (III) be not etched, as shown in Figure 1B and Figure 1B '.
3. forming electric conductivity articulamentum 17 on the subregion of multiple platforms 16, the land regions wherein not covered by electric conductivity articulamentum 17 then forms multiple aisle 18;As shown in Fig. 1 C and Fig. 1 C '.
4. on partially electronically conductive property articulamentum 17, on multiple aisle 18 and the sidewall of multiple groove 15 form the first separate layer 19, but do not covered by the first separate layer 19 on the partially electronically conductive property articulamentum 17 of first area (I) and on whole electric conductivity articulamentums 17 in the 3rd region (III).Conduction region 20 is the region not covered by the first separate layer 19 on the electric conductivity articulamentum 17 of second area (II).As shown in Fig. 1 D and Fig. 1 D '.
5. on the first separate layer 19, conduction region 20, within multiple groove 15, and the 3rd region (III) whole electric conductivity articulamentums 17 on formed bridging metal level 21, but in the partially electronically conductive property articulamentum 17 of first area (I) using the electric connection as follow-up second conductive layer and the second conductive-type semiconductor layer, so side is covered by bridging metal level 21 thereon.And a region being positioned at the contiguous conduction region 20 of second area (II) is not also covered by bridging metal level 21, can as the use of electrically isolation;As shown in Fig. 1 E and Fig. 1 E '.The part bridging metal level 21 being positioned at first area (I) extends within multiple groove 15 and is electrically connected with the first conductive-type semiconductor layer 12;It is positioned at the bridging metal level 21 on multiple platform 16 and aisle 18 electrically to be completely cut off by the first separate layer 19 and the second conductive-type semiconductor layer 14.Being arranged in the bridging metal level 21 on second area (II) conduction region 20 to be electrically connected by electric conductivity articulamentum 17 and the second conductive-type semiconductor layer 14, part bridging metal level 21 then extends within multiple groove 15 and is electrically connected with the first conductive-type semiconductor layer 12;It is positioned at the bridging metal level 21 on multiple platform 16 and aisle 18 electrically to be completely cut off by the first separate layer 19 and the second conductive-type semiconductor layer 14.The bridging metal level 21 being positioned at the 3rd region (III) is electrically connected by electric conductivity articulamentum 17 and the second conductive-type semiconductor layer 14.
6. form the second separate layer 22 on bridging metal level 21 and on a region of second area (II), but the second separate layer 22 does not cover the partially electronically conductive property articulamentum 17 of first area (I);As shown in Fig. 1 F and Fig. 1 F '.
7. on the second separate layer 22 and on the partially electronically conductive property articulamentum 17 of first area (I), form the second conductive layer 23;As shown in Fig. 1 G and Fig. 1 G '.
8. form tack coat 24 on the second conductive layer 23;Permanent substrate 25 is provided;And bondd by tack coat 24 and permanent substrate 25, as shown in fig. 1h.
9. remove growth substrate 11 to expose first conductive-type semiconductor layer 12 its surface of alligatoring.Then, it is etched down to from the first conductive-type semiconductor layer 12 in multiple aisle 18 and exposes the first separate layer 19, to form N number of light emitting diode.Wherein the first light emitting diode is positioned at first area (I), the second light emitting diode ... be sequentially positioned at second area (II) to (N-1) light emitting diode and N light emitting diode is positioned at the 3rd region (III).Finally, on the first conductive-type semiconductor layer 12 coarse surface of N light emitting diode, form the first electrode 27, namely form the light emitting diode matrix 1 through bridging the metal level 21 N number of light emitting diode of electrical series, as shown in Figure 1 I.
Embodiment two is disclosed by being formed light emitting diode matrix 2 by 3 light emitting diodes.Its structural profile schematic diagram is such as shown in Fig. 2 A-2I, and structure schematic top plan view is such as shown in Fig. 2 A '-2G '.The manufacture method of light emitting diode matrix 2, comprises the following steps:
1. providing growth substrate 11, and form epitaxial structure on growth substrate 11, its epitaxial structures includes the first conductive-type semiconductor layer 12, active layer 13, and the second conductive-type semiconductor layer 14, as shown in Fig. 2 A and Fig. 2 A '.
2. then etching part epitaxial structure is to form multiple groove 15, and wherein not etched epitaxial structure then forms multiple platform 16, as shown in Fig. 2 B and Fig. 2 B '.
3. forming electric conductivity articulamentum 17 on the subregion of multiple platforms 16, the land regions wherein not covered by electric conductivity articulamentum 17 then forms multiple aisle 18;As shown in Fig. 2 C and Fig. 2 C '.
4. on partially electronically conductive property articulamentum 17, on multiple aisle 18 and the sidewall of multiple groove 15 form the first separate layer 19.Second area (II), the region that the electric conductivity articulamentum 17 in the 3rd region (III) is not covered by the first separate layer 19 are then defined as conduction region 20;As shown in Fig. 2 D and Fig. 2 D '.
5. on part the first separate layer 19, within conduction region 20 and the multiple grooves 15 except the 3rd region (III), form bridging metal level 21.But in the use that part first separate layer 19 of first area (I) electrically will completely cut off as follow-up second conductive layer and the first conductive-type semiconductor layer, therefore side does not cover bridging metal level 21 thereon.Within multiple grooves 15 in the 3rd region (III) and the use that electrically will completely cut off as follow-up first conductive layer and the second conductive-type semiconductor layer of the first separate layer 19 of multiple platform, therefore not square thereon become cover bridging metal level 21, as shown in Fig. 2 E and Fig. 2 E '.The part bridging metal level 21 being positioned at first area (I) extends within multiple groove 15 and is electrically connected with the first conductive-type semiconductor layer 12, is positioned at the bridging metal level 21 on multiple platform 16 and aisle 18 and is electrically completely cut off by the first separate layer 19 and the second conductive-type semiconductor layer 14.In second area (II), it is positioned at the bridging metal level 21 on conduction region 20 be electrically connected by electric conductivity articulamentum 17 and the second conductive-type semiconductor layer 14;Part bridging metal level 21 extends within multiple groove 15 and is electrically connected with the first conductive-type semiconductor layer 12;It is positioned at the bridging metal level 21 on multiple platform 16 and aisle 18 electrically to be completely cut off by the first separate layer 19 and the second conductive-type semiconductor layer 14.In the 3rd region (III), it is positioned at the bridging metal level 21 on conduction region 20 be electrically connected by electric conductivity articulamentum 17 and the second conductive-type semiconductor layer 14.Additionally, be arranged in second area (II), the 3rd contiguous conduction region 20, region (III) b region not completely covered for bridging metal level 21, can as the use of electrically isolation.
6. on bridging metal level 21, do not formed the second separate layer 22 on part first separate layer 19 of first area (I) and in second area (II) on the completely covered b region of bridging metal level 21, but the second separate layer 22 does not cover within multiple grooves 15 in the 3rd region (III), on the first separate layer 19 of multiple platform and the 3rd region (III) not by b region that bridging metal level 21 is completely covered;As shown in Fig. 2 F and Fig. 2 F '.
7., on the second separate layer 22, within multiple grooves 15 in the 3rd region (III), on the first separate layer 19 of multiple platform and the 3rd region (III), do not formed the first conductive layer 26 by the b region that bridging metal level 21 is completely covered;As shown in Fig. 2 G and Fig. 2 G '.
8. form tack coat 24 on the first conductive layer 26;Permanent substrate 25 is provided, and is bondd by tack coat 24 and permanent substrate 25, as illustrated in figure 2h.
9. remove growth substrate 11 to expose first conductive-type semiconductor layer 12 its surface of alligatoring.Then, it is etched down to from the first conductive-type semiconductor layer 12 among multiple aisle 18 and exposes the first separate layer 19, to form N number of light emitting diode.Wherein the first light emitting diode is positioned at first area (I), second light emitting diode to (N-1) light emitting diode is positioned at second area (II), and N light emitting diode is positioned at the 3rd region (III).The first conductive-type semiconductor layer 12 not forming bridging metal level 21 part then at first area (I) is etched down to and exposes electric conductivity articulamentum 17, and on electric conductivity articulamentum 17, form the second electrode 28, namely the light emitting diode matrix 2 through bridging the metal level 21 N number of light emitting diode of electrical series is formed, as shown in figure 2i.
In above-described embodiment one and embodiment two, the material of growth substrate 11 includes at least one material, selected from the material group that GaAs, gallium phosphide, sapphire, carborundum, gallium nitride or aluminium nitride form.Epitaxial structure is made up of a kind of III-V group semi-conductor material, and this III-V group semi-conductor material is AlGaInP series compound or aluminum indium gallium nitride series compound.Electric conductivity articulamentum 17 includes one or more material, selected from the group that tin indium oxide, cadmium tin, antimony tin, indium zinc oxide, zinc oxide aluminum and zinc-tin oxide are constituted.First separate layer 19, second separate layer 22 is insulant, one or more material can be included respectively, selected from the group that silicon dioxide, titanium oxide, titanium dioxide, five oxidation Tritanium/Trititaniums, titanium sesquioxide, ceria, zinc sulfide and aluminium oxide are constituted.First conductive layer 26, the second conductive layer 23 can be silver or aluminum.Tack coat 24 is conductive material, and composition material can be metal or metal alloy, for instance AuSn, PbSn, AuGe, AuBe, AuSi, Sn, In, Au, PdIn.Permanent substrate 25 is conductive material, for instance include the materials such as carbide, metal, metal alloy, metal-oxide or metallic composite.The material of bridging metal level 21 includes metal, metal alloy or metal-oxide.
Embodiment cited by the present invention is only in order to illustrate the present invention, and is not used to restriction the scope of the present invention.Anyone any aobvious and easy to know modification made for the present invention or change are all without departing from the spirit and scope of the present invention.
Claims (10)
1. a light emitting diode construction, comprises:
Can electrically-conductive backing plate;
First conductive-type semiconductor layer, active layer and the second conductive-type semiconductor layer, being sequentially stacked over this can on electrically-conductive backing plate;
Metal level, being located at this can between electrically-conductive backing plate and this first conductive-type semiconductor layer, and this metal level comprises multiple Part I and connects the Part II of these Part I, wherein respectively this Part I is connected through this first conductive-type semiconductor layer and this active layer with this second conductivity type semiconductor layer, this Part II this first conductive-type semiconductor layer and this can between electrically-conductive backing plate, and this metal level is electrically insulated with this first conductivity type semiconductor layer and this active layer respectively;
Electric conductivity articulamentum, this first conductive-type semiconductor layer and this can between electrically-conductive backing plate, and this electric conductivity articulamentum is electrically connected with this first conductive-type semiconductor layer;
Tack coat, being located at this can between electrically-conductive backing plate and this first conductive-type semiconductor layer, and this can be electrically connected with this metal level through this tack coat by electrically-conductive backing plate;
Electrode, is located at this electric conductivity articulamentum on the surface of the first conductive-type semiconductor layer, and is electrically connected with this first conductive-type semiconductor layer through this electric conductivity articulamentum;And
First separate layer, is located between this electric conductivity articulamentum and this Part II.
2. light emitting diode construction as claimed in claim 1, wherein, this tack coat be located at metal level Part II and can between electrically-conductive backing plate.
3. light emitting diode construction as claimed in claim 1, wherein, metal level and tack coat have different materials.
4. light emitting diode construction as claimed in claim 1, wherein, the Part I of metal level and Part II have identical material.
5. light emitting diode construction as claimed in claim 1, wherein, also comprises the second separate layer, is located between this tack coat and this metal level.
6. light emitting diode construction as claimed in claim 1 or 2, wherein, this electrode and this electric conductivity articulamentum physical contact.
7. light emitting diode construction as claimed in claim 1 or 2, wherein, this electric conductivity articulamentum is around these Part I, and this electric conductivity articulamentum between adjacent Part I is continuously unbroken.
8. light emitting diode construction as claimed in claim 1 or 2, wherein, a part for this tack coat covers this Part II of this metal level.
9. light emitting diode construction as claimed in claim 1 or 2, wherein, this tack coat comprises gold, stannum or gold-tin alloy.
10. light emitting diode construction as claimed in claim 1 or 2, wherein, this can comprise metal, carbide, metal alloy, metal-oxide or metallic composite by electrically-conductive backing plate.
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CN201610171733.0A CN105762166B (en) | 2011-04-25 | 2011-04-25 | Light emitting diode matrix |
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CN201610171733.0A CN105762166B (en) | 2011-04-25 | 2011-04-25 | Light emitting diode matrix |
CN201110102886.7A CN102760745B (en) | 2011-04-25 | 2011-04-25 | Light emitting diode matrix |
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Cited By (1)
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CN107393428A (en) * | 2017-05-04 | 2017-11-24 | 财团法人交大思源基金会 | Structure and process of electrodeless shading light-emitting diode display |
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WO2007018360A1 (en) * | 2005-08-09 | 2007-02-15 | Seoul Opto Device Co., Ltd. | Ac light emitting diode and method for fabricating the same |
US20080237620A1 (en) * | 2007-03-30 | 2008-10-02 | Ching-Chuan Shiue | Light emitting diode apparatus |
CN101960602A (en) * | 2008-02-29 | 2011-01-26 | 欧司朗光电半导体有限公司 | Optoelectronic semi-conductor body and method for the production thereof |
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Patent Citations (3)
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WO2007018360A1 (en) * | 2005-08-09 | 2007-02-15 | Seoul Opto Device Co., Ltd. | Ac light emitting diode and method for fabricating the same |
US20080237620A1 (en) * | 2007-03-30 | 2008-10-02 | Ching-Chuan Shiue | Light emitting diode apparatus |
CN101960602A (en) * | 2008-02-29 | 2011-01-26 | 欧司朗光电半导体有限公司 | Optoelectronic semi-conductor body and method for the production thereof |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN107393428A (en) * | 2017-05-04 | 2017-11-24 | 财团法人交大思源基金会 | Structure and process of electrodeless shading light-emitting diode display |
US10535708B2 (en) | 2017-05-04 | 2020-01-14 | National Chiao Tung University | Electrodeless light-emitting diode display and method for fabricating the same |
US10553640B2 (en) | 2017-05-04 | 2020-02-04 | National Chiao Tung University | Electrodeless light-emitting diode display and method for fabricating the same |
CN107393428B (en) * | 2017-05-04 | 2020-04-28 | 财团法人交大思源基金会 | Structure and process of electrodeless shading light-emitting diode display |
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