CN105745757A - 硅锗FinFET形成 - Google Patents

硅锗FinFET形成 Download PDF

Info

Publication number
CN105745757A
CN105745757A CN201480062871.4A CN201480062871A CN105745757A CN 105745757 A CN105745757 A CN 105745757A CN 201480062871 A CN201480062871 A CN 201480062871A CN 105745757 A CN105745757 A CN 105745757A
Authority
CN
China
Prior art keywords
fin structure
fin
finfet
monocrystalline
sige
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201480062871.4A
Other languages
English (en)
Chinese (zh)
Inventor
J·J·徐
C·F·耶普
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN105745757A publication Critical patent/CN105745757A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H10D30/0241—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET] doping of vertical sidewalls, e.g. using tilted or multi-angled implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/222—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/28—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
CN201480062871.4A 2013-11-22 2014-10-17 硅锗FinFET形成 Pending CN105745757A (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361908003P 2013-11-22 2013-11-22
US61/908,003 2013-11-22
US14/269,828 US20150145069A1 (en) 2013-11-22 2014-05-05 Silicon germanium finfet formation
US14/269,828 2014-05-05
PCT/US2014/061226 WO2015076957A1 (en) 2013-11-22 2014-10-17 Silicon germanium finfet formation

Publications (1)

Publication Number Publication Date
CN105745757A true CN105745757A (zh) 2016-07-06

Family

ID=51799344

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480062871.4A Pending CN105745757A (zh) 2013-11-22 2014-10-17 硅锗FinFET形成

Country Status (5)

Country Link
US (2) US20150145069A1 (https=)
EP (1) EP3072157A1 (https=)
JP (1) JP2016537818A (https=)
CN (1) CN105745757A (https=)
WO (1) WO2015076957A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9679899B2 (en) 2015-08-24 2017-06-13 Stmicroelectronics, Inc. Co-integration of tensile silicon and compressive silicon germanium
US9735155B2 (en) 2015-12-14 2017-08-15 International Business Machines Corporation Bulk silicon germanium FinFET
US9680019B1 (en) * 2016-07-20 2017-06-13 Globalfoundries Inc. Fin-type field-effect transistors with strained channels

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090085027A1 (en) * 2007-09-29 2009-04-02 Intel Corporation Three dimensional strained quantum wells and three dimensional strained surface channels by ge confinement method
CN101490857A (zh) * 2006-06-30 2009-07-22 飞思卡尔半导体公司 形成半导体器件的方法及其结构
US20110175165A1 (en) * 2010-01-19 2011-07-21 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor fin device and method for forming the same using high tilt angle implant
CN103021827A (zh) * 2011-09-27 2013-04-03 中芯国际集成电路制造(上海)有限公司 鳍式场效应管、cmos鳍式场效应管的形成方法
CN103187297A (zh) * 2011-12-31 2013-07-03 中芯国际集成电路制造(上海)有限公司 鳍式场效应晶体管的制作方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040206951A1 (en) * 2003-04-18 2004-10-21 Mirabedini Mohammad R. Ion implantation in channel region of CMOS device for enhanced carrier mobility
US20060163581A1 (en) * 2005-01-24 2006-07-27 Lsi Logic Corporation Fabrication of strained silicon film via implantation at elevated substrate temperatures
US20070257315A1 (en) * 2006-05-04 2007-11-08 International Business Machines Corporation Ion implantation combined with in situ or ex situ heat treatment for improved field effect transistors
US8557692B2 (en) * 2010-01-12 2013-10-15 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET LDD and source drain implant technique
US8598025B2 (en) * 2010-11-15 2013-12-03 Varian Semiconductor Equipment Associates, Inc. Doping of planar or three-dimensional structures at elevated temperatures
CN102779753B (zh) * 2011-05-12 2015-05-06 中芯国际集成电路制造(上海)有限公司 半导体器件制造方法
US8722431B2 (en) * 2012-03-22 2014-05-13 Varian Semiconductor Equipment Associates, Inc. FinFET device fabrication using thermal implantation
US8946792B2 (en) * 2012-11-26 2015-02-03 International Business Machines Corporation Dummy fin formation by gas cluster ion beam
US9299564B2 (en) * 2012-12-12 2016-03-29 Varian Semiconductor Equipment Associates, Inc. Ion implant for defect control
US9299809B2 (en) * 2012-12-17 2016-03-29 Globalfoundries Inc. Methods of forming fins for a FinFET device wherein the fins have a high germanium content
US8957476B2 (en) * 2012-12-20 2015-02-17 Intel Corporation Conversion of thin transistor elements from silicon to silicon germanium
US9299840B2 (en) * 2013-03-08 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and methods for forming the same
US8895395B1 (en) * 2013-06-06 2014-11-25 International Business Machines Corporation Reduced resistance SiGe FinFET devices and method of forming same
US8952420B1 (en) * 2013-07-29 2015-02-10 Stmicroelectronics, Inc. Method to induce strain in 3-D microfabricated structures
US9142650B2 (en) * 2013-09-18 2015-09-22 Taiwan Semiconductor Manufacturing Company Limited Tilt implantation for forming FinFETs
CN103972104A (zh) * 2014-05-05 2014-08-06 清华大学 具有SiGe沟道的鳍式场效应晶体管及其形成方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101490857A (zh) * 2006-06-30 2009-07-22 飞思卡尔半导体公司 形成半导体器件的方法及其结构
US20090085027A1 (en) * 2007-09-29 2009-04-02 Intel Corporation Three dimensional strained quantum wells and three dimensional strained surface channels by ge confinement method
US20110175165A1 (en) * 2010-01-19 2011-07-21 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor fin device and method for forming the same using high tilt angle implant
CN103021827A (zh) * 2011-09-27 2013-04-03 中芯国际集成电路制造(上海)有限公司 鳍式场效应管、cmos鳍式场效应管的形成方法
CN103187297A (zh) * 2011-12-31 2013-07-03 中芯国际集成电路制造(上海)有限公司 鳍式场效应晶体管的制作方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
L. PELAZ ET AL: "Atomistic process modeling based on Kinetic Monte Carlo and Molecular Dynamics", 《ELECTRON DEVICES MEETING (IEDM), 2009 IEEE INTERNATIONAL》 *

Also Published As

Publication number Publication date
US20160225881A1 (en) 2016-08-04
WO2015076957A1 (en) 2015-05-28
EP3072157A1 (en) 2016-09-28
US20150145069A1 (en) 2015-05-28
JP2016537818A (ja) 2016-12-01

Similar Documents

Publication Publication Date Title
US9257556B2 (en) Silicon germanium FinFET formation by Ge condensation
JP6659686B2 (ja) コンタクトラップアラウンド構造
US7955928B2 (en) Structure and method of fabricating FinFET
KR102042476B1 (ko) 나노와이어 트랜지스터에 대한 누설 감소 구조체
CN107258017A (zh) 共享鳍或纳米线的场效应器件的器件隔离
US20160035891A1 (en) Stress in n-channel field effect transistors
US9496181B2 (en) Sub-fin device isolation
US20190027576A1 (en) Composite channel metal-oxide-semiconductor field effect transistor (mosfet)
US20160225881A1 (en) Silicon germanium finfet formation
US9165929B2 (en) Complementarily strained FinFET structure
US20200185384A1 (en) Horizontal gate-all-around (gaa) field effect transistor (fet) for complementary metal oxide semiconductor (cmos) integration
US20190221645A1 (en) Transistor with fluorinated graphene spacer
TW202519033A (zh) 底部通道溝槽隔離之全環繞閘極（ｇａａ）場效電晶體（ｆｅｔ）
TWI564940B (zh) 擴散尖端延伸電晶體裝置及其製造方法
US20240243131A1 (en) N/p-independently strained post-replacement metal gate (rmg) gate cut for performance enhanced finfet
US12575122B2 (en) Fin-based field effect transistor (FET) source/drain strain to enhance driver current and performance
US20250072105A1 (en) Vertical structure-based field effect transistor (fet) input/output device integration
HK1240397B (zh) 触点环绕结构

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20160706