CN105742152B - Inhibit the method for integrated passive devices quality factor drift - Google Patents
Inhibit the method for integrated passive devices quality factor drift Download PDFInfo
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- CN105742152B CN105742152B CN201410747733.1A CN201410747733A CN105742152B CN 105742152 B CN105742152 B CN 105742152B CN 201410747733 A CN201410747733 A CN 201410747733A CN 105742152 B CN105742152 B CN 105742152B
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Abstract
The present invention relates to a kind of to prevent the method that device quality factor occurs negatively to drift about in integrated passive devices.Including being implanted into the ion to substrate of predetermined-element, heat treating substrates, oxygen precipitation is precipitated in interstitial oxygen concentration among promoting substrate using ion, ion synchronizes the silica complex for being reacted with interstitial oxygen concentration and generating the element, take this to reduce the interstitial oxygen concentration in substrate, insulating layer is formed in substrate surface and prepares the integrated passive devices being located on insulating layer.
Description
Technical field
The present invention relates to field of semiconductor devices, more precisely, the present invention is intended to provide one kind is with resistor, electricity
The method for preventing device quality factor from occurring negatively to drift about in the integrated passive devices of sensor and capacitor.
Background technology
Passive device is widely used in the prior art, and especially passive device is essential in radio circuit, passive device
Or the circuit miniaturization with passive device is to assess one of the parameter index of radio-frequency technique, moreover, passive device is another
Performance parameter is quality factor (Quality-factor), it is however generally that, the quality factor of device is bigger, reflected
Performance usually just seems more excellent.
Discrete inductance and capacitance are usually made on pcb board in the prior art to realize matching, can be greatly reduced
Cost but the equipment trend that cannot be satisfied miniaturization, however this can occupy a large amount of area, especially these discrete devices can not
It is integrated to chip-scale.Terminal handheld device or base station equipment etc. may include one or more integrated circuits, these integrated electricity
Road may include analog circuit and digital circuit necessary to wireless communication, these substantial circuits may include inductor and electricity
Container.With the development for the technology for being used to form integrated circuit, the size of the active component (such as transistor) on integrated circuit
Constantly reduce.Relative to active component, the size of the passive element on integrated circuit is possible to not reduce, since it is desired that considering
Whether the quality factor of miniaturization passive device meets specification, and can the loss of input signal be limited at confidence band, therefore,
The integrated circuit formed with advanced technology may need to increase the area percentage of passive element on the integrated.In order to reduce
Production cost and save area, can on wafer integrated active component and passive device simultaneously.
In the RF IC of GHz ranks, inductance can used in chip embedded (on-chip) match circuit,
In the devices such as Passive filter device, inductive load, transformer, voltage-controlled oscillator (VCO).Most important one performance is exactly quality factor, shadow
Ring quality factor because being known as, it is necessary to consider the loss of the ohmic loss, substrate of wire coil, the parasitic capacitance of inductance.In mistake
In the development gone, it has been suggested that many high-quality-factor inductance, such as wire coil is manufactured using the metal layer of high conductivity, with
Reduce ohmic loss.Using multiple layer metal to increase the effective thickness of inductance, to reduce the base substrate loss of high frequency.Use low-loss
Base material, to reduce the base substrate loss of high frequency.Completely cut off floating inductance and substrate using thick oxide layer, to reduce base substrate loss
Deng.
It is negatively significantly changed the invention reside in the generation of device quality factor is reliably prevented in integrated passive devices
Preparation method provides the wafer scale integrated device of high-performance quality factor.
Invention content
In a kind of method of inhibition integrated passive devices quality factor drift of the present invention, include the following steps：It provides
Substrate with the first conduction type；It is implanted into the ion to substrate of a predetermined-element；Heat treating substrates are promoted using the ion
Oxygen precipitation is precipitated in interstitial oxygen concentration among making substrate, and the ion synchronizes the silica complex for being reacted with interstitial oxygen concentration and generating the element.
Take this to reduce the interstitial oxygen concentration in substrate；The substrate surface formed insulating layer and prepare be located at insulating layer it
On integrated passive devices；Interstitial oxygen concentration is wherein reduced, is mainly used for inhibiting integrated passive devices quality factor because of gap
The heated drift for diffusing into oxygen Thermal donor and inducing of oxygen.
Above-mentioned method, the first conduction type are p-type, reduce interstitial oxygen concentration for preparing integrated passive devices step
In, it avoids substrate carrier concentration from declining resistivity and rises, and prevent the original alms giver of substrate from being compensated and caused by oxygen Thermal donor
Substrate is transformed into the second conduction type of N-type via the first conduction type.
Above-mentioned method, the first conduction type are N-type, reduce interstitial oxygen concentration for preparing integrated passive devices step
In, it avoids substrate carrier concentration from increasing resistivity and declines.
Above-mentioned method, the heat treating substrates under the atmosphere for the gas that chemical property is stablized, the chemical property is steady
Fixed gas includes nitrogen and rare gas.
It is small to carry out 0~16 for above-mentioned method in the step of being heat-treated the substrate, including under 700~900 degrees celsius
When heat treatment process.
The above method, after the step of implementing implanting ions, but before the step of carrying out being heat-treated the substrate, with
RCA ablutions clean the substrate.
Above-mentioned method, the predetermined-element include carbon or germanium.
Above-mentioned method, the predetermined-element include implantation dosage 1014~1016The carbon ion of ions/cm3.
The present invention is in another embodiment, it is proposed that a method of inhibiting the drift of integrated passive devices quality factor,
Include the following steps：It provides with the first conduction type and with the substrate of steady resistance rate；It is implanted into the ion of a predetermined-element
Into substrate；Heat treating substrates promote among substrate interstitial oxygen concentration to be precipitated oxygen precipitation using the ion, the ion it is synchronous and
The reaction of gap oxygen generates the silica complex of the element, takes this to reduce the interstitial oxygen concentration in substrate.
Integrated passive devices are prepared, is included in the substrate surface and forms insulating layer and at least prepare on insulating layer
Inductor and capacitor；Wherein reduce interstitial oxygen concentration, for inhibit interstitial oxygen concentration in preparing integrated passive devices step by
The resistance substrate rate that thermal diffusion causes at oxygen Thermal donor changes, and ensures that the resistivity of substrate is stablized, and integrating passive device is avoided
Part quality factor is drifted about.
It is above-mentioned in preparing integrated passive devices step：When the first conduction type is p-type, reduces interstitial oxygen concentration and be used for
It avoids substrate carrier concentration from declining resistivity to rise, and prevents the original alms giver of substrate from being compensated by oxygen Thermal donor and causing substrate
It is transformed into the second conduction type of N-type via the first conduction type；Or when the first conduction type is N-type, reduce interstitial oxygen concentration
Concentration is for avoiding substrate carrier concentration from increasing and resistivity decline.
Description of the drawings
With reference to appended attached drawing, more fully to describe the embodiment of the present invention.However, appended attached drawing be merely to illustrate and
It illustrates, and is not meant to limit the scope of the invention.
Fig. 1 is the relation schematic diagram of the quality factor and resistance substrate rate of integrated passive devices.
Fig. 2 is the substrate rich in supersaturated interstitial oxygen concentration.
Fig. 3 is the method flow schematic diagram for inhibiting the resistivity of substrate to shift.
Fig. 4 is prepared on the cross-sectional view of the integrated passive devices on substrate.
Fig. 5 A are the floor map of inductor circular in integrated passive devices.
Fig. 5 B are the floor map of the inductor of square shape in integrated passive devices.
Specific implementation mode
Fig. 1, which illustrates preparation, the substrate of integrated passive devices (Integrated Passive Device, abbreviation IPD)
Resistivity and quality factor q, the signal frequency for inputting integrated passive devices generally correspond to relationship, wherein deliberately specifying integrated
The data that passive device measures under conditions of 1.5Ghz, spirit in order to better understand the present invention are being introduced in advance
Embodiment of the present invention is with the integrated passive devices structure that explaination obtains in detail and then further to data shown in FIG. 1
It is analyzed.
In fig. 2, substrate 100 be in order to prepare the substrate of integrated passive devices, in order to ensure integrated passive devices compared with
High-performance, especially quality factor meet specification, and in some embodiments, it is P-type substantially generally to require its substrate 100, and
Resistivity is more than 2K Ω/cm-1, therefore when making the wafer or substrate 100 of monocrystalline silicon, it needs to adulterate a certain amount of predetermined-element
To substrate 100, such as boron element is adulterated, can realize resistivity requirement expected from substrate 100 as acceptor.Semiconductor at present
Device manufacture is mostly to use pulling of silicon single crystal manufacturing process, and the crucible of growth Czochralski crystal silicon is quartz material, is generally also recognized
For various ways such as mechanical convection, free convections, SiO can be transferred to melt silicon face and vapor away, but still some
SiO is directly dissolved among silicon solution, is present in liquid silicon in the form of oxygen atom, is eventually entered into pulling of silicon single crystal, institute
It will be inevitably mixed into silicon crystal or say in silicon substrate 100, there are certain density interstitial oxygen concentration, (such as concentration is 1017cm-
3~1018Ions/cm3), be present in substrate 100 with supersaturated gap state, Fig. 2 is identified with interstitial oxygen concentration 105, it with surrounding two
A silicon atom is with Covalent bonding together.Although being illustrated by taking p-type as an example, in other optional embodiments, substrate 100 also may be used
For N-type substrate, this doping type for depending on substrate 100 is p-type dopant or N-type dopant.
If not taking any measure, the integrated passive devices of Fig. 4 are directly prepared by the substrate of Fig. 2, because of integrating passive
Device IPD undergoes many processing procedures, and during which substrate 100 needs to receive IPD processing step of the temperature at 300~550 DEG C, and concentration is higher
Interstitial oxygen concentration 105 will diffuse to form oxygen Thermal donor (Thermal Donor), the formation of oxygen Thermal donor compensates in substrate 100
Original boron acceptor, so that the resistivity of silicon substrate 100 is changed a lot, when our scheduled resistivity are limited in variation
When in amplitude range, it is undesired offset that the mistake amplitude of this resistivity, which becomes larger or becomes smaller all, is negative effect.One
Kind is explained, when substrate 100 is by being heat-treated, such as IPD preparatory phases, it will produce a large amount of alms giver, the load in P-type silicon single crystal
It flows sub- concentration to be reduced by compound, resistivity rises, and under the conditions of some limiting cases, P-type silicon single crystal can finally be transformed into N-type
Silicon single crystal.And for N-type silicon single crystal, carrier concentration therein increases, and resistivity declines.Although these variations of resistivity
Very little is negatively affected in certain ranges or brings the limited positive effect in part, however in the nothing of high-precision control resistivity
In the device of source, we remain desirable to the stabilization that the resistivity of substrate 100 can continue, it is believed that any uncontrollable fluctuation is all
It is not receivable.
In figure 3, and it is indirect prepare passive device on substrates 100 of the Fig. 2 rich in supersaturated interstitial oxygen concentration 105, and
It is first to be implanted into the ion to substrate 100 of some scheduled elements (such as carbon, germanium etc.), subsequently heat-treated substrate 100 utilizes plant
Oxygen precipitation is precipitated in interstitial oxygen concentration 105 among the ion entered promotes substrate, and the ion synchronization of implantation is reacted with interstitial oxygen concentration 105 generates this yuan
The silica complex of element takes this concentration for reducing the supersaturated interstitial oxygen concentration 105 in substrate 100.By Fig. 3 for than Fig. 2, it is possible to find
After Overheating Treatment, the concentration of 100 internal clearance oxygen 105 of substrate substantially reduces, and while interstitial oxygen concentration 105 is consumed, forms
A large amount of oxygen precipitation 107, and the silica complex 108 of the element is generated, and also there is the substitutional impurity 106 of predetermined-element to deposit
It is in substrate 100, substitutional impurity 106 cannot bring any unfavorable effect certainly, if injection is carbon, silica complex
108 will be carbon-silicon-oxygen complex, such as can be presented as C-Si4-On (n values 1~12), and substitutional impurity 106 is exactly gap
The displacement carbon of oxygen 105.In figure 3, after above-mentioned heat treatment, a large amount of interstitial oxygen concentrations in silicon substrate 100 are generated as C-O complexs
And oxygen precipitation, and their stability is preferable, and interstitial oxygen concentration greatly reduces.It is important that with oxygen Thermal donor
Difference, C-O complexs and the not subsidiary electric property of oxygen precipitation, have little effect the carrier concentration in monocrystalline silicon,
Follow-up IPD device making technics are carried out, thus step, is difficult that can form oxygen heat in 300~500 DEG C of temperature ranges again to apply in substrate
It is main, never avoid the case where device manufacture back substrate resistivity is substantially change.
Ion in substrate 100 is implanted in there are many selection, is typically chosen the element of the IVth race, ion implanting should will not
Induce one extraneous electronics or hole, i.e., will not cause substrate 100 resistivity generate variation.In addition the element can be utilized
As the heterogeneous core of oxygen precipitation, promote the generation of oxygen precipitation, which participates in the Review On The Nucleation Mechanism of oxygen precipitation, can also play catalyst
Effect.Preferably, when selecting atmosphere, the heat treating substrates preferably under the atmosphere for the gas that chemical property is stablized
100, the gas that chemical property is stablized includes single-row nitrogen N2Equal stabilizing gas, can naturally also select the 18th race's rare gas
That is helium He, neon Ne, argon Ar, krypton Kr, xenon Xe and radon Rn (being sometimes also referred to as inert gas).Preferably, in some optional realities
It applies in example, by monocrystalline substrate 100 under conditions of low temperature or room temperature, carries out the injection of predetermined-element such as carbon ion etc., injection
Temperature is preferably controlled in step at 0~30 degree Celsius, this be one be easily implemented without the low temperature for bringing excessive cost or
The temperature of normality, and the implantation dosage of predetermined-element then can preferably be chosen at 1014~1016ions/cm3.As optional
Mode, the heat treatment of substrate 100 are included in the heat treatment process carried out under 700~900 degrees celsius 0~16 hour.One
In a little alternative embodiments, after the ion implanting for carrying out predetermined-element, RCA cleanings first is implemented to substrate 100, just execute heat thereafter
Processing, N is passed through into boiler tube2Or Ar, temperature rise to 700~900 DEG C, the substrate 100 after cleaning, which is sent into boiler tube, carries out 0-16h
Heat treatment, taken out after furnace cooling.
RCA ablutions are to be initiated in the laboratories RCA of N.J.Princeton by Kern and Puotinen et al. nineteen sixty-five,
And gain the name therefrom, the specific steps that substrate 100 is cleaned with RCA repeat no more, but only it is emphasized that the cleaning of RCA
In step, many benefits can be brought, such as are dissolved in cleaning solution after metal is aoxidized, and the stained oxidation such as organic matter can be generated
CO2 and H2O, etc., this is and its advantageous to this case.
As shown in figure 4, the conventional IPD processes that this field tool notice Chang Shizhe all understands are omitted in the present invention, but answer
The understanding, IPD processing procedures process will inevitably undergo 300~500 DEG C of temperature range.For example, first in the upper table of substrate 100
Face prepares an insulating layer 115, and such as oxide layer, although Zone R, the areas C in schema 4, the areas L are separated, it should be recognized that R
Area, the areas C, the areas L are substantially the different subregions in a common substrate 100, so insulating layer 115 is covered in Zone R, the areas C, the areas L
In each area substrate 100 top surface.The film resistor having above insulating layer 11 is prepared on a Zone R of substrate 100
Device 111, for example, doping polysilicon, a dielectric isolation layer 116a is coated on thin film resistor 111 and is coated on resistor
Near 111 not by resistor 111 cover and on exposed insulating layer 115, offered in dielectric isolation layer 116a opening with
For resistance terminal 1110 to be arranged, the contact terminal as resistor 111 and external circuit.
Being prepared in one area C of substrate 100 has thin film capacitor 112, the bottom capacitor substrate 112a of capacitor 112 to be located at
, there are one dielectric isolation layer 116b of setting, dielectric isolation layer 116b packets in 115 top of insulating layer above bottom capacitor substrate 112a
Overlay on bottom capacitor substrate 112a and be coated on not covered by bottom capacitor substrate 112a near bottom capacitor substrate 112a
Firmly on exposed insulating layer 115.There are one the tops that size is less than bottom capacitor substrate 112a above dielectric isolation layer 116b
Portion capacity substrate 112b, it is overlapping with a part of region of bottom capacitor substrate 112a, therefore dielectric isolation layer 116b and top, bottom
Capacitor 112 is formed between portion's capacitor plate.Bottom capacitor substrate 112a is laterally extended below bottom capacitor substrate 112a
Opening is offered in dielectric isolation layer 116b on a part out, capacitor terminal 1120 is arranged, as bottom capacitor
The contact terminal of pole plate 112a and external circuit.
Being prepared in one area L of substrate 100 has thin film inductor 113, helical inductor device 113 only to illustrate from Fig. 4
Its vertical section is gone out, but can learn the concrete structure of inductor 113 from Fig. 5 A~5B, such as the inductor 113 in the areas L can
To be sections of Fig. 5 A along dotted line EE.From the inductor 113 of vertical view, inductor 113 can be made as round or oval
The spiral inductor (such as Fig. 5 A) or rectangular spiral inductor (such as Fig. 5 B) of shape, other are not illustrated in figure in fact
The polygons such as the hexagon, the octagon that go out all can serve as the structure of spiral inductor.Dielectric isolation layer 116c is arranged in inductance
On device 113, and not covered by inductor 113 of being arranged near inductor 113 and on exposed insulating layer 115, terminal
Lead-out mode be substantially the same with resistance capacitance, repeat no more.Usually also have other passivation layers for example polyimides covering insulation every
Absciss layer, in Zone R, the areas C, the resistor of the areas L protection integrated passive devices IPD, inductor and capacitor.
With the micromation of semiconductor devices, IPD sizes can constantly reduce, the integrated passive devices on support substrate
The problem of reciprocal influence gradually shows intractable trend between IPD, and interface is easy between substrate 100 and insulating layer 115
Charge accumulated occurs, storing the field effect of charge had not only influenced substrate self-characteristic but also influenced the characteristic of IPD passive devices.One
In the case of a little, the charge of this accumulation to a certain extent when, silicon substrate just forms quasi-metal oxides semiconductor MOS structure, this
Kind MOS structure plays the role of the series capacitor of 112 additional of capacitor, to reduce script predetermined capacitive device 112 certainly
The performance of body.In some cases, when substrate carrier concentration is very low, this surface charge storage effect when resistivity is higher
Or substrate surface inversion layer is more apparent, stored charge reduces substrate effective impedance and the quality factor of inductor 113 also can
Decline.If resistivity is unstable, the performance of its top IPD device will be damaged.Although in some embodiments, inductor 113
Quality factor depend on substrate 100 resistivity, 100 resistance of substrate is slightly higher in a degree of amplitude, the quality of inductance
Factor Q is bigger, and inductance performance is better, and especially under the high frequency condition of input signal, inhibiting 100 resistivity of substrate to reduce can be with
Improve Q values, certain aspects of the invention can be adapted for this point, but resistivity expected from stable substrate 100 is more important, can not
Drift occurs for the resistivity or Q values of control or changes trend to be all that we are undesired.
The important indicator of evaluation IPD inductors performance quality is quality factor q, and the association in IPD of quality factor q is fixed
Justice is embodied in：The ratio of the energy and each concussion cycle loss energy that are stored in inductor.Quality factor q is higher, inductor
Efficiency it is higher.In IPD influence quality factor q because being known as：Make the ohmic loss of inductance wire coil, inductor is posted
The loss of raw capacitance and substrate.In low-frequency range, the performance of inductor is mainly by the characteristic of the helical wire of formation inductor
To determine (mainly metal loss)；In high band, substrate loss will be as the principal element of decision inductor performance.Substrate pair
The influence of inductor performance is derived mainly from substrate unit-area capacitance CsubWith unit area conductance Gsub, and the doping of substrate material
Characteristic is then to influence CsubAnd GsubThe main cause of size.Under identical frequency, electromagnetic wave can be with lining for the penetration depth of substrate
The increase of bottom conductivity and become larger.In the case where conductivity is larger, this variation is obvious, to cause the height of substrate
Frequency loss increases.Sometimes, in higher frequency band, in the case of conductivity is larger, some main causes that Q values may be smaller.Cause
This, according to spirit of that invention, steady resistance rate is just particularly important.
Referring again to Fig. 1, abscissa X parameter is frequency (Ghz), and ordinate Y parameter is quality factor q.When frequency tends to
When rising to 1.5GHZ from 0, for curve A, the Q values of curve A are to rise, about Q=45 and frequency is 1.5Ghz
When, the unit resistance rate of substrate P is essentially equal to 1500ohm.cm, and curve A has the peak value M3 of its own peak, and frequency is again
More than the frequency of peak value M3, quality factor q is to decline in fact.For curve B, about Q=41 and frequency are 1.5Ghz
When, the unit resistance rate of substrate P is essentially equal to 1000ohm.cm, and curve B has the peak value M1 of its own peak, works as frequency
Tend to from 0 rise to 1.3GHZ or so when, the Q values of curve B are to rise, but frequency is more than the frequency of peak value M1, quality again
Factor Q is to decline in fact.For curve C, when about Q=31 and frequency are 1.5Ghz, the unit resistance rate of substrate P is big
It is equal to 500ohm.cm on body, curve C has the peak value M2 of its own peak, when frequency tends to rise to 1.5GHZ or so from 0
When, the Q values of curve C are to rise, but frequency is more than the frequency of peak value M2 again, and quality factor q is to decline in fact.Work as substrate
When selecting a certain doping concentration or having expected resistivity, as long as the steady resistance rate in IPD techniques, quality factor is can be big
Management and control is caused, such as maintains peak value.
More than, by description and accompanying drawings, give the exemplary embodiments of the specific structure of specific implementation mode, foregoing invention
Existing preferred embodiment is proposed, but these contents are not intended as limiting to.For a person skilled in the art, in reading
State it is bright after, various changes and modifications undoubtedly will be evident.Therefore, appended claims, which should be regarded as, covers the present invention
True intention and range whole variations and modifications.In Claims scope the range of any and all equivalences with it is interior
Hold, is all considered as still belonging to the intent and scope of the invention.
Claims (10)
1. a kind of method inhibiting the drift of integrated passive devices quality factor, which is characterized in that include the following steps：
Substrate with the first conduction type is provided；
It is implanted into the ion to substrate of a predetermined-element；
Heat treating substrates, oxygen precipitation, the ion synchronization and interstitial oxygen concentration is precipitated in interstitial oxygen concentration among promoting substrate using the ion
Reaction generates the silica complex of the element, takes this to reduce the interstitial oxygen concentration in substrate；
Insulating layer is formed in the substrate surface and prepares the integrated passive devices being located on insulating layer；
It wherein reduces interstitial oxygen concentration and is used to inhibit the heated integrated passive devices product for diffusing into oxygen Thermal donor and inducing of interstitial oxygen concentration
The drift that prime factor occurs.
2. the method as described in claim 1, which is characterized in that the first conduction type is p-type, reduces interstitial oxygen concentration and is used for
It prepares in integrated passive devices step, avoids substrate carrier concentration from declining resistivity and rise, and prevent the original alms giver of substrate
By the second conduction type that oxygen Thermal donor compensates and substrate is caused to be transformed into via the first conduction type N-type.
3. the method as described in claim 1, which is characterized in that the first conduction type is N-type, reduces interstitial oxygen concentration and is used for
It prepares in integrated passive devices step, avoids substrate carrier concentration from increasing resistivity and decline.
4. the method as described in claim 1, which is characterized in that be heat-treated under the atmosphere for the gas that chemical property is stablized
Substrate, the gas that the chemical property is stablized includes nitrogen and rare gas.
5. the method as described in claim 1, which is characterized in that in the step of being heat-treated the substrate, including 700~900 take the photograph
0~16 hour heat treatment process is carried out under the conditions of family name's degree.
6. the method as described in claim 1, which is characterized in that after implanting ions, but before being heat-treated the substrate, with
RCA ablutions clean the substrate.
7. the method as described in claim 1, which is characterized in that the predetermined-element includes carbon or germanium.
8. the method for claim 7, which is characterized in that the predetermined-element includes implantation dosage 1014~
1016ions/cm3Carbon ion.
9. a kind of method inhibiting the drift of integrated passive devices quality factor, which is characterized in that include the following steps：
It provides with the first conduction type and with the substrate of steady resistance rate；
It is implanted into the ion to substrate of a predetermined-element；
Heat treating substrates, oxygen precipitation, the ion synchronization and interstitial oxygen concentration is precipitated in interstitial oxygen concentration among promoting substrate using the ion
Reaction generates the silica complex of the element, takes this to reduce the interstitial oxygen concentration in substrate；
Integrated passive devices are prepared, is included in the substrate surface and forms insulating layer and at least prepare the electricity on insulating layer
Sensor and capacitor；
Interstitial oxygen concentration is wherein reduced to diffuse into oxygen heat for inhibiting interstitial oxygen concentration to be heated in preparing integrated passive devices step and apply
Resistance substrate rate that is main and causing changes, to ensure that the resistivity stabilization of substrate avoids integrated passive devices quality factor from occurring
Drift.
10. method as claimed in claim 9, which is characterized in that in preparing integrated passive devices step：
When the first conduction type is p-type, reduces interstitial oxygen concentration and rises for avoiding substrate carrier concentration from declining resistivity,
Substrate is caused to be led via second that the first conduction type is transformed into N-type with preventing the original alms giver of substrate from being compensated by oxygen Thermal donor
Electric type；Or
When the first conduction type is N-type, interstitial oxygen concentration is reduced for avoiding substrate carrier concentration from increasing and under resistivity
Drop.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US5286658A (en) * | 1991-03-05 | 1994-02-15 | Fujitsu Limited | Process for producing semiconductor device |
| CN102396055A (en) * | 2009-04-13 | 2012-03-28 | 信越半导体股份有限公司 | Anneal wafer, method for manufacturing anneal wafer, and method for manufacturing device |
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| KR20090060499A (en) * | 2007-12-10 | 2009-06-15 | 주식회사 실트론 | Method of fabricating high resistivity silicon wafer using heat treatment |
| US20110049664A1 (en) * | 2009-09-01 | 2011-03-03 | Sumco Corporation | Epitaxial substrate for back-illuminated image sensor and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5286658A (en) * | 1991-03-05 | 1994-02-15 | Fujitsu Limited | Process for producing semiconductor device |
| CN102396055A (en) * | 2009-04-13 | 2012-03-28 | 信越半导体股份有限公司 | Anneal wafer, method for manufacturing anneal wafer, and method for manufacturing device |
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