CN105718384A - Cache configuration method and device - Google Patents
Cache configuration method and device Download PDFInfo
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- CN105718384A CN105718384A CN201410734993.5A CN201410734993A CN105718384A CN 105718384 A CN105718384 A CN 105718384A CN 201410734993 A CN201410734993 A CN 201410734993A CN 105718384 A CN105718384 A CN 105718384A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
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Abstract
The invention provides a cache configuration method and device. The method comprises the following steps: when that a downstream chip transmits a stream control signal to an upstream chip is monitored, acquiring a data volume on a data link within a time interval from a current moment to a moment at which the upstream chip stops transmitting data, wherein the stream control signal is used for instructing the upstream chip to stop transmitting data; and configuring a cache of the downstream chip according to the data volume. Through adoption of the cache configuration method and device, the problem of how to configure a proper cache for the downstream chip in time when a data flow model changes in the prior art is solved, and an effect of adjusting a cache capacity in time can be further achieved.
Description
Technical field
The present invention relates to the communications field, in particular to collocation method and the device of a kind of buffer memory.
Background technology
In recent years, large-scale application along with integrated circuit, and the data throughout of interconnection is increasing between chip, between chip except data interaction, also have the mutual of control signal, when data traffic model changes, be usually associated with certain bursts of traffic situation, now downstream chip often upstream chip send flow control signal, upstream chip needs to go to judge whether to continue to send data toward downstream chip according to this flow control signal.
Increasing now with data throughout, when there is bursts of traffic, the instantaneous peak value of flow is also very big, when downstream chip sends flow control signal, now upstream chip needs a response time, but stability and the vigorousness for system, it is necessary to the data in data link were all stored by downstream chip buffer memory upstream chip before response flow control signal stops sending data, it is impossible to the situation of cache overflow occurs.
More and more higher however as integrated degree, chip volume is also more and more less, internal buffer memory also more seems precious, for in correlation technique when data traffic model changes, the problem how configuring suitable buffer memory timely to downstream chip, not yet proposes effective solution at present.
Summary of the invention
Present invention is primarily targeted at collocation method and device that a kind of buffer memory is provided, at least to solve in correlation technique when data traffic model changes, the problem how to configure suitable buffer memory to downstream chip timely.
According to an aspect of the present invention, provide the collocation method of a kind of buffer memory, including: when monitoring downstream chip upstream chip sending flow control signal, obtain the data volume data link in the time period stopping sending data from current time to described upstream chip, wherein, described flow control signal is used for indicating described upstream chip to stop sending data；The buffer memory of described downstream chip is configured according to described data volume.
Further, the data volume obtained in the time period stopping sending data from current time to described upstream chip data link includes: calculate described data volume according to the bandwidth meter of described time period and described data link.
Further, the producing method of described flow control signal includes: has in bursts of traffic situation at described upstream chip and triggers the described downstream chip described flow control signal of generation, or simulation produces the flow control signal of one or more types.
Further, include according to the buffer memory of the described data volume described downstream chip of configuration: obtain the type of flow control signal；
Store the corresponding relation of described type and described data volume；Determine the data volume corresponding with described type according to described corresponding relation, configure the buffer memory of described downstream chip according to the described data volume determined.
Further, include according to the buffer memory of the described data volume described downstream chip of configuration: configure the buffer memory of described downstream chip according to the described data volume of real-time statistics.
According to another aspect of the present invention, provide the configuration device of a kind of buffer memory, including: acquisition module, for when monitoring downstream chip upstream chip sending flow control signal, the data volume obtained in the time period stopping sending data from current time to described upstream chip data link and the type information of described flow control signal, wherein, described flow control signal is used for indicating described upstream chip to stop sending data；Configuration module, for configuring the buffer memory of described downstream chip according to described data volume.
Further, described acquisition module is additionally operable to, and calculates described data volume according to the bandwidth meter of described time period and described data link.
Further, the producing method of described flow control signal includes: has in bursts of traffic situation at described upstream chip and triggers the described downstream chip described flow control signal of generation, or simulation produces the flow control signal of one or more types.
Further, described configuration module includes: acquiring unit, for obtaining the type of flow control signal；Memory element, for storing the corresponding relation of described type and described data volume；First dispensing unit, for determining the data volume corresponding with described type according to described corresponding relation, configures the buffer memory of described downstream chip according to the described data volume determined.
Further, described configuration module includes: the second dispensing unit, for configuring the buffer memory of described downstream chip according to the described data volume of real-time statistics.
Pass through the present invention, adopt when monitoring downstream chip upstream chip sending flow control signal, after the data volume obtained in the time period stopping sending data from current time to upstream chip in data link and the type information of flow control signal, the mode of the buffer memory of downstream chip is configured according to this data volume, solve in correlation technique when data traffic model changes, the problem how configuring suitable buffer memory timely to downstream chip, and then can reach to regulate in time the effect of buffer memory capacity.
Accompanying drawing explanation
Accompanying drawing described herein is used for providing a further understanding of the present invention, constitutes the part of the application, and the schematic description and description of the present invention is used for explaining the present invention, is not intended that inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 is the collocation method flow chart of buffer memory according to embodiments of the present invention；
Fig. 2 is the configuration apparatus structure block diagram of buffer memory according to embodiments of the present invention；
Fig. 3 is the optional structured flowchart one of configuration device of buffer memory according to embodiments of the present invention；
Fig. 4 is the optional structured flowchart two of configuration device of buffer memory according to embodiments of the present invention；
Fig. 5 is the structural representation of the measurement apparatus according to alternative embodiment of the present invention；
Fig. 6 is the flow chart of the measuring method according to alternative embodiment of the present invention.
Detailed description of the invention
Below with reference to accompanying drawing and describe the present invention in detail in conjunction with the embodiments.It should be noted that when not conflicting, the embodiment in the application and the feature in embodiment can be mutually combined.
Providing the collocation method of a kind of buffer memory in the present embodiment, Fig. 1 is the collocation method flow chart of buffer memory according to embodiments of the present invention, as it is shown in figure 1, this flow process comprises the steps:
Step S102: when monitoring downstream chip upstream chip sending flow control signal, the data volume obtained in the time period stopping sending data from current time to upstream chip in data link and the type information of flow control signal；
Wherein, flow control signal is used for indicating upstream chip to stop sending data；
Step S104: according to the buffer memory of data volume configuration downstream chip.
Pass through the present embodiment, adopt when monitoring downstream chip upstream chip sending flow control signal, after the data volume obtained in the time period stopping sending data from current time to upstream chip in data link and the type information of flow control signal, the mode of the buffer memory of downstream chip is configured according to this data volume, solve in correlation technique when data traffic model changes, the problem how configuring suitable buffer memory timely to downstream chip, and then can reach to regulate in time the effect of buffer memory capacity.
Mode for the data volume in data link in the acquisition time period that stopping sends data from current time to upstream chip that the present embodiment relates to has multiple, in an optional embodiment of the present embodiment, it is accomplished by this data statistics of variables, which is: calculate data volume according to the bandwidth meter of time period and data link, wherein, the current time related in the present embodiment refers to downstream chip and produces the moment of flow control signal.
In an optional embodiment of the present embodiment, the producing method of this flow control signal can include and two ways；
Mode one: have trigger downstream chip in bursts of traffic situation to produce flow control signal at upstream chip；
Mode two: simulation produces the flow control signal of one or more types.
The mode of the buffer memory of the foundation data volume configuration downstream chip related in the present embodiment can be realized by following two example:
Example one
Which comprises the steps:
Step S11: obtain the type of flow control signal；
Step S12: the corresponding relation of storage class and data volume；
Step S13: determine the data volume corresponding with type according to corresponding relation, configures the buffer memory of downstream chip according to determining amount of data.
Example two
Which is based on the buffer memory of real time data amount configuration downstream chip.
Additionally providing the configuration device of a kind of buffer memory in the present embodiment, this device is used for realizing above-described embodiment and preferred implementation, has be carried out repeating no more of explanation.As used below, term " module " " unit " can realize the software of predetermined function and/or the combination of hardware.Although the device described by following example preferably realizes with software, but hardware, or the realization of the combination of software and hardware is also likely to and is contemplated.
Fig. 2 is the configuration apparatus structure block diagram of buffer memory according to embodiments of the present invention, as shown in Figure 2, this device includes: acquisition module 22, for when monitoring downstream chip upstream chip sending flow control signal, the data volume obtained in the time period stopping sending data from current time to upstream chip in data link and the type information of flow control signal, wherein, flow control signal is used for indicating upstream chip to stop sending data；Configuration module 24 is of coupled connections with acquisition module 22, for the buffer memory according to data volume configuration downstream chip.
Alternatively, the acquisition module 22 in the present embodiment can be also used for calculating data volume according to the bandwidth meter of time period and data link.
Alternatively, the producing method of flow control signal includes: have trigger downstream chip in bursts of traffic situation to produce flow control signal at upstream chip, or simulation produces the flow control signal of one or more types.
Fig. 3 is the optional structured flowchart one of configuration device of buffer memory according to embodiments of the present invention, as it is shown on figure 3, this configuration module 24 includes: acquiring unit 32, for obtaining the type of flow control signal；Memory element 34 and acquiring unit 32 are of coupled connections, for the corresponding relation of storage class Yu data volume；First dispensing unit 36 is of coupled connections with memory element 34, for determining the data volume corresponding with type according to corresponding relation, configures the buffer memory of downstream chip according to determining amount of data.
Fig. 4 is the optional structured flowchart two of configuration device of buffer memory according to embodiments of the present invention, and as shown in Figure 4, configuration module 24 includes: the second dispensing unit 42, for the buffer memory of the data volume configuration downstream chip according to real-time statistics.
Below in conjunction with optional embodiment of the present invention, the present invention is illustrated；
Fig. 5 is the structural representation of the measurement apparatus according to alternative embodiment of the present invention, as it is shown in figure 5, this device includes: stream control generation module 52, traffic statistics module 54, timer module 56, buffer memory dynamic configuration module 58；
Wherein, stream control generation module 52, for having bursts of traffic at upstream chip so that when downstream chip buffer memory reaches the upper limit, upstream chip sends flow control signal；Additionally, stream control occurs module 52 can be also used for, situation that simulated cache is full and then send flow control signal；
Traffic statistics module 54, for starting the data volume on statistical data link, until detecting upstream chip to stop data transmission after sending flow control signal；
Timer module 56, for stream control be issued to upstream chip stop send data during this period of time in accurate count required time, ordinary circumstance is nanosecond, with received data volume, unit is byte or bit, wherein, this timer module 56 used chip inner high speed clock is as source clock；
Buffer memory dynamic configuration module 58, for chip internal buffer memory dynamically being distributed according to the stream control response time measured in real time, user can also configure the flow control signal producing various simulations, the dynamic configuration of this chip internal cache size according to measurement result, can be completed after completing a certain discharge model and measuring simultaneously.
As can be seen here, this alternative embodiment does not need the other plug-in independent measurement apparatus of downstream chip, can be achieved with at chip internal, does not increase the extra resource of chip internal simultaneously.And the device of this alternative embodiment to realize method simple, it is possible to simulation produces various flow control signal, and certainty of measurement is high；Additionally, this device can dynamically adjust cache size according to measurement result, every kind of recordable preservation of measurement result, foundation and reference are provided for later relevant design, time saving and energy saving, improve design efficiency.
Therefore, this alternative embodiment goes to produce various types of flow control signal by configuring internal simulation device device, thus the stream control response situation under the various flows reached in simulation practical application, and the dynamic distribution of inner buffer, namely need not accomplish to travel through the stream control response under each model by actual current test of sending out, can reach to improve the purpose of Buffer Utilization, solve in correlation technique when data traffic model changes, the problem how to configure suitable buffer memory to downstream chip timely.
Fig. 6 is the flow chart of the measuring method according to alternative embodiment of the present invention, and as shown in Figure 6, the method comprises the steps:
Step S602: monitoring buffer memory situation in real time, it is determined whether send stream control；If sending execution step S604, otherwise still perform step S602；
Step S604: stream control occurs module to send flow control signal, starts traffic statistics module and timer module；
Wherein, flow control signal can be actual flow control signal, it is also possible to be the flow control signal of simulation；
Step S606: traffic statistics module starts to add up the data volume on the link that now can also receive, and intervalometer starts counting up, and starts to add up the response time of upstream chip.
Step S608: after completing measurement, output result is to buffer memory dynamic configuration module, and this module provides the dynamic distribution information of buffer memory according to the result measured in real time.
By alternative embodiment of the present invention, there is the field having stream control mutual between the chip interconnection of burst at big data throughout and flow, it is possible to quickly obtain the upstream chip stream control response time under every kind of discharge model, to reach dynamically to distribute the purpose of cache size.
These are only optional embodiment of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.All within the spirit and principles in the present invention, any amendment of making, equivalent replacement, improvement etc., should be included within protection scope of the present invention.
Claims (10)
1. the collocation method of a buffer memory, it is characterised in that including:
When monitoring downstream chip upstream chip sending flow control signal, obtaining the data volume data link in the time period stopping sending data from current time to described upstream chip, wherein, described flow control signal is used for indicating described upstream chip to stop sending data；
The buffer memory of described downstream chip is configured according to described data volume.
2. method according to claim 1, it is characterised in that the data volume obtained in the time period stopping sending data from current time to described upstream chip data link includes:
Described data volume is calculated according to the bandwidth meter of described time period and described data link.
3. method according to claim 1, it is characterised in that the producing method of described flow control signal includes:
Have in bursts of traffic situation at described upstream chip and trigger the described downstream chip described flow control signal of generation, or simulation produces the flow control signal of one or more types.
4. method according to claim 1, it is characterised in that the buffer memory configuring described downstream chip according to described data volume includes:
Obtain the type of flow control signal；
Store the corresponding relation of described type and described data volume；
Determine the data volume corresponding with described type according to described corresponding relation, configure the buffer memory of described downstream chip according to the described data volume determined.
5. method according to claim 1, it is characterised in that the buffer memory configuring described downstream chip according to described data volume includes:
The buffer memory of described downstream chip is configured according to the described data volume of real-time statistics.
6. the configuration device of a buffer memory, it is characterised in that including:
Acquisition module, for when monitoring downstream chip upstream chip sending flow control signal, the data volume obtained in the time period stopping sending data from current time to described upstream chip data link and the type information of described flow control signal, wherein, described flow control signal is used for indicating described upstream chip to stop sending data；
Configuration module, for configuring the buffer memory of described downstream chip according to described data volume.
7. device according to claim 6, it is characterised in that described acquisition module is additionally operable to, calculates described data volume according to the bandwidth meter of described time period and described data link.
8. device according to claim 6, it is characterised in that the producing method of described flow control signal includes:
Have in bursts of traffic situation at described upstream chip and trigger the described downstream chip described flow control signal of generation, or simulation produces the flow control signal of one or more types.
9. device according to claim 8, it is characterised in that described configuration module includes:
Acquiring unit, for obtaining the type of flow control signal；
Memory element, for storing the corresponding relation of described type and described data volume；
First dispensing unit, for determining the data volume corresponding with described type according to described corresponding relation, configures the buffer memory of described downstream chip according to the described data volume determined.
10. device according to claim 6, it is characterised in that described configuration module includes:
Second dispensing unit, for configuring the buffer memory of described downstream chip according to the described data volume of real-time statistics.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410734993.5A CN105718384A (en) | 2014-12-05 | 2014-12-05 | Cache configuration method and device |
| PCT/CN2015/081494 WO2016086641A1 (en) | 2014-12-05 | 2015-06-15 | Cache configuration method and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410734993.5A CN105718384A (en) | 2014-12-05 | 2014-12-05 | Cache configuration method and device |
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| CN105718384A true CN105718384A (en) | 2016-06-29 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201410734993.5A Withdrawn CN105718384A (en) | 2014-12-05 | 2014-12-05 | Cache configuration method and device |
Country Status (2)
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| CN (1) | CN105718384A (en) |
| WO (1) | WO2016086641A1 (en) |
Cited By (3)
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| CN108694241A (en) * | 2018-05-14 | 2018-10-23 | 平安科技（深圳）有限公司 | A kind of storage method and equipment of data |
| CN109408412A (en) * | 2018-10-24 | 2019-03-01 | 龙芯中科技术有限公司 | Memory prefetching control method, device and equipment |
| CN112083890A (en) * | 2020-09-16 | 2020-12-15 | 上德(珠海)数据科技有限公司 | Data processing method for automatically adjusting cache, data processing system, data visualization equipment and computer readable storage medium |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109302353B (en) * | 2017-07-24 | 2022-03-25 | 深圳市中兴微电子技术有限公司 | Method and device for distributing message cache space |
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| WO2016086641A1 (en) | 2016-06-09 |
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Application publication date: 20160629 |