CN105681699A - Control method and device of LVDS (Low-Voltage Differential Signaling) data clock of liquid crystal display television - Google Patents
Control method and device of LVDS (Low-Voltage Differential Signaling) data clock of liquid crystal display television Download PDFInfo
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- CN105681699A CN105681699A CN201610028044.4A CN201610028044A CN105681699A CN 105681699 A CN105681699 A CN 105681699A CN 201610028044 A CN201610028044 A CN 201610028044A CN 105681699 A CN105681699 A CN 105681699A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/422—Input-only peripherals, i.e. input devices connected to specially adapted client devices, e.g. global positioning system [GPS]
- H04N21/42204—User interfaces specially adapted for controlling a client device through a remote control device; Remote control devices therefor
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N17/00—Diagnosis, testing or measuring for television systems or their details
- H04N17/004—Diagnosis, testing or measuring for television systems or their details for digital television systems
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/14—Use of low voltage differential signaling [LVDS] for display data communication
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N17/00—Diagnosis, testing or measuring for television systems or their details
- H04N2017/008—Diagnosis, testing or measuring for television systems or their details for television teletext
Abstract
The invention relates to the technical field of a liquid crystal display television, provides a control method and device of an LVDS data clock of the liquid crystal display television. The method and the device are used for solving the problem of abnormal image display resulted from too high or too low LVDS data clock frequency. The device comprises an initializing module, a clock analyzing module, a clock frequency control module and a liquid crystal display interface. According to the technical solution provided by the invention, the signal receiving sequence is accurate; the image analysis is normal; and the problem of abnormal image display resulted from the too high or too low LVDS data clock frequency is solved.
Description
Technical field
The present invention relates to liquid crystal tv technology field, particularly a kind of LCD TV LVDS data clockControl method and device.
Background technology
Low-voltage differential signal LVDS (Low-VoltageDifferentialSignaling) is LCD TVA kind of general-purpose interface signal, it comprises data, control signal and clock signal.
Liquid crystal display logic card is resolved data-signal by LVDS data clock, and data-signal is changedFor the control signal of controlling liquid crystal molecule opening degree is to show image. But LVDS data clock frequency is too highOr the too low screen liquid crystal molecule folding sequential confusion that all can cause, image shows abnormal.
Summary of the invention
[technical problem that will solve]
The object of this invention is to provide a kind of control method and device of LCD TV LVDS data clock, withSolve the too high or too low image causing of LVDS data clock frequency and show abnormal problem.
[technical scheme]
The present invention is achieved by the following technical solutions.
First the present invention relates to a kind of control method of LCD TV LVDS data clock, comprising:
In the time that LCD TV movement initializes by initialization module arrange LVDS data clock frequency range andHtotal value, described Htotal value is the every row sum of all pixels of liquid crystal display;
Clock parsing module obtains the LVDS data clock frequency of present image signal, and will getLVDS data clock frequency is sent to clock frequency control module;
Clock frequency control module judges whether the LVDS data clock frequency receiving establishes at initialization moduleIn the LVDS data clock signal frequency range of putting, if it is LVDS data clock frequency is exported toLCD Interface, on the contrary the default Htotal value of field frequency value, initialization module of present image signal usedReplacement LVDS data clock frequency, adjusts Vtotal value until LVDS data clock frequency falls into defaultLVDS data clock frequency range, total line number that described Vtotal value is liquid crystal display.
As one preferred embodiment, the LVDS data clock frequency model that described initialization module arrangesThe lower limit of enclosing calculates by following formula:
Lower limit=Htotal representative value × Vtotal representative value × (the typical case of LVDS data clock frequency rangeFrequently value-2),
The higher limit of the LVDS data clock frequency range of described initialization module setting calculates by following formulaArrive:
Higher limit=Htotal representative value × Vtotal representative value × (typical case of LVDS data clock frequency rangeField frequency value+2),
Wherein Htotal representative value, Vtotal representative value all arrange by liquid crystal display specifications.
As another preferred embodiment, described typical field frequency value is 60.
As another preferred embodiment, the Htotal value that described initialization module arranges is Htotal allusion quotationOffset, described Htotal representative value arranges by liquid crystal display specifications.
The invention still further relates to a kind of control device of LCD TV LVDS data clock, comprise initialization module,Clock parsing module, clock frequency control module and LCD Interface,
Described initialization module is configured to: movement initialize arrange LVDS data clock frequency range andHtotal value, described Htotal value is the every row sum of all pixels of liquid crystal display;
Described clock parsing module is configured to: obtain the LVDS data clock frequency of present image signal,And the LVDS data clock frequency getting is sent to clock frequency control module;
Described clock frequency control module is configured to: whether the LVDS data clock frequency that judgement receivesWithin the scope of the clock signal frequency arranging at initialization module, if it is by defeated LVDS data clock frequencyGo out to LCD Interface, otherwise use the default Htotal of field frequency value, initialization module of present image signalValue replacement LVDS data clock frequency, adjusts Vtotal value until LVDS data clock frequency falls into defaultLVDS data clock frequency range, total line number that described Vtotal value is liquid crystal display.
As one preferred embodiment, the LVDS data clock frequency model that described initialization module arrangesThe lower limit of enclosing calculates by following formula:
Lower limit=Htotal representative value × Vtotal representative value × (the typical case of LVDS data clock frequency rangeFrequently value-2),
The higher limit of the LVDS data clock frequency range of described initialization module setting calculates by following formulaArrive:
Higher limit=Htotal representative value × Vtotal representative value × (typical case of LVDS data clock frequency rangeField frequency value+2),
Wherein Htotal representative value, Vtotal representative value all arrange by liquid crystal display specifications.
As another preferred embodiment, described typical field frequency value is 60.
As another preferred embodiment, the Htotal value that described initialization module arranges is Htotal allusion quotationOffset, described Htotal representative value arranges by liquid crystal display specifications.
[beneficial effect]
The technical scheme that the present invention proposes has following beneficial effect:
The present invention can make the LVDS data clock FREQUENCY CONTROL of TV set core output in default scope,Can not exceed the receiving ability of liquid crystal display logic card, therefore can ensure that signal receives sequential correctly and image solutionAnalyse normally, solved the too high or too low image causing of LVDS data clock frequency and shown abnormal problem.
Brief description of the drawings
The control device of the LCD TV LVDS data clock that Fig. 1 provides for embodiments of the invention one formerReason figure.
Detailed description of the invention
For making the object, technical solutions and advantages of the present invention clearer, below will be to concrete reality of the present inventionThe mode of executing is carried out clear, complete description.
Embodiment mono-
The principle of the control device of the LCD TV LVDS data clock that Fig. 1 provides for the embodiment of the present invention oneFigure. As shown in Figure 1, this device comprises initialization module 11, clock parsing module 12, clock frequency controlModule 13 and LCD Interface 14.
Initialization module 11 is configured to: initialize LVDS data clock frequency is set at LCD TV movementScope and Htotal value, wherein Htotal value is the every row sum of all pixels of liquid crystal display.
The lower limit of the LVDS data clock frequency range that particularly, initialization module 11 arranges is passed through following formulaCalculate:
Lower limit=Htotal representative value × Vtotal representative value × (the typical case of LVDS data clock frequency rangeFrequently value-2).
The higher limit of the LVDS data clock frequency range that initialization module 11 arranges calculates by following formula:
Higher limit=Htotal representative value × Vtotal representative value × (typical case of LVDS data clock frequency rangeField frequency value+2).
Wherein Htotal representative value, Vtotal representative value all arrange by liquid crystal display specifications. Typical case's field frequencyValue is 60. In addition, in the present embodiment, the Htotal value that initialization module 1 arranges is Htotal representative value,Htotal representative value arranges by liquid crystal display specifications.
Clock parsing module 12 is configured to: obtain the LVDS data clock frequency of present image signal, andThe LVDS data clock frequency getting is sent to clock frequency control module 13.
Clock frequency control module 13 is configured to: whether the LVDS data clock frequency that receives of judgement existsWithin the scope of the clock signal frequency that initialization module arranges, if it is LVDS data clock frequency is exportedTo LCD Interface 14, otherwise use the default Htotal of field frequency value, initialization module of present image signalValue replacement LVDS data clock frequency, adjusts Vtotal value until LVDS data clock frequency falls into defaultLVDS data clock frequency range, total line number that wherein Vtotal value is liquid crystal display, due to LVDS numberDetermined by field frequency value, Htotal value, the Vtotal value of present image signal according to clock frequency, by adjusting VtotalValue can change LVDS data clock frequency.
Adopt the control method of the LCD TV LVDS data clock of a kind of device realization of embodiment to joinExamine following concrete grammar embodiment.
Embodiment bis-
Embodiment bis-provides a kind of control method of LCD TV LVDS data clock, comprises the following steps:
Step (1): by initialization module, LVDS data clock is set in the time that LCD TV movement initializesFrequency range and Htotal value, wherein Htotal value is the every row sum of all pixels of liquid crystal display. Particularly, LVDS numberLower limit according to reference clock frequency calculates by following formula:
Lower limit=Htotal representative value × Vtotal representative value × (the typical case of LVDS data clock frequency rangeFrequently value-2).
The higher limit of LVDS data clock frequency range calculates by following formula:
Higher limit=Htotal representative value × Vtotal representative value × (typical case of LVDS data clock frequency rangeField frequency value+2).
Wherein Htotal representative value, Vtotal representative value all arrange by liquid crystal display specifications. Typical case's field frequencyValue is 60. In addition, in the present embodiment, the Htotal value that initialization module arranges is Htotal representative value,Htotal representative value arranges by liquid crystal display specifications. Step (1) executes rear execution step (2).
Step (2): clock parsing module obtains the LVDS data clock frequency of present image signal, and willThe LVDS data clock frequency getting is sent to clock frequency control module. After executing, step (2) holdsRow step (3).
Step (3): clock frequency control module judge the LVDS data clock frequency that receives whether at the beginning ofWithin the scope of the clock signal frequency that beginningization module arranges, if it is LVDS data clock frequency is exported toLCD Interface, on the contrary the default Htotal value of field frequency value, initialization module of present image signal usedReplacement LVDS data clock frequency, adjusts Vtotal value until LVDS data clock frequency falls into defaultLVDS data clock frequency range, total line number that Vtotal value is liquid crystal display, due to LVDS data clock frequencyRate, can by adjusting Vtotal value by field frequency value, Htotal value, the decision of Vtotal value of present image signalChange LVDS data clock frequency.
As can be seen from the above embodiments, the embodiment of the present invention can make the LVDS data of TV set core outputClock frequency control, in default scope, can not exceed the receiving ability of liquid crystal display logic card, therefore canEnsure that signal receives that sequential is correct and image analysis is normal, solved the too high or mistake of LVDS data clock frequencyThe low image causing shows abnormal problem.
Need explanation, the embodiment of foregoing description is a part of embodiment of the present invention, instead of all implementsExample, neither limitation of the present invention. Based on embodiments of the invention, those of ordinary skill in the art are notPay the every other embodiment obtaining under creative work prerequisite, all belong to protection scope of the present invention.
Claims (8)
1. a control method for LCD TV LVDS data clock, is characterized in that comprising:
In the time that LCD TV movement initializes by initialization module arrange LVDS data clock frequency range andHtotal value, described Htotal value is the every row sum of all pixels of liquid crystal display;
Clock parsing module obtains the LVDS data clock frequency of LCD TV present image signal, and will obtainThe LVDS data clock frequency of getting is sent to clock frequency control module;
Clock frequency control module judges whether the LVDS data clock frequency receiving establishes at initialization moduleIn the LVDS data clock signal frequency range of putting, if it is LVDS data clock frequency is exported toLCD Interface, on the contrary the default Htotal value of field frequency value, initialization module of present image signal usedReplacement LVDS data clock frequency, adjusts Vtotal value until LVDS data clock frequency falls into defaultLVDS data clock frequency range, total line number that described Vtotal value is liquid crystal display.
2. the control method of LCD TV LVDS data clock according to claim 1, its feature existsLower limit in the LVDS of described initialization module setting data clock frequency range calculates by following formula:
Lower limit=Htotal representative value × Vtotal representative value × (the typical case of LVDS data clock frequency rangeFrequently value-2),
The higher limit of the LVDS data clock frequency range of described initialization module setting calculates by following formulaArrive:
Higher limit=Htotal representative value × Vtotal representative value × (typical case of LVDS data clock frequency rangeField frequency value+2),
Wherein Htotal representative value, Vtotal representative value all arrange by liquid crystal display specifications.
3. the control method of LCD TV LVDS data clock according to claim 2, its feature existsBe 60 in described typical field frequency value.
4. the control method of LCD TV LVDS data clock according to claim 1, its feature existsThe Htotal value arranging in described initialization module is Htotal representative value, and described Htotal representative value passes through liquidBrilliant screen specifications arrange.
5. a control device for LCD TV LVDS data clock, it is characterized in that comprising initialization module,Clock parsing module, clock frequency control module and LCD Interface,
Described initialization module is configured to: initialize and LVDS data clock is set frequently at LCD TV movementRate scope and Htotal value, described Htotal value is the every row sum of all pixels of liquid crystal display;
Described clock parsing module is configured to: obtain the LVDS data clock frequency of present image signal,And the LVDS data clock frequency getting is sent to clock frequency control module;
Described clock frequency control module is configured to: whether the LVDS data clock frequency that judgement receivesIn the LVDS data clock signal frequency range arranging at initialization module, if it is by LVDS dataClock frequency exports LCD Interface to, otherwise uses field frequency value, the initialization module of present image signalDefault Htotal value replacement LVDS data clock frequency, adjusts Vtotal value until LVDS data clockFrequency falls into default LVDS data clock frequency range, total line number that described Vtotal value is liquid crystal display.
6. the control device of LCD TV LVDS data clock according to claim 5, its feature existsLower limit in the LVDS of described initialization module setting data clock frequency range calculates by following formula:
Lower limit=Htotal representative value × Vtotal representative value × (the typical case of LVDS data clock frequency rangeFrequently value-2),
The higher limit of the LVDS data clock frequency range of described initialization module setting calculates by following formulaArrive:
Higher limit=Htotal representative value × Vtotal representative value × (typical case of LVDS data clock frequency rangeField frequency value+2),
Wherein Htotal representative value, Vtotal representative value all arrange by liquid crystal display specifications.
7. the control device of LCD TV LVDS data clock according to claim 6, its feature existsBe 60 in described typical field frequency value.
8. the control device of LCD TV LVDS data clock according to claim 5, its feature existsThe Htotal value arranging in described initialization module is Htotal representative value, and described Htotal representative value passes through liquidBrilliant screen specifications arrange.
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| CN201610028044.4A CN105681699A (en) | 2016-01-15 | 2016-01-15 | Control method and device of LVDS (Low-Voltage Differential Signaling) data clock of liquid crystal display television |
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| CN201610028044.4A CN105681699A (en) | 2016-01-15 | 2016-01-15 | Control method and device of LVDS (Low-Voltage Differential Signaling) data clock of liquid crystal display television |
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Cited By (4)
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| CN107068111A (en) * | 2017-04-25 | 2017-08-18 | 南京熊猫电子股份有限公司 | A kind of solution LVDS signals produce the method and system of electromagnetic radiation |
| CN110753255A (en) * | 2018-07-24 | 2020-02-04 | 扬智科技股份有限公司 | Transmission stream receiving device and clock frequency setting method thereof |
| CN111354295A (en) * | 2020-04-14 | 2020-06-30 | Tcl华星光电技术有限公司 | Control method and device for signal transmission in display device and electronic equipment |
| CN111477187A (en) * | 2020-05-08 | 2020-07-31 | Tcl华星光电技术有限公司 | Time schedule controller, signal calibration method thereof and display device |
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