CN105679847B

CN105679847B - Photoelectric conversion device, method for manufacturing photoelectric conversion device, and electronic apparatus

Info

Publication number: CN105679847B
Application number: CN201510857641.3A
Authority: CN
Inventors: 工藤学
Original assignee: Seiko Epson Corp
Current assignee: Seiko Epson Corp
Priority date: 2014-12-05
Filing date: 2015-11-30
Publication date: 2019-12-10
Anticipated expiration: 2035-11-30
Also published as: JP6661900B2; CN105679847A; JP2016111322A

Abstract

The invention provides a photoelectric conversion device, a method for manufacturing the photoelectric conversion device, and an electronic apparatus, wherein the photoelectric conversion device has high photosensitivity and high reliability, and the method for manufacturing the photoelectric conversion device can stably manufacture the photoelectric conversion device. An image sensor (100) as a photoelectric conversion device is characterized by comprising: a lower electrode (21) containing a high-melting-point metal; an upper electrode (25) disposed on an upper layer of the lower electrode (21); a p-type semiconductor layer (23) and an n-type semiconductor layer (24) which are arranged between the lower electrode (21) and the upper electrode (25); and a relay electrode (26) that contains a high-melting-point metal, wherein the lower electrode (21) and the relay electrode (26) are formed on the same layer, and an intermediate layer (22), which is a selenization film of the high-melting-point metal, is formed on the lower electrode (21).

Description

Photoelectric conversion device, method for manufacturing photoelectric conversion device, and electronic apparatus

Technical Field

The invention relates to a photoelectric conversion device, a method of manufacturing the photoelectric conversion device, and an electronic apparatus.

background

A photoelectric conversion device including a semiconductor layer including a CIS-based film or a CGIS-based film of a chalcopyrite (chalcopyrite) structure is known (for example, see patent document 1). The photoelectric conversion device described in patent document 1 includes a lower electrode (first electrode), an upper electrode (second electrode), and a semiconductor layer (photoelectric conversion portion) provided therebetween. The lower electrode is formed of a high-melting-point metal such as molybdenum (Mo), and a chalcopyrite-structured semiconductor layer formed of a CIS-based film is formed on the lower electrode by sputtering.

documents of the prior art

Patent document

Patent document 1: japanese laid-open patent publication No. 2012 and 16929

disclosure of Invention

however, when the lower electrode made of a high-melting metal is disposed in contact with the chalcopyrite-structured semiconductor layer as in the photoelectric conversion device described in patent document 1, there is a problem in that: that is, the contact resistance between the lower electrode and the semiconductor layer becomes high, and the electrical characteristics deteriorate, thereby lowering the sensitivity of the photoelectric conversion device. Therefore, if the surface layer portion of the lower electrode is selenized to form a selenized film, ohmic contact is obtained at the boundary of each of the lower electrode, the selenized film, and the semiconductor layer, and the contact resistance between the lower electrode and the semiconductor layer can be kept low. However, in the case where the photoelectric conversion device has a wiring portion, a relay electrode, and the like formed of the same high-melting-point metal and formed on the same layer as the lower electrode, since the surface layer portion of the wiring portion and the relay electrode is also selenized when the surface layer portion of the lower electrode is selenized, there is a problem in that: that is, the wiring resistance may be high, and the contact resistance between the wiring portion, the relay electrode, and the upper layer electrode may also be high, so that the operation of the photoelectric conversion device may be unstable.

The present invention is proposed to solve at least part of the above-described problems, and can be implemented as the following modes or application examples.

[ application example 1] A photoelectric conversion device according to the application example is provided with: a first electrode comprising a first metal; a second electrode disposed on an upper layer of the first electrode; a semiconductor layer disposed between the first electrode and the second electrode; and a third electrode containing the first metal, the first electrode and the third electrode being formed on the same layer, a selenization film of the first metal being formed on the first electrode.

According to this configuration, in the photoelectric conversion device in which the semiconductor layer is disposed between the first electrode and the second electrode, since the selenide film of the first metal is formed on the first electrode, the selenide film is in contact with the first electrode, and the semiconductor layer is in contact with the selenide film. Therefore, as compared with the case where the first electrode and the semiconductor layer are in contact with each other, ohmic contact can be obtained at the boundary of each of the first electrode, the selenide film, and the semiconductor layer, and therefore, the contact resistance between the first electrode and the semiconductor layer can be suppressed to be low. Further, since the first electrode and the third electrode are formed on the same layer using the same first metal, for example, when the first electrode is an electrode of a light receiving element and the third electrode is a relay electrode or a wiring portion, the photoelectric conversion device can be formed with a simple configuration. Further, since the selenization film of the first metal is not formed on the third electrode, the wiring resistance (wired line resistance) of the third electrode can be kept low. As a result, a photoelectric conversion device that operates stably with high sensitivity can be provided.

Application example 2 in the photoelectric conversion device of the above application example, the layer thickness of the first electrode is preferably thinner than the layer thickness of the third electrode.

According to this configuration, in the first electrode and the third electrode formed in the same layer using the first metal, the layer thickness of the first electrode on which the selenide film is formed is thinner than the layer thickness of the third electrode. From this, it is considered that the selenized film on the first electrode is formed by selenizing the surface layer portion of the first electrode, whereas the surface layer portion of the third electrode is not selenized. Therefore, the contact resistance between the first electrode and the semiconductor layer can be suppressed to be low, and the wiring resistance of the third electrode can be suppressed to be low.

In the photoelectric conversion device according to the above application example, it is preferable that an insulating layer having an opening is formed over the first electrode and the third electrode, and the selenide film is disposed in a region overlapping with the opening in a plan view.

According to this configuration, the insulating layer is formed so as to cover the third electrode, and has an opening portion that overlaps with the selenide film over the first electrode in a plan view. Therefore, by forming the insulating layer over the first electrode and the third electrode and then selenizing the insulating layer, a region of the first electrode which overlaps with the opening in a plan view can be selenized without selenizing the third electrode.

In the photoelectric conversion device according to the above application example, it is preferable that a metal oxide layer having an opening portion is formed over the first electrode and the third electrode, and the selenide film is disposed in a region overlapping with the opening portion in a plan view.

According to this configuration, the metal oxide layer is formed so as to cover the third electrode, and has an opening portion that overlaps with the selenide film over the first electrode in a plan view. Therefore, by forming a metal oxide layer over the first electrode and the third electrode and then selenizing the metal oxide layer, a region of the first electrode which overlaps with the opening in a plan view can be selenized without selenizing the third electrode. In addition, in the case where a semiconductor film to be a semiconductor layer is formed so as to cover the first electrode and the third electrode, since the semiconductor film is formed in contact with the metal oxide layer in a region other than the region in the opening portion, the adhesiveness of the semiconductor film is improved as compared with the case where the semiconductor film is formed in contact with the insulating layer, and floating or film peeling is less likely to occur.

Application example 5 in the photoelectric conversion device according to the above application example, the second electrode and the third electrode are preferably electrically connected.

According to this configuration, since the second electrode formed on the upper layer of the first electrode is electrically connected to the third electrode formed on the same layer as the first electrode, the second electrode includes a portion disposed on the upper layer of the first electrode and a portion disposed on the same layer as the first electrode and electrically connected to the third electrode. Therefore, the second electrode can be electrically connected to, for example, a relay wiring, a transistor, or the like via the third electrode disposed on the lower layer side. In addition, since the selenide film is not formed over the third electrode, the contact resistance between the second electrode and the third electrode can be suppressed to be low.

Application example 6 in the photoelectric conversion device according to the application example, it is preferable that the photoelectric conversion device further includes a transistor, and the third electrode is electrically connected to a gate electrode of the transistor.

According to this configuration, since the third electrode electrically connected to the second electrode is electrically connected to the gate electrode of the transistor, the potential of the second electrode can be amplified by the transistor.

Application example 7 in the photoelectric conversion device of the above application example, preferably, the semiconductor layer includes a semiconductor film of a chalcopyrite structure.

According to this configuration, since the semiconductor layer including the semiconductor film having the chalcopyrite structure is provided between the first electrode and the second electrode, the photoelectric conversion device having high sensitivity to near infrared light can be provided.

[ application example 8] an electronic device according to the application example includes: the above-described photoelectric conversion device; and a light-emitting device stacked on the photoelectric conversion device.

According to this configuration, the following electronic apparatus can be provided: the photoelectric conversion device receives light emitted from the light emitting device and reflected by a target object such as a living body, and can stably detect information such as biological information with high sensitivity.

Application example 9a method for manufacturing a photoelectric conversion device according to the application example includes: forming a conductive film containing a first metal on a substrate to form a first electrode and a third electrode; forming an insulating layer covering the third electrode and having an opening portion over the first electrode; forming a metal film containing a group 11 element and a group 13 element in the opening portion; and selenizing the metal film, wherein in the step of selenizing, a surface layer portion of the first electrode becomes a selenide of the first metal.

According to the manufacturing method, the first electrode and the third electrode are formed over the substrate using the conductive film containing the first metal, the insulating layer covering the third electrode and having the opening portion over the first electrode is formed over them, and after the metal film containing the group 11 element and the group 13 element is formed in the opening portion, the metal film is selenized. Thus, the metal film containing the group 11 element and the group 13 element is selenized to be a chalcopyrite-structured semiconductor film, and therefore, a photoelectric conversion device having high sensitivity to near-infrared light can be manufactured. In addition, in the step of selenizing the metal film, the surface layer portion of the first electrode is selenized, and the selenized film made of the selenide of the first metal is formed on the first electrode, so that ohmic contact can be obtained at the boundary between the first electrode, the selenized film, and the semiconductor film, and therefore, the contact resistance between the first electrode and the semiconductor film can be suppressed to be low. On the other hand, since the third electrode is covered with the insulating layer, the surface layer portion of the third electrode is not selenized in the step of selenizing the metal film, and thus the wiring resistance of the third electrode can be kept low. As a result, a photoelectric conversion device that operates stably with high sensitivity can be manufactured.

Application example 10 a method for manufacturing a photoelectric conversion device according to the application example includes: forming a conductive film containing a first metal on a substrate to form a first electrode and a third electrode; forming a metal oxide layer covering the third electrode and having an opening portion on the first electrode; forming a metal film containing a group 11 element and a group 13 element in the opening portion; and selenizing the metal film, wherein in the step of selenizing, a surface layer portion of the first electrode becomes a selenide of the first metal.

According to the manufacturing method, the first electrode and the third electrode are formed over the substrate using the conductive film containing the first metal, the metal oxide layer covering the third electrode and having the opening portion over the first electrode is formed over them, and after the metal film containing the group 11 element and the group 13 element is formed in the opening portion, the metal film is selenized. Thus, the metal film containing the group 11 element and the group 13 element is selenized to be a chalcopyrite-structured semiconductor film, and therefore, a photoelectric conversion device having high sensitivity to near-infrared light can be manufactured. In addition, in the step of selenizing the metal film, the surface layer portion of the first electrode is selenized, and the selenized film made of the selenide of the first metal is formed on the first electrode, so that ohmic contact can be obtained at the boundary between the first electrode, the selenized film, and the semiconductor film, and therefore, the contact resistance between the first electrode and the semiconductor film can be suppressed to be low. On the other hand, since the third electrode is covered with the metal oxide layer, the surface layer portion of the third electrode is not selenized in the step of selenizing the metal film, and thus the wiring resistance of the third electrode can be kept low. In addition, in the case where the semiconductor film having a chalcopyrite structure is formed by forming the metal film containing the group 11 element and the group 13 element so as to cover the inside and the other regions of the opening, since the semiconductor film is formed in contact with the metal oxide layer in the region other than the inside of the opening, the adhesiveness of the semiconductor film is improved as compared with the case where the semiconductor film is formed in contact with the insulating layer, and floating or film peeling is less likely to occur. As a result, a photoelectric conversion device that operates stably with high sensitivity can be manufactured more stably.

Drawings

Fig. 1 is a perspective view showing a configuration of a biological information acquisition device as an example of an electronic apparatus according to the present embodiment.

Fig. 2 is a block diagram showing an electrical configuration of the biological information acquisition apparatus.

fig. 3 is a schematic perspective view showing the structure of the sensor unit.

Fig. 4 is a schematic sectional view showing the structure of the sensor portion.

Fig. 5 is an equivalent circuit diagram showing an electrical configuration of the photosensor of the first embodiment.

Fig. 6 is a schematic cross-sectional view showing the structure of the photosensor according to the first embodiment.

fig. 7 (a) to (d) are views for explaining the method of manufacturing the photosensor according to the first embodiment.

Fig. 8 (a) to (c) are views for explaining the method of manufacturing the photosensor according to the first embodiment.

Fig. 9 (a) to (c) are views for explaining the method of manufacturing the photosensor according to the first embodiment.

Fig. 10 is a schematic cross-sectional view showing the structure of a photosensor according to the second embodiment.

Fig. 11 (a) to (d) are views for explaining a method of manufacturing the photosensor according to the second embodiment.

fig. 12 (a) to (d) are diagrams illustrating a method for manufacturing a photosensor according to the second embodiment.

Fig. 13 (a) to (c) are views for explaining a method of manufacturing the photosensor according to the second embodiment.

Fig. 14 (a) to (c) are diagrams for explaining a method of manufacturing the photoelectric sensor according to modification 1.

Description of the reference numerals

3g gate electrode 8 insulating layer

8a opening 10 substrate

11 lower electrodes (first electrodes) of the amplifying transistors 21, 31

21a, 31a conductive film 22 intermediate layer (selenization film)

23 p-type semiconductor layer 24 n-type semiconductor layer

25 Upper electrode (second electrode) 26, 34 Relay electrode (third electrode)

32 metal oxide layer 33 opening

35 metal oxide layer 36 opening

Image sensor 130 light emitting device 100 as photoelectric conversion device

200 biological information acquisition device as electronic device

Detailed Description

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the portions to be described are appropriately enlarged, reduced, or exaggerated in order to make the portions recognizable. In addition, components other than the constituent components necessary for the description may not be shown in the drawings.

In the following embodiments, for example, the case of being described as "on the substrate" means: a case configured to be in contact with an upper surface of the substrate; or, the case where the substrate is arranged on the substrate with another constituent interposed therebetween; alternatively, the substrate may be partially disposed in contact with the substrate and partially disposed on the substrate with another component interposed therebetween.

In this embodiment, an example of a photoelectric conversion device using an image sensor and an example of an electronic device using a biological information acquisition device to which the image sensor is applied will be described.

Electronic device

Next, a biological information acquisition device as an example of an electronic device including the photoelectric conversion device of the present embodiment will be described with reference to fig. 1 and 2. Fig. 1 is a perspective view showing a configuration of a biological information acquisition device as an example of an electronic apparatus according to the present embodiment. Fig. 2 is a block diagram showing an electrical configuration of the biological information acquisition apparatus.

As shown in fig. 1, the biological information acquisition device 200 according to the present embodiment is a portable information terminal device that is worn on the wrist (wrist) of the human body M. The biological information acquisition apparatus 200 can specify the blood glucose level by specifying the position of a blood vessel in the living body from the image information of the blood vessel inside the wrist and performing non-invasive optical detection of the content of a specific component, for example, glucose, in the blood of the blood vessel.

The biological information acquisition apparatus 200 includes: an annular band 164 wearable on the wrist; a main body 160 attached to the outside of the band 164; and a sensor unit 150 attached to the inside of the belt 164 at a position facing the main body 160.

The main body 160 has a main body case 161 and a display portion 162 assembled to the main body case 161. The main body case 161 is assembled with not only the display unit 162 but also an operation button 163, a circuit system (see fig. 2) such as a control unit 165 described later, a battery as a power source, and the like.

The sensor unit 150 includes the image sensor 100 as the photoelectric conversion device of the present embodiment as a light receiving unit (see fig. 2). The sensor unit 150 is electrically connected to the main body 160 by a wire (not shown in fig. 1) incorporated in the belt 164. The image sensor 100 includes a plurality of photosensors 50 as photoelectric conversion elements, and each photosensor 50 includes a photodiode 20 as a light receiving element (see fig. 4).

Such biological information acquisition device 200 is worn on the wrist so that the sensor unit 150 is in contact with the wrist on the palm side opposite to the back of the hand. By wearing the sensor unit 150 in this manner, it is possible to avoid variation in detection sensitivity of the sensor unit 150 due to skin color differences.

In the biological information acquisition apparatus 200 of the present embodiment, the main body 160 and the sensor unit 150 are separately assembled to the belt 164, but the main body 160 and the sensor unit 150 may be integrally assembled to the belt 164.

as shown in fig. 2, the biological information acquisition apparatus 200 includes a control unit 165, a sensor unit 150 electrically connected to the control unit 165, a storage unit 167, an output unit 168, and a communication unit 169. Further, the display unit 162 is electrically connected to the output unit 168.

The sensor unit 150 includes the light emitting device 130 and the image sensor 100. The light emitting device 130 and the image sensor 100 are electrically connected to the control unit 165, respectively. The light emitting device 130 has a light source section that emits near infrared light IL having a wavelength range of 700nm to 2000 nm. The control section 165 drives the light emitting device 130 to emit the near infrared light IL. The near infrared light IL propagates to the inside of the human body M and is scattered. A part of the near infrared light IL scattered inside the human body M is received by the image sensor 100 as reflected light RL.

The control unit 165 can cause the storage unit 167 to store information of the reflected light RL received by the image sensor 100. Then, the control unit 165 causes the output unit 168 to process the information of the reflected light RL. The output unit 168 converts the information of the reflected light RL into image information of blood vessels and outputs the image information, or converts the image information into information on specific components in blood and outputs the information. The controller 165 can cause the display 162 to display the converted image information of the blood vessel and the information of the specific component in the blood. Then, the information can be transmitted from the communication unit 169 to another information processing apparatus.

The control unit 165 can receive information such as a program from another information processing apparatus via the communication unit 169 and store the information in the storage unit 167. The communication unit 169 may be a wired communication unit connected to another information processing apparatus by a wired method, or may be a wireless communication unit such as bluetooth (registered trademark). Note that, the control unit 165 may cause the display unit 162 to display not only the acquired information on the blood vessel and blood but also information such as a program stored in advance in the storage unit 167 and information such as the current time, on the display unit 162. The storage unit 167 may be a removable memory.

Sensor unit

Next, the sensor unit 150 included in the biological information acquisition apparatus 200 according to the present embodiment will be described with reference to fig. 3 and 4. Fig. 3 is a schematic perspective view showing the structure of the sensor unit. Fig. 4 is a schematic sectional view showing the structure of the sensor portion.

As shown in fig. 3, the sensor unit 150 includes the image sensor 100, the light shielding unit 110, the variable spectroscopic unit 120, the light emitting device 130, and the protection unit 140. Each of the above parts is plate-shaped, and the light shielding part 110, the variable spectroscopic part 120, the light emitting device 130, and the protection part 140 are sequentially stacked on the image sensor 100.

The sensor unit 150 has a case (not shown) that can be attached to the belt 164, and houses a laminate in which the respective units are laminated. In the following description, a direction along one side of the laminate is referred to as an X direction, a direction along the other side orthogonal to the one side is referred to as a Y direction, and a direction along the thickness direction of the laminate is referred to as a Z direction. In addition, observation of the sensor unit 150 from the normal direction (Z direction) of the protection unit 140 is referred to as "plan view".

As shown in fig. 4, the light-emitting device 130 includes: a light-transmitting substrate main body 131, a light source unit 133 provided on one surface 131a of the substrate main body 131, and a light-transmitting unit 132. As the light source unit 133, for example, an LED element, an organic electroluminescence element, or the like can be used. The protective portion 140 is provided so as to overlap the light source portion 133 and the translucent portion 132. The protection part 140 is a transparent plate such as cover glass or plastic.

The human body M is arranged to contact one face 140a of the protection portion 140. The light source unit 133 is configured to emit the near-infrared light IL toward the protection unit 140, and the reflected light RL, which is a part of the near-infrared light IL scattered inside the human body M, is guided to the variable spectroscopic unit 120 on the lower layer through the transparent portion 132.

the variable spectroscopic part 120 includes a fixed substrate 121 and a movable substrate 122. In the variable spectroscopic unit 120, the spectral distribution (spectral characteristics) of the reflected light RL transmitted through the variable spectroscopic unit 120 can be changed by electrically controlling the gap (gap) between the fixed substrate 121 and the movable substrate 122. The reflected light RL transmitted through the variable spectroscopic unit 120 is guided to the light shielding unit 110 of the lower layer.

The light shielding portion 110 has: a light-transmitting substrate main body 111, and a light-shielding film 113 provided on a surface 111b of the substrate main body 111 opposite to the surface 111a on the variable spectroscopic unit 120 side. An opening (pinhole) 112 is formed in the light shielding film 113 at a position corresponding to the arrangement of the light transmitting portion 132 of the light emitting device 130. The light shielding portion 110 is disposed between the variable spectroscopic portion 120 and the image sensor 100, and guides only the reflected light RL transmitted through the opening 112 to the photodiode 20, while blocking the other reflected light RL by the light shielding film 113.

The image sensor 100 has high light sensitivity to near-infrared light. The detailed configuration of the image sensor 100 will be described later. The image sensor 100 is disposed so that the side on which the photodiode 20 is provided faces the light shielding portion 110. Each of the plurality of photodiodes 20 is arranged at a position corresponding to the arrangement of the opening 112 in the light shielding portion 110. The reflected light RL transmitted through the opening 112 enters the photodiode 20.

In addition to the above configuration, in order to suppress the visible light from mixing into the reflected light RL entering the photodiode 20, a filter for blocking light in the visible light wavelength range (400nm to 700nm) may be disposed corresponding to the light transmitting portion 132 of the light emitting device 130 and the opening 112 of the light shielding portion 110, for example.

The structure of the sensor unit 150 is not limited to this. For example, the light emitting device 130 may have a structure including the protection portion 140, or the light source portion 133 may be sealed by the protection portion 140. Further, since the light transmitted through the light transmitting portion 132 may be reflected at the interface between the members having different refractive indexes and attenuated, the light emitting device 130 and the variable spectroscopic portion 120 may be bonded to each other so that the surface 131b of the substrate main body 131 of the light emitting device 130 is in contact with the variable spectroscopic portion 120, for example. The variable spectroscopic part 120 may be bonded so as to be in contact with the surface 111a of the light shielding part 110. Thus, the positional relationship in the thickness direction (Z direction) of each other can be made more reliable.

first embodiment

Photoelectric conversion device

Next, an image sensor 100 as a photoelectric conversion device according to a first embodiment will be described with reference to fig. 5 and 6. As described above, the image sensor 100 includes the plurality of photosensors 50 as photoelectric conversion elements. Fig. 5 is an equivalent circuit diagram showing an electrical configuration of the photosensor of the first embodiment. Fig. 6 is a schematic cross-sectional view showing the structure of the photosensor according to the first embodiment.

As shown in fig. 5, the image sensor 100 has a plurality of scanning lines 3a, and a plurality of readout lines 14 intersecting the scanning lines 3 a. The scanning lines 3a extend in the X direction, and the readout lines 14 extend in the Y direction. The photosensor 50 is disposed corresponding to the intersection of the scanning line 3a and the readout line 14.

The photosensor 50 has a photodiode 20 as a light receiving element, an amplifying transistor 11, a reset transistor 12, and a selection transistor 13. The amplification Transistor 11, the reset Transistor 12, and the selection Transistor 13 are formed of Thin Film Transistors (TFTs).

The anode of the photodiode 20 is connected to the negative power supply line 17, and the negative power supply potential Vss is supplied to the negative power supply line 17. The cathode of the photodiode 20 is connected to the gate of the amplifying transistor 11 and the source of the reset transistor 12. The drain of the amplifying transistor 11 and the drain of the reset transistor 12 are connected to a positive power supply line 16, and a positive power supply potential Vdd is supplied to the positive power supply line 16.

The source of the amplifying transistor 11 and the drain of the selection transistor 13 are connected. The source of the selection transistor 13 is connected to the readout line 14, and the gate of the selection transistor 13 is connected to the scanning line 3 a. The gate of the reset transistor 12 is connected to a reset signal line 15.

The light amount of the photoelectric sensor 50 is measured as follows. First, the gate of the amplifying transistor 11 is charged to the positive power supply potential Vdd. Next, the photodiode 20 is exposed, for example, for the entire period τ. In this exposure period, since the reset transistor 12 is in an off state, the gate potential Vg of the amplifying transistor 11 changes in accordance with the junction leakage current I of the photodiode 20.

When the exposure is completed, the gate potential Vg of the amplifying transistor 11 becomes Vg ═ Vdd-I τ/C _T, it is noted that C _T is the transistor capacitance of the amplifying transistor 11, the gate potential Vg of the amplifying transistor 11 changes with the light amount as the light amount increases, and therefore the junction leakage current increases, and the change in conductance of the amplifying transistor 11, which occurs for each photosensor 50 during the readout period, can be measured, and the amount of light irradiated during the exposure period can be measured.

As shown in fig. 6, the photosensor 50 of the first embodiment includes a substrate 10 and a photodiode 20 provided on the substrate 10. The photodiode 20 of the first embodiment is configured by a lower electrode 21 as a first electrode, an intermediate layer 22 as a selenization film, a p-type semiconductor layer 23, an n-type semiconductor layer 24, and an upper electrode 25 as a second electrode, which are stacked in this order from the substrate 10 side.

Fig. 6 is a cross-sectional view of the photosensor 50 along the Y direction, and in fig. 6, the direction from the front to the back is the X direction, and the direction toward the upper side is the Z direction. In fig. 6, the observation of the photosensor 50 from the normal direction (Z direction) of the photodiode 20 is referred to as "plan observation".

The substrate 10 has a substrate main body 1, an insulating film 1a, an amplifying transistor 11, a gate insulating film 3, an interlayer insulating film 4, a relay wiring 5, a positive power supply line 16, a negative power supply line 17, an insulating film 6, and a planarization layer 7. The substrate body 1 is made of, for example, transparent glass, opaque silicon, or the like. The insulating film 1a is formed to cover the surface of the substrate body 1.

The amplifying transistor 11 includes a semiconductor layer 2 and a gate electrode 3g, the semiconductor layer 2 is formed of, for example, polysilicon and is provided in an island shape on the insulating film 1a, the semiconductor layer 2 includes a channel region 2c, a drain region 2d, and a source region 2s, the gate insulating film 3 is formed of, for example, an insulating material such as SiO ₂ (silicon oxide) so as to cover the semiconductor layer 2.

On the gate insulating film 3, a gate electrode 3g is formed at a position opposing the channel region 2c of the semiconductor layer 2. The interlayer insulating film 4 is formed so as to cover the gate insulating film 3 and the gate electrode 3 g.

The relay wiring 5, the positive power supply line 16, and the negative power supply line 17 are formed on the interlayer insulating film 4 using a metal material such as Al (aluminum). The relay wiring 5 is electrically connected to the gate electrode 3g via a through hole penetrating the interlayer insulating film 4. The positive power supply line 16 is electrically connected to the drain region 2d of the semiconductor layer 2 via a through hole penetrating the interlayer insulating film 4 and the gate insulating film 3.

The insulating film 6 is formed so as to cover the relay wiring 5, the positive power supply line 16, and the negative power supply line 17, the insulating film 6 is formed using, for example, SiN (silicon nitride), the planarizing layer 7 is formed so as to cover the insulating film 6, the planarizing layer 7 is formed using, for example, SiO ₂ (silicon oxide), and the like, in the insulating film 6 and the planarizing layer 7, the through-hole 7a is formed in a portion overlapping with the negative power supply line 17 in a plan view, and the through-hole 7b is formed in a portion overlapping with the relay wiring 5 in a plan view.

On the substrate 10 (on the planarization layer 7), the lower electrode 21 as the first electrode and the relay electrode 26 as the third electrode are formed on the same layer. The lower electrode 21 and the relay electrode 26 are formed of a conductive film containing a high-melting metal as a first metal. Therefore, since the lower electrode 21 and the relay electrode 26 can be formed by forming one conductive film in the same layer and patterning the conductive film, the photosensor 50 can be formed with a simple configuration.

Examples of the high-melting-point metal constituting the lower electrode 21 and the relay electrode 26 include Mo (molybdenum), tungsten (W), tantalum (Ta), niobium (Nb), and the like. Among them, Mo has good electrical characteristics and is easy to manufacture, and therefore, Mo can be preferably used as a material for the lower electrode 21 and the relay electrode 26.

The conductive film constituting the lower electrode 21 is formed so as to fill the through hole 7a provided in the insulating film 6 and the planarizing layer 7. Contact hole CNT1 is formed by the conductive film filling through hole 7 a. The lower electrode 21 is electrically connected to the negative power supply line 17 via a contact hole CNT 1.

The intermediate layer 22 made of a selenide of a high-melting-point metal is formed on the lower electrode 21 so as to be in contact with the lower electrode 21, the intermediate layer 22 is a selenide film obtained by selenizing a surface layer portion of a conductive film (such as the conductive film 21a shown in fig. 7 a) formed as the lower electrode 21, and when Mo is used as the high-melting-point metal constituting the lower electrode 21, the intermediate layer 22 is made of molybdenum selenide (MoSe ₂).

the intermediate layer 22 is disposed inside the outer shape of the lower electrode 21 in plan view. Therefore, the lower electrode 21 has a peripheral edge portion which is located around the intermediate layer 22 in a plan view and does not overlap with the intermediate layer 22. The thickness of the peripheral portion of the lower electrode 21 is, for example, about 250 nm. In the lower electrode 21, the thickness of the portion overlapping with the intermediate layer 22 in a plan view is smaller than that of the peripheral portion, for example, about 200 nm. The layer thickness of the intermediate layer 22 is, for example, about 100 nm.

When the lower electrode 21 and the intermediate layer 22 have the above-described layer thicknesses, a 50 nm-thick portion on the surface layer side among the 250 nm-thick portions of the conductive film constituting the lower electrode 21 is thickened by selenization to become the intermediate layer 22 having a layer thickness of 100nm, which means that the conductive film having a layer thickness of 200nm remains as the lower electrode 21.

Here, if the entire planar region of the conductive film constituting the lower electrode 21 is selenized, the surface layer side of the portion where the contact hole CNT1 is formed, that is, the portion electrically connected to the negative power supply line 17 through the through hole 7a is also selenized. In this way, since the thickness of the conductive film remaining without being selenized is reduced by that amount, the wiring resistance of the contact hole CNT1 portion becomes high. In the present embodiment, since the conductive film constituting the lower electrode 21 is not selenized in a region other than the region overlapping with the p-type semiconductor layer 23 formed in the upper layer in a plan view, the wiring resistance of the contact hole CNT1 can be kept low.

The conductive film constituting the relay electrode 26 is formed so as to fill the through hole 7b provided in the insulating film 6 and the planarizing layer 7. In the conductive film constituting relay electrode 26, contact hole CNT2 is formed by a portion filling through hole 7 b. The relay electrode 26 is electrically connected to the relay wiring 5 via the contact hole CNT2, and is electrically connected to the gate electrode 3g via the relay wiring 5.

The layer thickness of the relay electrode 26 is the same as the layer thickness of the peripheral portion of the lower electrode 21, and is about 250nm, for example. Therefore, in the lower electrode 21, the thickness of the portion overlapping with the intermediate layer 22 in a plan view is thinner than the thickness of the relay electrode 26. A selenide film such as the intermediate layer 22 is not formed on the relay electrode 26. That is, since the conductive film constituting relay electrode 26 is not selenized, the wiring resistance of relay electrode 26 including the portion where contact hole CNT2 electrically connected to relay wiring 5 is formed can be suppressed to be low.

The insulating layer 8 is formed so as to cover the substrate 10 (the planarization layer 7), the lower electrode 21, and the relay electrode 26. Insulating layer 8 has opening 8a overlapping lower electrode 21 in a plan view and opening 8b overlapping relay electrode 26 in a plan view. The opening 8a is disposed inside the outer shape of the lower electrode 21 in plan view, and overlaps the intermediate layer 22. In other words, the lower electrode 21 has an outer shape larger than the opening 8a, and the intermediate layer 22 is disposed in a region overlapping with the opening 8a in a plan view.

The insulating layer 8 is made of, for example, SiO _X (silicon oxide) or SiN _X (silicon nitride). in the present embodiment, the insulating layer 8 is made of SiN, and the thickness of the insulating layer 8 is, for example, about 200 nm.

A p-type semiconductor layer 23 is formed on the intermediate layer 22. The p-type semiconductor layer 23 is disposed inside the outer shape of the intermediate layer 22 in plan view, for example. That is, the p-type semiconductor layer 23 is disposed inside the opening 8a of the insulating layer 8. The p-type semiconductor layer 23 may be formed to be larger than the opening 8a, and the peripheral edge portion thereof may spread (slip-on り and slip-on る) onto the insulating layer 8.

The p-type semiconductor layer 23 is composed of a semiconductor film of a chalcopyrite-structured CIS system (CuInSe ₂) containing copper (Cu) as a group 11 element, indium (In) as a group 13 element, and selenium (Se) as a group 16 element, the p-type semiconductor layer 23 may be composed of a film of a chalcopyrite-structured CIGS system (Cu (In, Ga) Se ₂) containing copper (Cu), indium (In), gallium (Ga) as a group 13 element, and selenium (Se).

In the photodiode 20, the intermediate layer 22 is disposed between the lower electrode 21 and the p-type semiconductor layer 23. That is, the intermediate layer 22 is in contact with the lower electrode 21, and the p-type semiconductor layer 23 is in contact with the intermediate layer 22. Accordingly, ohmic contact can be obtained at the boundaries of the lower electrode 21, the intermediate layer 22, and the p-type semiconductor layer 23, as compared with the case where the lower electrode 21 and the p-type semiconductor layer 23 are in contact with each other, and therefore, the contact resistance between the lower electrode 21 and the p-type semiconductor layer 23 can be suppressed to be low.

The protective layer 9 is formed to cover the insulating layer 8, the intermediate layer 22, and the p-type semiconductor layer 23, the protective layer 9 is formed of, for example, SiO _X or SiN _X, in the present embodiment, the protective layer 9 is formed of SiN, and the thickness of the protective layer 9 is, for example, about 500 nm.

The protective layer 9 has: opening 9a overlapping with p-type semiconductor layer 23 in a plan view, and through-hole 9b overlapping with relay electrode 26 in a plan view. The opening 9a is disposed inside the outer shape of the p-type semiconductor layer 23 in plan view. The through hole 9b is disposed, for example, inside the opening 8b of the insulating layer 8, and is formed to penetrate through to the relay electrode 26. The through hole 9b may have the same plane area as the opening 8 b.

The n-type semiconductor layer 24 is formed on the p-type semiconductor layer 23 in a stacked manner. The n-type semiconductor layer 24 is formed larger than the opening 9a, for example, and its peripheral portion extends over the protective layer 9.

The n-type semiconductor layer 24 may be formed of, for example, an i-ZnO (intrinsic zinc oxide) film which is an undoped intrinsic semiconductor film and a ZnO (n ⁺) film doped with an n-type impurity, and the intrinsic semiconductor film is a semiconductor film to which donor atoms and acceptor atoms are not intentionally added.

The upper electrode 25 is formed on the protective layer 9 so as to cover the n-type semiconductor layer 24. The upper electrode 25 is formed of a light-transmitting conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The conductive film constituting the upper electrode 25 extends to a region overlapping with the relay electrode 26 in a plan view, and is formed so as to fill the through hole 9b of the protective layer 9.

In the conductive film constituting the upper electrode 25, the contact hole CNT3 is formed by a portion filling the through hole 9 b. The upper electrode 25 is electrically connected to the relay electrode 26 via the contact hole CNT3, the relay wiring 5 via the contact hole CNT2, and the gate electrode 3g via the relay wiring 5.

in contact hole CNT3, the conductive film constituting upper electrode 25 contacts relay electrode 26. Since no selenide film such as the intermediate layer 22 on the lower electrode 21 is formed on the relay electrode 26, the contact resistance between the relay electrode 26 and the upper electrode 25 can be kept low.

the photodiode 20 is configured by the lower electrode 21, the intermediate layer 22, the p-type semiconductor layer 23, the n-type semiconductor layer 24, and the upper electrode 25. In the photodiode 20, a region not covered with the protective layer 9, that is, a region disposed in the opening 9a in a plan view, of the regions of the p-type semiconductor layer 23 and the n-type semiconductor layer 24, is a light receiving region 50 a. In the photosensor 50, when light enters the light receiving region 50a, a photocurrent corresponding to the amount of light flows through the photodiode 20.

As described above, since the photodiode 20 of the first embodiment includes the p-type semiconductor layer 23 having the chalcopyrite structure, it has an excellent photoelectric conversion rate and high photosensitivity in a wide wavelength range from visible light to near-infrared light. In the photodiode 20, since the intermediate layer 22 made of a selenide film is disposed between the lower electrode 21 and the p-type semiconductor layer 23, ohmic contact can be obtained at the boundaries of the lower electrode 21, the intermediate layer 22, and the p-type semiconductor layer 23, and the contact resistance between the lower electrode 21 and the p-type semiconductor layer 23 can be kept low. Further, since the contact hole CNT1 portion of the lower electrode 21 and the relay electrode 26 including the contact hole CNT2 portion are not selenized, the wiring resistance can be suppressed to be low. As described above, the image sensor 100 can stably operate with high sensitivity over a wide wavelength range from visible light to near-infrared light.

Method for manufacturing photoelectric conversion device

next, a method for manufacturing a photoelectric conversion device according to the first embodiment will be described with reference to fig. 7, 8, and 9. Here, a method for manufacturing the photosensor 50, which is a feature of the present invention, will be described. Fig. 7, 8, and 9 are diagrams illustrating a method of manufacturing the photosensor according to the first embodiment. Each of fig. 7, 8, and 9 corresponds to a partial enlarged view of fig. 6.

Prior to the step shown in fig. 7 (a), the substrate 10 is prepared. Transistors such as the amplifier transistor 11, the interlayer insulating film 4, the insulating film 6, the planarization layer 7, and the like (see fig. 6) are formed on the substrate body 1 by using a known semiconductor manufacturing technique, thereby obtaining the substrate 10.

first, as shown in fig. 7 (a), a through hole 7a penetrating the insulating film 6 and the planarizing layer 7 to reach the negative power supply line 17 is formed in a region of the substrate 10 overlapping the negative power supply line 17 in a plan view. In addition, a through hole 7b that penetrates the insulating film 6 and the planarizing layer 7 and reaches the relay wiring 5 is formed in a region of the substrate 10 that overlaps the relay wiring 5 in a plan view. Then, for example, a Physical Vapor Deposition (PVD) method is used to form the conductive film 21a containing the high-melting-point metal on the substrate 10 with a film thickness of 100nm to 500 nm. Thereby, the conductive film 21a is formed so as to cover the substrate 10 and fill the through-holes 7a and 7 b.

If the film thickness of the conductive film 21a is 100nm or more, the wiring resistance of the conductive film 21a to be the lower electrode 21 and the relay electrode 26 can be suppressed from increasing. On the other hand, if the film thickness of the conductive film 21a is 500nm or less, it is possible to suppress the increase in the level difference between the lower electrode 21 and the relay electrode 26, and to suppress film peeling due to large internal stress caused by a thick film. In this embodiment, Mo (molybdenum) is used as the high melting point metal, and the conductive film 21a is formed by a sputtering method to have a film thickness of 250 nm.

next, as shown in fig. 7 (b), the conductive film 21a is patterned to form a lower electrode film 21b and a middle electrode 26. The contact hole CNT1 is formed by the conductive film filling the through hole 7a in the lower electrode film 21b, and the lower electrode film 21b is electrically connected to the negative power supply line 17 via the contact hole CNT 1. Further, contact hole CNT2 is formed by the conductive film filling through hole 7b in relay electrode 26, and relay electrode 26 is electrically connected to relay wiring 5 via contact hole CNT 2.

Next, as shown in fig. 7 c, the insulating layer 8 made of SiO _X and SiN _X is formed so as to cover the substrate 10 (the planarizing layer 7), the lower electrode film 21b, and the intermediate electrode 26. the insulating layer 8 is formed at a film thickness of 50nm or more and 700nm or less by, for example, a Chemical Vapor Deposition method (CVD). in the step of performing heat treatment described later, the insulating layer 8 plays a role of suppressing partial selenization in the lower electrode film 21b except for a desired region (a region where the intermediate layer 22 shown in fig. 8a is formed).

If the film thickness of the insulating layer 8 is 50nm or more, the coverage of the lower electrode film 21b and the intermediate electrode 26 can be ensured. On the other hand, if the film thickness of the insulating layer 8 is 700nm or less, film peeling due to large internal stress caused by a thick film can be suppressed. The thickness of the insulating layer 8 is preferably 100nm to 300 nm. In the present embodiment, the insulating layer 8 made of SiN is formed with a film thickness of 200 nm.

Next, an opening 8a is formed in a region of the insulating layer 8 that overlaps with the lower electrode film 21b in a plan view. The opening 8a is formed in a region that does not overlap the contact hole CNT1 in a plan view, with an area smaller than the outer shape of the lower electrode film 21 b. Thus, in the portion of the lower electrode film 21b other than the contact hole CNT1, the region inside the outer shape of the lower electrode film 21b is exposed from the opening 8 a. The relay electrode 26 is covered with the insulating layer 8.

Next, as shown in fig. 7 (d), a metal film containing a group 11 element and a group 13 element is formed on the lower electrode film 21 b. In the present embodiment, the metal film 23a and the metal film 23b are stacked by sputtering so as to cover the lower electrode film 21b and the insulating layer 8 exposed In the opening 8a, the metal film 23a is made of copper (Cu) as a group 11 element, and the metal film 23b is made of indium (In) as a group 13 element.

Next, the metal film 23a and the metal film 23b are subjected to heat treatment in a gas atmosphere containing a group 16 element. As the group 16 element, for example, selenium (Se), sulfur (S), tellurium (Te), or the like can be used. The temperature of the heat treatment is, for example, 400 ℃ to 550 ℃.

In this embodiment, hydrogen selenide (H ₂ Se) is used as the gas containing the group 16 element, and the heat treatment is performed at a temperature of 450 ℃ in an H ₂ Se atmosphere, it is to be noted that hydrogen sulfide (H ₂ S) may be used as the gas containing the group 16 element, or after the heat treatment is performed in an H ₂ Se atmosphere, the heat treatment may be further performed in an H ₂ S atmosphere.

this heat treatment is a treatment for reacting the metal films 23a and 23b with a group 16 element to form the p-type semiconductor layer 23 having a chalcopyrite structure (see fig. 8 (a)). If the temperature of the heat treatment is 400 ℃ or more, the metal film 23a and the metal film 23b react well with the group 16 element. On the other hand, if the temperature of the heat treatment is 550 ℃ or lower, adverse effects such as deformation of the substrate 10 (substrate body 1) and metal deposition due to exposure to high temperature can be suppressed.

In this way, by performing heat treatment in an H ₂ Se atmosphere, as shown in fig. 8 (a), the p-type semiconductor layer 23 composed of a chalcopyrite-structured semiconductor film is formed, and in this embodiment, by performing heat treatment in an H ₂ Se atmosphere, the metal film 23a (cu) and the metal film 23b (in) are selenized, and the p-type semiconductor layer 23 composed of a CIS (CuInSe ₂) -based film is formed.

In this case, In the step shown In fig. 7 (d), a metal film 23a made of an alloy of Cu and Ga is formed, and a metal film 23b made of In is stacked on the metal film 23a, and then, by performing heat treatment, the metal film 23a (cuga) and the metal film 23b (In) are selenized to form the p-type semiconductor layer 23 made of a CIGS (Cu (In, Ga) Se ₂) film.

further, by performing the heat treatment in the H ₂ Se atmosphere, the surface layer portion of the region of the lower electrode film 21b (Mo) overlapping the opening 8a in plan view is selenized to form a molybdenum selenide (MoSe ₂) film which is a molybdenum selenide, and this selenized film becomes the intermediate layer 22, and then, in the lower electrode film 21b, the Mo film of the non-selenized portion (the portion below the intermediate layer 22 in the region overlapping the opening 8a in plan view, and the portion not overlapping the opening 8a in plan view) becomes the lower electrode 21, and as a result, the intermediate layer 22 is disposed between the lower electrode 21 and the p-type semiconductor layer 23.

In this way, the p-type semiconductor layer 23 having a chalcopyrite structure is formed by the heat treatment, and a selenization film in which molybdenum is selenized is formed as the intermediate layer 22 between the lower electrode 21 and the p-type semiconductor layer 23 in the opening 8 a. Therefore, ohmic contact is obtained at the boundary between the lower electrode 21 and the intermediate layer 22 and the boundary between the intermediate layer 22 and the p-type semiconductor layer 23, and therefore, the contact resistance between the lower electrode 21 and the p-type semiconductor layer 23 can be suppressed to be low. In addition, the adhesion at the interface of the above layers can be improved.

the thickness of the intermediate layer 22(MoSe ₂ film) is preferably 100nm or less, the thicker the thickness of the intermediate layer 22, the thinner the thickness of the Mo film remaining as the lower electrode 21, and the higher the wiring resistance, and further, if the film thickness of the lower electrode film 21b is fully selenized, the lower electrode 21(Mo film) does not remain, and the p-type semiconductor layer 23 is peeled off from the substrate 10.

Note that if the Mo film is selenized to be a MoSe ₂ film, the thickness of the MoSe ₂ film is many times the thickness of the original Mo film, and in the present embodiment, the thickness of the intermediate layer 22(MoSe ₂ film) is about 100nm and the thickness of the remaining lower electrode 21(Mo film) is about 200nm with respect to the original thickness of 250nm of the lower electrode film 21 b.

In the above heat treatment, if the insulating layer 8 is not formed, the surface layer portion of the entire planar region of the lower electrode film 21b and the intermediate electrode 26 is selenized. Thus, the wiring resistance becomes high over the entire area of lower electrode 21 including contact hole CNT1 and relay electrode 26 including contact hole CNT 2. Further, if the surface layer portion of relay electrode 26 is selenized, the selenized film is interposed between relay electrode 26 and upper electrode 25 formed in contact with relay electrode 26 in a subsequent step, and the contact resistance between relay electrode 26 and upper electrode 25 is increased.

In contrast, in the present embodiment, since the region of the lower electrode film 21b other than the region where the intermediate layer 22 is formed and the entire region of the relay electrode 26 are covered with the insulating layer 8, selenization of these regions in the heat treatment can be suppressed. This can suppress wiring resistance of lower electrode 21 including contact hole CNT1 and relay electrode 26 including contact hole CNT2 to be low, and can suppress contact resistance between upper electrode 25 and relay electrode 26 to be low.

Next, as shown in fig. 8 (b), the p-type semiconductor layer 23 is patterned, and a portion of the p-type semiconductor layer 23 located on the insulating layer 8 is removed. Thus, the p-type semiconductor layer 23 is disposed on the intermediate layer 22 in the opening 8a of the insulating layer 8. The p-type semiconductor layer 23 may be patterned so as to be wider than the opening 8a and so as to spread the peripheral edge portion of the p-type semiconductor layer 23 over the insulating layer 8.

Next, opening 8b is formed in a region of insulating layer 8 that overlaps relay electrode 26 in a plan view and in a region that does not overlap contact hole CNT2 in a plan view. Thereby, relay electrode 26 is exposed in opening 8 b.

Next, as shown in fig. 8 (c), the protective layer 9 made of SiO _X and SiN _X is formed so as to cover the relay electrode 26, the p-type semiconductor layer 23, and the insulating layer 8, in the present embodiment, the protective layer 9 made of SiN is formed at a film thickness of 500nm by a chemical vapor deposition method, and then, the opening 9a is formed in a region of the protective layer 9 which overlaps with the p-type semiconductor layer 23 in a plan view, whereby the p-type semiconductor layer 23 is exposed in the opening 9 a.

Next, as shown in fig. 9 (a), an intrinsic semiconductor film and a semiconductor film doped with an n-type impurity are stacked on the p-type semiconductor layer 23 to form an n-type semiconductor layer 24, in this embodiment, an undoped i-ZnO film and a ZnO (n ⁺) film doped with an n-type impurity are stacked by a sputtering method to form a film, and patterning is performed to form the n-type semiconductor layer 24.

Next, as shown in fig. 9 (b), in order to form contact hole CNT3 in the region of protective film 9 overlapping opening 8b in plan view, through hole 9b reaching relay electrode 26 is formed. Thereby, the relay electrode 26 is exposed in the through hole 9 b. Note that, instead of forming the opening 8b in the insulating layer 8 by the step shown in fig. 8 (b), the through hole 9b may be formed so as to penetrate the protective layer 9 and the insulating layer 8 by the step shown in fig. 9 (b).

next, as shown in fig. 9 (c), the upper electrode 25 is formed of a transparent conductive film so as to cover the n-type semiconductor layer 24 and fill the through hole 9 b. In this embodiment, an ITO film is formed on n-type semiconductor layer 24 and protective layer 9 by a sputtering method, and patterned to form upper electrode 25. This makes it possible to form the photodiode 20 having the p-type semiconductor layer 23 and the n-type semiconductor layer 24 stacked between the lower electrode 21 and the upper electrode 25, and the intermediate layer 22 disposed between the lower electrode 21 and the p-type semiconductor layer 23.

In addition, contact hole CNT3 is formed by filling through hole 9b with a conductive film constituting upper electrode 25. Thus, the upper electrode 25 is electrically connected to the relay electrode 26 via the contact hole CNT3, the relay wiring 5 via the contact hole CNT2, and the gate electrode 3g via the relay wiring 5. As a result, the photosensor 50 having the photodiode 20 is constructed.

In this way, the image sensor 100 including the photosensor 50 according to the first embodiment is completed. According to the method of manufacturing a photoelectric conversion device of the first embodiment, the region of the lower electrode 21 where the intermediate layer 22 is formed is selectively selenized, and the region of the lower electrode 21 and the relay electrode 26 other than this region are covered with the insulating layer 8, whereby selenization can be suppressed. As a result, the image sensor 100 having excellent photoelectric conversion efficiency and high photosensitivity in the wavelength range from visible light to near-infrared light, which is highly reliable, can be stably manufactured.

Second embodiment

Photoelectric conversion device

in the second embodiment, the configuration of the photosensor in the image sensor 100 as the photoelectric conversion device is different from that of the first embodiment. A photosensor 60 of the second embodiment is explained with reference to fig. 10. Fig. 10 is a schematic cross-sectional view showing the structure of a photosensor according to the second embodiment.

As shown in fig. 10, a photosensor 60 according to the second embodiment includes a substrate 10 and a photodiode 30 provided on the substrate 10. The substrate 10 has the same configuration as that of the first embodiment. The photodiode 30 of the second embodiment is configured by a lower electrode 31 as a first electrode, an intermediate layer 22 as a selenization film, a p-type semiconductor layer 23, an n-type semiconductor layer 24, and an upper electrode 25 as a second electrode, which are stacked in this order from the substrate 10 side. In addition, the photosensor 60 has a relay electrode 34 as a third electrode on the substrate 10 (on the planarization layer 7).

The photoelectric sensor 60 of the second embodiment is different from the photoelectric sensor 50 of the first embodiment in that: the insulating layer 8 is not provided on the substrate 10 (the planarization layer 7), and the metal oxide layer 32 is provided on the lower electrode 31 and the metal oxide layer 35 is provided on the relay electrode 34. Here, the photosensor 60 of the second embodiment will be described mainly with respect to differences from the photosensor 50 of the first embodiment.

the lower electrode 31 and the intermediate electrode 34 are formed on the same layer on the substrate 10 (on the planarization layer 7). Similarly to the first embodiment, the lower electrode 31 and the relay electrode 34 are formed of a conductive film containing a high-melting metal as a first metal. The planar shapes and the arrangements of the lower electrode 31 and the relay electrode 34 are the same as those of the lower electrode 21 and the relay electrode 26 in the first embodiment.

Through hole 7a provided in planarization layer 7 is filled with a conductive film constituting lower electrode 31, thereby forming contact hole CNT1 for electrical connection to negative power supply line 17. In addition, through hole 7b provided in planarizing layer 7 is filled with a conductive film constituting relay electrode 34, thereby forming contact hole CNT2 for electrical connection to relay wiring 5.

The metal oxide layer 32 is formed on the lower electrode 31, the metal oxide layer 35 is formed on the relay electrode 34, the metal oxide layer 32 and the metal oxide layer 35 are formed of oxides of high-melting-point metals constituting the lower electrode 31 and the relay electrode 34, that is, the metal oxide layer 32 and the metal oxide layer 35 are layers obtained by oxidizing the surface layer portion of a conductive film (a conductive film 21a shown in fig. 11 (a)) formed as the lower electrode 31 and the relay electrode 34, and when Mo is used as the high-melting-point metal constituting the lower electrode 31 and the relay electrode 34, the metal oxide layer 32 and the metal oxide layer 35 are formed of molybdenum oxide (MoO ₂, MoO ₃, or the like).

The metal oxide layer 32 and the metal oxide layer 35 function as follows, similarly to the insulating layer 8 of the first embodiment: in the step of performing the heat treatment for forming the p-type semiconductor layer 23 having the chalcopyrite structure (see fig. 11 (d)), selenization of the conductive film 31a serving as the lower electrode 31 and the relay electrode 34 is suppressed except for the region where the intermediate layer 22 is formed.

The metal oxide layer 32 formed on the lower electrode 31 has an opening 33. the intermediate layer 22 formed of a selenization film (MoSe ₂ or the like) obtained by selenizing a surface layer portion of a conductive film formed as the lower electrode 31 is disposed in a region overlapping the opening 33 in a plan view on the lower electrode 31. a portion of the lower electrode 31 overlapping the intermediate layer 22 in a plan view has a layer thickness smaller than that of a peripheral portion. the layer thickness of the intermediate layer 22 is substantially the same as that of the first embodiment. in addition, a portion of the lower electrode 31 overlapping the intermediate layer 22 in a plan view has a layer thickness smaller than that of the relay electrode 34.

In the photosensor 60 of the second embodiment, the intermediate layer 22 made of a selenide film is also disposed between the lower electrode 31 of the photodiode 30 and the p-type semiconductor layer 23. Therefore, ohmic contact can be obtained at the boundaries of the lower electrode 31, the intermediate layer 22, and the p-type semiconductor layer 23, and therefore the contact resistance between the lower electrode 31 and the p-type semiconductor layer 23 can be suppressed to be low. In addition, the adhesion at the interface of the above layers can be improved. Since no selenide film is formed in the region of the lower electrode 31 other than the portion in contact with the p-type semiconductor layer 23, the wiring resistance of the lower electrode 31 can be kept low.

The metal oxide layer 35 formed on the relay electrode 34 has an opening 36. The relay electrode 34 is electrically connected to the upper electrode 25 provided on the upper layer via a contact hole CNT3 formed in a region overlapping with the opening 36 in a plan view. Since the metal oxide layer 35 and the selenide film are not formed in the portion of the relay electrode 34 in contact with the upper electrode 25, the contact resistance between the relay electrode 34 and the upper electrode 25 can be kept low. Further, since no selenide film is formed on the relay electrode 34 over the entire region of the relay electrode 34 where light does not contact the upper electrode 25, the wiring resistance of the relay electrode 34 can be kept low.

Preferably, the layer thickness of the metal oxide layer 32 and the metal oxide layer 35 is about 10nm to 100 nm. For example, if the conductive film formed as the lower electrode 31 and the relay electrode 34 has a film thickness of 250nm and a portion having a layer thickness of 50nm on the surface layer side is oxidized, the surface layer side of the conductive film becomes thicker with the oxidation, and the metal oxide layer 32 and the metal oxide layer 35 having a layer thickness of about 100nm are formed. In this case, the conductive film having a layer thickness of about 200nm remains as the lower electrode 31 and the intermediate electrode 34.

As described above, the photodiode 30 of the second embodiment also has the p-type semiconductor layer 23 having the chalcopyrite structure, similarly to the photodiode 20 of the first embodiment, and therefore has an excellent photoelectric conversion rate and high photosensitivity in a wide wavelength range from visible light to near-infrared light. Further, since ohmic contact can be obtained at the boundaries of each of the lower electrode 31, the intermediate layer 22, and the p-type semiconductor layer 23, the contact resistance between the lower electrode 31 and the p-type semiconductor layer 23 can be suppressed to be low. In addition, since the contact hole CNT1 portion of the lower electrode 31 and the relay electrode 34 including the contact hole CNT2 portion are not selenized, the wiring resistance can be suppressed to be low. As described above, the image sensor 100 can be provided that can stably operate with high sensitivity over a wide wavelength range from visible light to near-infrared light, as in the first embodiment.

Method for manufacturing photoelectric conversion device

Next, a method for manufacturing a photoelectric conversion device according to a second embodiment will be described with reference to fig. 11, 12, and 13. Here, the differences from the first embodiment will be mainly described with respect to the method for manufacturing the photoelectric sensor 60. Fig. 11, 12, and 13 are diagrams illustrating a method of manufacturing a photosensor according to a second embodiment. Each of fig. 11, 12, and 13 corresponds to a partial enlarged view of fig. 10.

First, as shown in fig. 11 (a), similarly to the first embodiment, a conductive film 21a containing a high-melting-point metal such as Mo (molybdenum) is formed so as to cover the substrate 10 (the planarizing layer 7) and fill the through-holes 7a and 7b of the planarizing layer 7. In the second embodiment, Mo (molybdenum) is also used as the high melting point metal, and the conductive film 21a is formed by sputtering to a film thickness of 250 nm.

Next, as shown in fig. 11 (b), the surface layer side of the conductive film 21a is oxidized to form a metal oxide film 32 a. As a method for forming the metal oxide film 32a, for example, sputtering in an oxygen atmosphere, heat treatment in an oxygen atmosphere (at a high temperature of 250 ℃ or higher), or the like can be used. In the conductive film 21a (see fig. 11 a), the surface layer side is oxidized to form a metal oxide film 32a, and the unoxidized portion remains as the conductive film 31 a. As a result, the conductive film 31a and the metal oxide film 32a covering the conductive film 31a are formed on the substrate 10.

As described above, the thickness of the metal oxide film 32a is preferably about 10nm to 100nm, and if the thickness of the metal oxide film 32a is 10nm, selenization of the conductive film 31a except for the region where the intermediate layer 22 is formed can be suppressed satisfactorily in the heat treatment described later, and if the thickness of the metal oxide film 32a is 100nm or less, the processing for removing the metal oxide film 32a can be easily performed when the opening 33 is formed in the metal oxide film 32a in the next step, and in the present embodiment, the thickness of the metal oxide film 32a (MoO _X) is about 100nm and the thickness of the remaining conductive film 31a (mo) is about 200nm with respect to the original thickness of 250nm of the conductive film 21 a.

Next, as shown in fig. 11 (c), the portion of the metal oxide film 32a which overlaps with the region where the intermediate layer 22 is formed in a plan view is removed by etching or the like, thereby forming an opening 33. In the etching treatment, the etching amount is appropriately adjusted so that the metal oxide film 32a in the opening 33 is reliably removed without making the film thickness of the conductive film 31a too thin. Thereby, the conductive film 31a is exposed in the opening 33 of the metal oxide film 32 a.

Next, as shown In fig. 11 (d), a metal film 23a made of copper (Cu) and a metal film 23b made of indium (In) are stacked as metal films containing a group 11 element and a group 13 element by a sputtering method or the like so as to cover the conductive film 31a and the metal oxide film 32a exposed In the opening 33.

Next, as shown in fig. 11 (d), the metal film 23a and the metal film 23b are subjected to heat treatment in an atmosphere of a gas containing a group 16 element, and in the second embodiment, hydrogen selenide (H ₂ Se) is also used as a gas containing a group 16 element, and heat treatment is performed at a temperature of 450 ℃ in an atmosphere of H ₂ Se.

As shown in fig. 12 (a), a p-type semiconductor layer 23 composed of a chalcopyrite-structured semiconductor film is formed by performing heat treatment in an H ₂ Se atmosphere, in this embodiment, a p-type semiconductor layer 23 composed of a CIS (CuInSe ₂) -based film is formed, and in addition, a surface layer portion of a region overlapping with the opening 33 in a plan view in the conductive film 31a (mo) is selenized to form an intermediate layer 22 composed of a molybdenum selenide (MoSe ₂) film, and as a result, the intermediate layer 22 is disposed between the conductive film 31a serving as the lower electrode 31 and the p-type semiconductor layer 23.

In the present embodiment, the film thickness of the intermediate layer 22(MoSe ₂) is about 100nm and the film thickness of the remaining conductive film 31a (mo) is about 150nm with respect to the original 200nm film thickness of the conductive film 31a, and as a result, the thickness of the portion of the conductive film 31a that overlaps with the intermediate layer 22 in a plan view is thinner than the thickness of the other region of the conductive film 31a including the portion that becomes the relay electrode 34 in the subsequent step.

in this heat treatment, since the regions of the conductive film 31a other than the region inside the opening 33 where the intermediate layer 22 is formed are covered with the metal oxide film 32a, selenization of these regions can be suppressed. This can suppress wiring resistance of the lower electrode 31 including the contact hole CNT1 formed in the subsequent step and the relay electrode 34 including the contact hole CNT2, and also suppress contact resistance between the upper electrode 25 and the relay electrode 34.

Here, the metal film 23a (and the metal film 23b) formed in the step shown in fig. 11 (d) is in contact with the conductive film 31a in the opening 33 of the metal oxide film 32a, and is in contact with the metal oxide film 32a in the region other than the inside of the opening 33. Then, p-type semiconductor layer 23 formed by heat treatment as shown in fig. 12 (a) is in contact with intermediate layer 22 in opening 33 of metal oxide film 32a, and is in contact with metal oxide film 32a in a region other than in opening 33. The adhesion between the p-type semiconductor layer 23 (or the metal film 23a before heat treatment) and the metal oxide film 32a is better than the adhesion between the p-type semiconductor layer 23 (or the metal film 23a before heat treatment) and the insulating layer 8 in the first embodiment.

Therefore, in the second embodiment, the adhesion of the p-type semiconductor layer 23 (or the metal film 23a before heat treatment) to the substrate 10 side is improved, compared to the case where the p-type semiconductor layer 23 (or the metal film 23a before heat treatment) is in contact with the insulating layer 8 in the region of the insulating layer 8 other than the inside of the opening 8a in the first embodiment (see fig. 8 (a)). Therefore, the p-type semiconductor layer 23 (or the stacked metal film 23a and metal film 23b) is less likely to float and peel off from the process shown in fig. 11 (d) to the process shown in fig. 12 (b) than in the first embodiment. As a result, the second embodiment can achieve production stability and improve the manufacturing yield as compared with the first embodiment.

Next, as shown in fig. 12 (b), the p-type semiconductor layer 23 is patterned, and a portion of the p-type semiconductor layer 23 located on the metal oxide film 32a is removed. Thus, p-type semiconductor layer 23 is disposed on intermediate layer 22 in opening 33 of metal oxide film 32 a.

Next, as shown in fig. 12 (c), the conductive film 31a is patterned to form the lower electrode 31 and the intermediate electrode 34. The lower electrode 31 is electrically connected to the negative power supply line 17 through the contact hole CNT1 by forming the contact hole CNT1 through the conductive film filling the through hole 7a of the planarization layer 7 in the lower electrode 31. Contact hole CNT2 is formed by the conductive film filling through hole 7b of planarization layer 7 in relay electrode 34, and relay electrode 34 is electrically connected to relay wiring 5 through contact hole CNT 2. In addition, by patterning the conductive film 31a, the metal oxide film 32a is also patterned, the metal oxide layer 32 is disposed on the lower electrode 31, and the metal oxide layer 35 is disposed on the relay electrode 34.

next, as shown in fig. 12 (d), a part of a region of metal oxide layer 35 on relay electrode 34 that does not overlap contact hole CNT2 (through hole 7b of planarization layer 7) in a plan view is removed by etching or the like, thereby forming opening 36. Thereby, the relay electrode 34 is exposed in the opening 36 of the metal oxide layer 35. In the opening 36, the upper electrode 25 formed in an upper layer in a subsequent step is electrically connected to the relay electrode 34.

next, as shown in fig. 13 (a), the protective layer 9 made of SiO _X or SiN _X is formed so as to cover the lower electrode 31, the metal oxide layer 32, the p-type semiconductor layer 23, the relay electrode 34, and the metal oxide layer 35, and then the opening 9a is formed in a region of the protective layer 9 which overlaps with the p-type semiconductor layer 23 in a plan view, whereby the p-type semiconductor layer 23 is exposed in the opening 9 a.

Next, as shown in fig. 13 (b), an intrinsic semiconductor film such as an undoped i-ZnO film and a semiconductor film such as a ZnO (n ⁺) film doped with an n-type impurity are stacked on the p-type semiconductor layer 23 by a sputtering method or the like to form an n-type semiconductor layer 24.

Next, as shown in fig. 13 (c), through hole 9b reaching relay electrode 34 is formed to form contact hole CNT3 in the region of protective film 9 overlapping opening 36 of metal oxide layer 35 in plan view. Thereby, the relay electrode 34 is exposed in the through hole 9 b.

Next, the upper electrode 25 is formed by a conductive film having light transmittance such as an ITO film by a sputtering method or the like so as to cover the n-type semiconductor layer 24 and fill the through hole 9 b. As a result, as shown in fig. 10, the photodiode 30 having the p-type semiconductor layer 23 and the n-type semiconductor layer 24 stacked between the lower electrode 31 and the upper electrode 25 and the intermediate layer 22 disposed between the lower electrode 31 and the p-type semiconductor layer 23 is configured.

Further, through hole 9b is filled with a conductive film constituting upper electrode 25, thereby forming contact hole CNT 3. Thus, the upper electrode 25 is electrically connected to the relay electrode 34 via the contact hole CNT3, the relay wiring 5 via the contact hole CNT2, and the gate electrode 3g via the relay wiring 5. As a result, the photosensor 60 having the photodiode 30 is constructed.

In this way, the image sensor 100 including the photosensor 60 according to the second embodiment is completed. According to the method of manufacturing a photoelectric conversion device of the second embodiment, similarly to the first embodiment, selenization can be suppressed by selectively selenizing the region of the lower electrode 31 where the intermediate layer 22 is formed, and covering the region of the lower electrode 31 and the relay electrode 34 other than this region with the metal oxide layer 32 and the metal oxide layer 35.

Thus, as compared with the first embodiment, the occurrence of floating and film peeling of the p-type semiconductor layer 23 can be suppressed more, production stability can be achieved, and the manufacturing yield can be improved. As a result, the highly reliable image sensor 100 having an excellent photoelectric conversion rate and high photosensitivity in the wavelength range from visible light to near-infrared light can be manufactured more stably.

The above embodiment is merely one mode of the present invention, and any modification and application can be made within the scope of the present invention. As a modification example, the following modifications are conceivable, for example.

Modification example 1

In the second embodiment, the metal oxide film 32a formed on the conductive film 31a by the step shown in fig. 11 (b) is configured to remain as the metal oxide layer 32 on the lower electrode 31 and the metal oxide layer 35 on the relay electrode 34 even in a state where the photosensor 60 shown in fig. 10 is completed, but the present invention is not limited to this embodiment. For example, the metal oxide film 32a (the metal oxide layer 32 and the metal oxide layer 35) may be left. Fig. 14 is a diagram illustrating a method of manufacturing the photosensor according to modification 1.

Fig. 14 (a) corresponds to a step of patterning the p-type semiconductor layer 23 shown in fig. 12 (b) of the second embodiment to remove a region other than the portion located on the intermediate layer 22. As shown in fig. 14 (a), in modification 1, when the p-type semiconductor layer 23 is patterned, the metal oxide film 32a is removed over the entire area on the conductive film 31a by overetching. Thus, since the conductive film 31a is exposed over the entire region including the portion to be the relay electrode 34, it is not necessary to perform the step of forming the opening 36 in the metal oxide layer 35 to expose the relay electrode 34 as shown in fig. 12 (d) in the second embodiment.

After that, as in the second embodiment, the conductive film 31a is patterned to form the lower electrode 31 and the relay electrode 34, and then, as shown in fig. 14 (b), the protective layer 9 is formed so as to cover the lower electrode 31, the p-type semiconductor layer 23, and the relay electrode 34. Then, as shown in fig. 14 (c), if the through hole 9b for forming the contact hole CNT3 is formed in the protective layer 9, the relay electrode 34 is exposed in the through hole 9 b. Therefore, according to the method of manufacturing the photosensor of modification 1, the process shown in fig. 12 (d) is not required as compared with the second embodiment, and therefore, the productivity of the image sensor 100 can be improved.

Modification 2

in the above embodiment, the p-type semiconductor layer 23 is formed of a film of CIS-based or CIGS-based chalcopyrite structure containing a group 11 element, a group 13 element, and a group 16 element, but the present invention is not limited to this embodiment, and for example, the p-type semiconductor layer 23 may be formed using a film of CZTS (Cu ₂ ZnSnS ₄) based on group 11 element, group 12 element, group 14 element, and group 16 element, and for example, in the steps shown in fig. 7 (d) and 11 (d), the p-type semiconductor layer 23 may be formed of a CZTS-based film by forming a metal film of copper (Cu) as the group 11 element, zinc (Zn) as the group 12 element, and tin (Sn) as the group 14 element on the lower electrode film 21b and performing heat treatment in an atmosphere containing sulfur (S) as the group 16 element.

Modification 3

In the above-described embodiment, the image sensor 100 including the photodiode 20 or the photodiode 30 having the semiconductor film having the chalcopyrite structure has been described as an example of the photoelectric conversion device, but the present invention is not limited to this embodiment. The photoelectric conversion device may be a solar cell including the photodiode 20 or the photodiode 30 having a semiconductor film having a chalcopyrite structure.

Modification example 4

In the above embodiment, the biological information acquisition device 200 is described as an example of an electronic apparatus, and the biological information acquisition device 200 is a portable information terminal device capable of acquiring information such as image information of blood vessels and specific components in blood, but the present invention is not limited to this embodiment. The electronic device may be an information terminal device of a different form such as a stationary type, or may be a biometric authentication device that acquires image information of a finger vein and compares the image information with image information of a vein registered in advance to specify an individual. The electronic device may be a solid-state imaging device for capturing a fingerprint, an iris of an eyeball, or the like.

Claims

1. A photoelectric conversion device is characterized by comprising:

A first electrode comprising a first metal;

A second electrode disposed on an upper layer of the first electrode;

A semiconductor layer disposed between the first electrode and the second electrode; and

A third electrode comprising the first metal,

The first electrode and the third electrode are formed on the same layer,

A selenization film of the first metal is formed over the first electrode,

A selenization film of the first metal is not formed on the third electrode,

An insulating layer and a protective layer are positioned between the first electrode and the second electrode, the protective layer covering the insulating layer.

2. The photoelectric conversion apparatus according to claim 1,

The layer thickness of the first electrode is thinner than the layer thickness of the third electrode.

3. the photoelectric conversion apparatus according to claim 1 or 2,

An insulating layer having an opening is formed over the first electrode and the third electrode, and the selenide film is disposed in a region overlapping with the opening in a plan view.

4. The photoelectric conversion apparatus according to claim 1 or 2,

A metal oxide layer having an opening portion is formed on the first electrode and the third electrode,

The selenide film is disposed in a region overlapping with the opening in a plan view.

5. The photoelectric conversion apparatus according to claim 1 or 2,

The second electrode is electrically connected to the third electrode.

6. The photoelectric conversion apparatus according to claim 5,

The photoelectric conversion device is also provided with a transistor,

The third electrode is electrically connected to a gate electrode of the transistor.

7. The photoelectric conversion apparatus according to claim 1 or 2,

The semiconductor layer includes a semiconductor film of chalcopyrite structure.

8. An electronic device is characterized by comprising:

The photoelectric conversion device according to any one of claims 1 to 7; and

and a light-emitting device stacked on the photoelectric conversion device.

9. A method for manufacturing a photoelectric conversion device, comprising:

Forming a conductive film containing a first metal on a substrate to form a first electrode and a third electrode;

Disposing a second electrode on an upper layer of the first electrode;

Forming an insulating layer covering the third electrode and having an opening portion over the first electrode;

Forming a metal film containing a group 11 element and a group 13 element in the opening portion; and

The metal film is selenized and then is subjected to selenization,

In the selenization step, a surface layer portion of the first electrode is made to be a selenide of the first metal and a surface layer portion of the third electrode is not made to be a selenide of the first metal,

10. A method for manufacturing a photoelectric conversion device, comprising:

disposing a second electrode on an upper layer of the first electrode;

Forming a metal oxide layer covering the third electrode and having an opening portion on the first electrode;

The metal film is selenized and then is subjected to selenization,