CN105679360A - Refreshable nonvolatile memory and refreshing method thereof - Google Patents
Refreshable nonvolatile memory and refreshing method thereof Download PDFInfo
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- CN105679360A CN105679360A CN201610005750.7A CN201610005750A CN105679360A CN 105679360 A CN105679360 A CN 105679360A CN 201610005750 A CN201610005750 A CN 201610005750A CN 105679360 A CN105679360 A CN 105679360A
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- nonvolatile memory
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/02—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/75—Array having a NAND structure comprising, for example, memory cells in series or memory elements in series, a memory element being a memory cell in parallel with an access transistor
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- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention provides a refreshable nonvolatile memory and a refreshing method thereof. The nonvolatile memory includes a memory array for storing data, and a controller connected with the memory array and used for periodically refreshing the data stored in the memory array; periodic refreshing for periodically refreshing the data stored in the memory array through the controller improves the reliability of data storage, and data loss caused due to too short memory data retention time is avoided.
Description
Technical field
The present invention relates to memory technology field, particularly relate to a kind of refreshable nonvolatile memory and method for refreshing thereof.
Background technology
DRAM (DynamicRandomAccessMemory), i.e. dynamic random access memory, is most commonly seen Installed System Memory, and the feature of DRAM is: read or write speed is fast, and service behaviour is high, and has infinite read-write number of times. But DRAM uses electric capacity storage, owing to electric charge leaks electricity data hold time (retentiontime) very of short duration of DRAM memory cell, in order to keep data not lose, (refresh) must be refreshed once every a period of time, therefore system power dissipation increases therewith, and along with the raising of the decline of process node and memory size, the proportion that refresh power consumption accounts for is also increasing.
Owing to DRAM exists above-mentioned shortcoming, so being badly in need of novel memorizer to substitute DRAM, therefore the memorizer of a lot of new materials and novel memory mechanism becomes the focus of current research. At present, novel memory devices can be divided into by chip type: phase transition storage (PCM), magnetic RAM (MRAM), resistive formula memorizer (RRAM), ferroelectric memory (FeRAM) etc., the time that the data of these different types of novel memory devices storage preserve more than 10 years, can be consequently belonging to non-volatile memorizer.
But, above-mentioned all types of novel memory devices of the prior art have the read-write number of times of restriction, and therefore, the number of times read and write when above-mentioned novel memory devices just cannot store user data after having reached the upper limit reliably. Further, above-mentioned all types of novel memory devices is due to the difference of chip type, and the data stored in different environments can be influenced by impact, even causes the loss of data. Such as: phase transition storage (PCM) temperature influence is relatively larger, magnetic RAM (MRAM) is affected by magnetic fields greatly, ferroelectric memory (FeRAM) is affected greatly by electric field, it is likely to cause the loss of data in these cases, the heart and server field are unavoidably by the impact of these environmental conditions especially in the data, thus affecting the time decline of the reliability of data storage, data maintenance.
Summary of the invention
For the problems referred to above that prior art exists, it is desirable to provide a kind of refreshable nonvolatile memory and method for refreshing thereof, thus improving the reliability of data storage, it is to avoid due to the too short loss of data caused of memory data retention time.
Concrete technical scheme is as follows:
A kind of refreshable nonvolatile memory, nonvolatile memory includes: storage array, in order to store data; Controller, is connected with storage array, in order to the data in storage array regularly to be refreshed.
Further, storage array is novel Nonvolatile storage array or flash memory storage array.
Further, novel Nonvolatile storage array is phase change memory array or magnetoresistive memory array or ferroelectric memory array or resistive memory array.
Further, flash memory storage array is SLCNAND array and/or MLCNAND array and/or 3D.
Further, the component changing the storage medium in storage array improves the erasable number of times of storage array.
Present invention also offers the method for refreshing of a kind of refreshable nonvolatile memory, including actively refreshing, the process actively refreshed includes step:
The state of detection nonvolatile memory;
When nonvolatile memory is in idle condition, read storage inside value;
The figure place of the wrong data in acquisition storage inside value;
Whether the figure place of misjudgment data is less than default early warning value;
If more than, then nonvolatile memory refreshes;
Otherwise, it is left intact.
Further, method also includes passive refreshing, and that passively refreshes includes step:
Main frame obtains the figure place of wrong data when reading storage array;
Whether the figure place of misjudgment data is less than default early warning value;
If more than, then nonvolatile memory refreshes;
Otherwise, it is left intact.
Compared with prior art, nonvolatile memory includes: storage array and controller, storage array, in order to store data; Controller, it is connected with described storage array, in order to the data in described storage array are regularly refreshed, by the data in storage array carry out regularly refreshing the read-write upper limit therefore improving nonvolatile memory under the premise that ensure that time that data of nonvolatile storage preserves, and it is avoided that due to the too short loss of data caused of memory data retention time, it is an advantage of the current invention that: by regularly refreshing of nonvolatile memory is improve the reliability that data store, it is to avoid due to the too short loss of data caused of memory data retention time.
Accompanying drawing explanation
Fig. 1 is the framework view of the refreshable nonvolatile memory that embodiments of the invention provide;
Fig. 2 is the flow chart actively refreshed in the method for refreshing of the refreshable novel memory devices provided in embodiments of the invention;
Fig. 3 is the flow chart passively refreshed in the method for refreshing of the refreshable novel memory devices provided in embodiments of the invention;
Fig. 4 is the structure chart of the phase-change memory device provided in embodiments of the invention.
In figure, 1, controller; 2, storage array; 3, main frame; 4, GST layer; 5, resistance.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments. Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under the premise not making creative work, broadly fall into the scope of protection of the invention.
Below in conjunction with the drawings and specific embodiments, the invention will be further described, but not as limiting to the invention.
Embodiment 1
Fig. 1 is the framework view of the refreshable nonvolatile memory that embodiments of the invention provide. As it is shown in figure 1, the refreshable nonvolatile memory that the present embodiment provides, nonvolatile memory includes: storage array, in order to store data; Controller, is connected with storage array, in order to the data in storage array regularly to be refreshed.
Refreshable nonvolatile memory includes controller 1 and storage array 2, and, controller 1 is connected with outside main frame 3, launch signal by main frame 3 to control controller 1 data in storage array 2 are regularly refreshed, therefore under the premise that ensure that time that data of nonvolatile storage preserves, improve the read-write upper limit of nonvolatile memory, and it is avoided that due to the long loss of data caused of memory data retention time, meanwhile, the refreshable nonvolatile memory that the present embodiment provides may be used on any one-level in Computer Storage framework.
Storage array 2 is novel Nonvolatile storage array or flash memory storage array; Wherein, novel Nonvolatile storage array is phase change memory array or magnetoresistive memory array or ferroelectric memory array or resistive memory array; Flash memory storage array is SLCNAND array or/and MLCNAND array is or/and 3DNAND array.
Fig. 2 is the flow chart actively refreshed in the method for refreshing of the refreshable nonvolatile memory provided in embodiments of the invention. As in figure 2 it is shown, the method for refreshing of the refreshable nonvolatile memory provided in embodiments of the invention includes actively refreshing, the process actively refreshed includes step:
The state S01 of detection nonvolatile memory, it is judged that whether nonvolatile memory is in idle condition S02, reads storage inside value S03 when nonvolatile memory is in idle condition; The figure place S04 of the wrong data in acquisition storage inside value; Whether the figure place of misjudgment data is less than default early warning value S05; If the figure place of wrong data is more than default early warning value, carrying out nonvolatile memory refreshing S06, if the figure place of wrong data is less than default early warning value, be left intact S07.
Embodiment 2
Fig. 3 is the flow chart passively refreshed in the method for refreshing of the refreshable nonvolatile memory provided in embodiments of the invention. As it is shown on figure 3, passive refreshing includes step, main frame obtains the wrong figure place S08 of data when reading storage array, it is judged that whether the figure place of wrong data is less than default early warning value S09; If the figure place of wrong data is more than default early warning value, carrying out nonvolatile memory refreshing S10, if the figure place of wrong data is less than default early warning value, be left intact S11. Wherein, the timing cycle of the wrong figure place of timing acquisition data is 7 days, 30 days or 180 days.
In implementing at above-mentioned two, nonvolatile memory is flash memory or phase transition storage or magnetic RAM or resistive formula memorizer or and ferroelectric memory.
In the present embodiment, the method for refreshing of refreshable nonvolatile memory can also include regular refreshing, namely regular nonvolatile memory is refreshed.
Embodiment three
As shown in Figure 4, it it is the structure chart of the phase-change memory device provided in embodiments of the invention, phase transition storage (PCM) is a kind of non-volatile memory device, with Ge2Sb2Te5 (GST) combination materials for storage medium, the advantage such as have that reading speed is fast, low in energy consumption, integrated level is high and CMOS technology is compatible.
Phase transition storage has: GST layer, and a resistance 5 is connected to the lower end of GST layer, only affects the small region around this resistance 5 top in heating or melting process. When writing " 0 " operation (RESET), pulse applies high resistance 5, forms a piece of amorphous layer region on device; During one writing operation (SET), apply the electric pulse of a suitable amplitude and last longer, make amorphous layer recrystallization return to crystallization too, device forms the polycrystalline of low-resistance too. By learning above: phase transition storage (PCM) is that the reversible phase transformation utilizing material is to store information, phase transition storage (PCM) is one of nonvolatile memory (NCM), so phase transition storage (PCM) also has limited number of time read-write number of times (endurance), namely erasable number of times is 106～109Secondary, equally to data retention time >=10 years (Retention).
The refreshable nonvolatile memory that the present embodiment provides can improve the read-write upper limit of nonvolatile memory by changing the component of storage medium, such as: in order to increase the read-write number of times upper limit of phase transition storage (PCM), can be realized by the content of increase Sb, the read-write number of times upper limit of phase transition storage (PCM) can be increased although it is so, but, the time that data are kept can be reduced, the method for refreshing of the nonvolatile memory provided in embodiments of the invention so can be provided, regular carries out refresh operation to phase transition storage (PCM), although it is so that the performance impact of phase transition storage is also little, but the read-write number of times of phase transition storage can be greatly improved, extend its service life.
These are only preferred embodiment of the present invention; not thereby restriction embodiments of the present invention and protection domain; to those skilled in the art; the equivalent replacement done by all utilizations description of the present invention and diagramatic content and the obtained scheme of apparent change should be can appreciate that, all should be included in protection scope of the present invention.
Claims (7)
1. a refreshable nonvolatile memory, it is characterised in that described nonvolatile memory includes:
Storage array, in order to store data;
Controller, is connected with described storage array, in order to the data in described storage array regularly to be refreshed.
2. refreshable nonvolatile memory according to claim 1, it is characterised in that described storage array is novel Nonvolatile storage array or flash memory storage array.
3. refreshable nonvolatile memory according to claim 2, it is characterised in that described novel Nonvolatile storage array is phase change memory array or magnetoresistive memory array or ferroelectric memory array or resistive memory array.
4. refreshable nonvolatile memory according to claim 2, it is characterised in that flash memory storage array is SLCNAND array and/or MLCNAND array and/or 3DNAND array.
5. refreshable nonvolatile memory according to claim 1, it is characterised in that change the component of the storage medium in described storage array to improve the erasable number of times of described storage array.
6. the method for refreshing of a refreshable nonvolatile memory, it is characterised in that described method includes actively refreshing, and the process that described active refreshes includes step:
Detect the state of described nonvolatile memory;
When described nonvolatile memory is in idle condition, read storage inside value;
Obtain the figure place of wrong data in described storage inside value;
Judge that whether the figure place of described wrong data is less than default early warning value;
If more than, then described nonvolatile memory refreshes;
Otherwise, it is left intact.
7. the method for refreshing of refreshable nonvolatile memory according to claim 6, it is characterised in that described method also includes passive refreshing, described passive refreshing include step:
Main frame obtains the figure place of described wrong data when reading described storage array;
Judge that whether the figure place of described wrong data is less than default early warning value;
If more than, then described nonvolatile memory refreshes;
Otherwise, it is left intact.
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Cited By (6)
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| CN107832012A (en) * | 2017-11-03 | 2018-03-23 | 重庆大学 | A kind of method that online mining flash memory system journey difference phenomenon optimization refreshes |
| CN108133728A (en) * | 2018-01-18 | 2018-06-08 | 上海新储集成电路有限公司 | A kind of non-volatile RAM |
| WO2019141050A1 (en) * | 2018-01-19 | 2019-07-25 | 华为技术有限公司 | Refreshing method, apparatus and system, and memory controller |
| CN110703993A (en) * | 2019-09-20 | 2020-01-17 | 上海新储集成电路有限公司 | Data refreshing method for short-time nonvolatile memory |
| CN110838314A (en) * | 2018-08-17 | 2020-02-25 | 北京兆易创新科技股份有限公司 | Method and device for reinforcing stored data |
| US11488648B2 (en) | 2017-12-18 | 2022-11-01 | SK Hynix Inc. | Data storage device and operating method thereof |
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| CN110703993A (en) * | 2019-09-20 | 2020-01-17 | 上海新储集成电路有限公司 | Data refreshing method for short-time nonvolatile memory |
| CN110703993B (en) * | 2019-09-20 | 2023-07-04 | 上海新储集成电路有限公司 | Data refreshing method for short-time nonvolatile memory |
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