CN105678003A - Redundancy device set used for error correction and modification and method for repairing circuit defect with redundancy device set - Google Patents
Redundancy device set used for error correction and modification and method for repairing circuit defect with redundancy device set Download PDFInfo
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- CN105678003A CN105678003A CN201610024687.1A CN201610024687A CN105678003A CN 105678003 A CN105678003 A CN 105678003A CN 201610024687 A CN201610024687 A CN 201610024687A CN 105678003 A CN105678003 A CN 105678003A
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- redundancy device
- nmos tube
- circuit
- device set
- error correction
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The invention provides a redundancy device set used for error correction and modification. The redundancy device set is characterized by comprising a plurality of basic units, wherein each basic unit is composed of an NMOS tube and a PMOS tube, the source electrode of the PMOS tube is connected with a chip VSS, the drain electrode of the PMOS tube is suspended or connected with the source electrode of the corresponding NMOS tube, the drain electrode of the NMOS tube is connected with the GND of the corresponding chip, and the grid electrode of the PMOS tube is connected with the grid electrode of the corresponding NMOS tube; the number of the basic units is 2 or larger than 2. The invention further provides a method for repairing a circuit defect with the redundancy device set to solve the problem that a whole circuit board is scrapped due to improper repair in circuit design.
Description
Technical field
The invention belongs to microelectronic circuit design field, be specifically related to a kind of for error correction revise redundancy device group and utilize this redundancy device group repair circuit defect method.
Background technology
Board design well after often can run into some layout circuits time do not have the defect considered or expect; those defects will directly lead scrapping of circuit board as repaired; for avoiding the appearance of this situation; in the middle of existing solution; can implant on the clear position of circuit board and include and the logic gate device such as door, not gate or door, be repaired by design logic gate circuit during circuit defect to appear. But, the size of Different Logic gate device is different, and circuit board rest position area is also unfixed, so the impossible all of logic gate device of layout of same position, such as, when the circuit meeting this region occurs that defect needs to repair for NAND gate circuit, but during due to layout, NAND gate is not placed in this region, then cause that this circuit recovery scenario is infeasible. Here it is in board design, stress layout reason cleverly why, but this difficulty that will be to increase circuit design and time.
So, it would be desirable to seek a kind of flexible layout and the redundancy device layout scheme of the different reparation demand of maximum possible reply.
Summary of the invention
Based on problem mentioned in background technology, the present invention propose a kind of for error correction revise redundancy device group and utilize this redundancy device group repair circuit defect method, solving to repair the improper problem causing monoblock circuit board to be scrapped in the middle of circuit design, its concrete technology contents is as follows:
The redundancy device group for error correction amendment of the present invention, it includes several elementary cells being made up of a NMOS tube and a PMOS, the source electrode of described PMOS connects chip VSS, its source electrode that is unsettled or that connect NMOS tube that drains, the drain electrode of described NMOS tube connects the GND of chip, and the grid of described PMOS is connected with the grid of NMOS tube; This elementary cell quantity is more than 2.
The method utilizing above-mentioned redundancy device group reparation circuit defect of the present invention, it specifically includes following operating procedure:
One) after circuit design completes, a number of redundancy device group elementary cell is set according to the area of circuit board remaining space;
Two) circuit runs and defect occurs, repairs the logic gates of this defect according to circuit operation logic design correspondence;
Three) adjust the connection of line between two metal-oxide-semiconductors of described elementary cell according to this logic gates or split off, utilizing one or more elementary cell to constitute the logic gate device needed for logic gates.
The present invention passes through the device group in idle location layout in units of metal-oxide-semiconductor, when defect occurs in circuit, develop into logic gate device by those device groups to carry out the amendment of circuit and remedy, reduce the situation that circuit board is scrapped, and metal-oxide-semiconductor volume is little, flexible layout, required logical device can also be arbitrarily made with by the connected mode of change metal-oxide-semiconductor, such as, with door, not gate, or door, NAND gate etc., drastically increase the recoverability energy of circuit board, no matter from practicality or economy, it it is all the technical scheme with brilliance, it is suitable for promoting the use of.
Accompanying drawing explanation
Fig. 1 is the electrical block diagram of the redundancy device group of the present invention.
Detailed description of the invention
Below in conjunction with accompanying drawing, the application scheme is further described:
As shown in Figure 1, a kind of redundancy device group for error correction amendment, it includes several elementary cells being made up of a NMOS tube and a PMOS, the source electrode of described PMOS connects chip VSS, its source electrode that is unsettled or that connect NMOS tube that drains, the drain electrode of described NMOS tube connects the GND of chip, and the grid of described PMOS is connected with the grid of NMOS tube; This elementary cell quantity is more than 2.
A kind of method utilizing above-mentioned redundancy device group to repair circuit defect, it specifically includes following operating procedure:
One) after circuit design completes, a number of redundancy device group elementary cell is set according to the area of circuit board remaining space;
Two) circuit runs and defect occurs, repairs the logic gates of this defect according to circuit operation logic design correspondence;
Three) adjust the connection of line between two metal-oxide-semiconductors of described elementary cell according to this logic gates or split off, utilizing one or more elementary cell to constitute the logic gate device needed for logic gates.
Above-mentioned preferred implementation should be regarded as the illustration of the application scheme embodiment, all identical with the application scheme, approximate or make based on this technology deduction, replacement, improvement etc., be regarded as the protection domain of this patent.
Claims (2)
1. kind of the redundancy device group revised for error correction, it is characterized in that: include several elementary cells being made up of a NMOS tube and a PMOS, the source electrode of described PMOS connects chip VSS, its source electrode that is unsettled or that connect NMOS tube that drains, the drain electrode of described NMOS tube connects the GND of chip, and the grid of described PMOS is connected with the grid of NMOS tube; This elementary cell quantity is more than 2.
2. utilizing the method repairing circuit defect for the redundancy device group of error correction amendment as claimed in claim 1, it specifically includes following operating procedure:
One) after circuit design completes, a number of redundancy device group elementary cell is set according to the area of circuit board remaining space;
Two) circuit runs and defect occurs, repairs the logic gates of this defect according to circuit operation logic design correspondence;
Three) adjust the connection of line between two metal-oxide-semiconductors of described elementary cell according to this logic gates or split off, utilizing one or more elementary cell to constitute the logic gate device needed for logic gates.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610024687.1A CN105678003A (en) | 2016-01-15 | 2016-01-15 | Redundancy device set used for error correction and modification and method for repairing circuit defect with redundancy device set |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610024687.1A CN105678003A (en) | 2016-01-15 | 2016-01-15 | Redundancy device set used for error correction and modification and method for repairing circuit defect with redundancy device set |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105678003A true CN105678003A (en) | 2016-06-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201610024687.1A Pending CN105678003A (en) | 2016-01-15 | 2016-01-15 | Redundancy device set used for error correction and modification and method for repairing circuit defect with redundancy device set |
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Citations (10)
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| CN1441437A (en) * | 2002-02-04 | 2003-09-10 | 三星电子株式会社 | Defect unit address programing circuit and method for programing defect unit address |
| CN101232020A (en) * | 2007-01-24 | 2008-07-30 | 株式会社瑞萨科技 | Semiconductor integrated circuit |
| CN101599742A (en) * | 2008-06-02 | 2009-12-09 | 恩益禧电子股份有限公司 | Amplifier and offset regulating circuit |
| CN102543171A (en) * | 2012-02-17 | 2012-07-04 | 北京时代全芯科技有限公司 | Phase change memory with redundant circuit and redundancy method for phase change memory |
| CN102594315A (en) * | 2012-02-17 | 2012-07-18 | 北京时代全芯科技有限公司 | Analog switch and redundant storage system adopting same |
| CN103888099A (en) * | 2013-11-18 | 2014-06-25 | 北京时代民芯科技有限公司 | Anti-single-particle transient redundancy filter circuit |
| CN104124230A (en) * | 2013-04-27 | 2014-10-29 | 中芯国际集成电路制造(上海)有限公司 | Testing structure and testing method |
| US20150035562A1 (en) * | 2012-03-05 | 2015-02-05 | Soitec | Look-up table architecture |
| CN104900259A (en) * | 2014-03-07 | 2015-09-09 | 中芯国际集成电路制造(上海)有限公司 | Storage unit for static random access memory and static random access memory |
| CN104900258A (en) * | 2014-03-07 | 2015-09-09 | 中芯国际集成电路制造(上海)有限公司 | Storage unit for static random access memory and static random access memory |
-
2016
- 2016-01-15 CN CN201610024687.1A patent/CN105678003A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1441437A (en) * | 2002-02-04 | 2003-09-10 | 三星电子株式会社 | Defect unit address programing circuit and method for programing defect unit address |
| CN101232020A (en) * | 2007-01-24 | 2008-07-30 | 株式会社瑞萨科技 | Semiconductor integrated circuit |
| CN101599742A (en) * | 2008-06-02 | 2009-12-09 | 恩益禧电子股份有限公司 | Amplifier and offset regulating circuit |
| CN102543171A (en) * | 2012-02-17 | 2012-07-04 | 北京时代全芯科技有限公司 | Phase change memory with redundant circuit and redundancy method for phase change memory |
| CN102594315A (en) * | 2012-02-17 | 2012-07-18 | 北京时代全芯科技有限公司 | Analog switch and redundant storage system adopting same |
| US20150035562A1 (en) * | 2012-03-05 | 2015-02-05 | Soitec | Look-up table architecture |
| CN104124230A (en) * | 2013-04-27 | 2014-10-29 | 中芯国际集成电路制造(上海)有限公司 | Testing structure and testing method |
| CN103888099A (en) * | 2013-11-18 | 2014-06-25 | 北京时代民芯科技有限公司 | Anti-single-particle transient redundancy filter circuit |
| CN104900259A (en) * | 2014-03-07 | 2015-09-09 | 中芯国际集成电路制造(上海)有限公司 | Storage unit for static random access memory and static random access memory |
| CN104900258A (en) * | 2014-03-07 | 2015-09-09 | 中芯国际集成电路制造(上海)有限公司 | Storage unit for static random access memory and static random access memory |
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Application publication date: 20160615 |
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| RJ01 | Rejection of invention patent application after publication |