CN105656547A - Input signal intensity display circuit for avalanche photodiode (APD) in light receive module - Google Patents

Input signal intensity display circuit for avalanche photodiode (APD) in light receive module Download PDF

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Publication number
CN105656547A
CN105656547A CN201610064172.4A CN201610064172A CN105656547A CN 105656547 A CN105656547 A CN 105656547A CN 201610064172 A CN201610064172 A CN 201610064172A CN 105656547 A CN105656547 A CN 105656547A
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nmos tube
current
amplifier
voltage
apd
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CN201610064172.4A
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CN105656547B (en
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童志强
任娟
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Fiberhome Telecommunication Technologies Co Ltd
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Fiberhome Telecommunication Technologies Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/07Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
    • H04B10/075Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal
    • H04B10/079Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
    • H04B10/0795Performance monitoring; Measurement of transmission parameters
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/07Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
    • H04B10/075Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal
    • H04B10/079Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
    • H04B10/0799Monitoring line transmitter or line receiver equipment

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)

Abstract

The present invention discloses an input signal intensity display circuit for an avalanche photodiode (APD) in a light receive module. The input signal intensity display circuit comprises a transimpedance amplifier output voltage sampling module, a virtual transimpedance amplifier, a transimpedance error amplifier and a current proportion amplifier. The transimpedance amplifier output voltage sampling module is used for sampling an output signal of a transimpedance amplifier so as to obtain an output common mode direct current voltage related to the input signal intensity of the APD. The virtual transimpedance amplifier is used for copying the transimpedance amplifier so as to obtain a circuit the same as the transimpedance amplifier and obtain an output reference voltage when the input signal intensisty is zero. The transimpedance error amplifier is used for converting errors of the output common mode direct current voltage and the output reference voltage, so as to obtain a current signal equivalent to the input current of the APD. The current proportion amplifier is used for performing proportional mirroring on the output current of the transimpedance error amplifier, so as to obtain an input signal intensity display current. According to the input signal intensity display circuit, the input signal intensity of the APD can be displayed inside a chip; a manner of sampling and comparing the output signal of the transimpedance amplifier is adopted, thereby having a small impact on input of the transimpedane amplifier; and peripheral system is simple to use.

Description

For the input signal strength display circuit of APD in Optical Receivers
Technical field
The present invention relates to technical field of photo communication, the input signal strength being particularly used in Optical Receivers APD shows (RSSI, ReceiveSingalStrengthIndicator) circuit.
Background technology
In optical communication field, trans-impedance amplifier is usually used as the preamplifier of receptor, as shown in Figure 1, input signal strength display circuit schematic diagram for tradition APD (avalanche photodide), mainly sample from the negative pole of avalanche photodide, thus in the amplitude of chip exterior display input signal, at chip internal, the input signal strength of avalanche photodide cannot be displayed, and, this circuit needs to add a pair mirror image transistor circuit in peripheral application circuit, thus causing its peripheral system application complexity.
In view of this, it is badly in need of providing a kind of for the input signal strength display circuit of APD in Optical Receivers, it is possible to the easier input signal strength showing avalanche photodide at chip internal.
Summary of the invention
The technical problem to be solved be how to design a kind of for the input signal strength display circuit of APD in Optical Receivers, it is possible to the easier input signal strength showing avalanche photodide at chip internal.
In order to solve above-mentioned technical problem, the technical solution adopted in the present invention is to provide a kind of for the input signal strength display circuit of APD in Optical Receivers, including:
Trans-impedance amplifier output voltage sampling module, is sampled the output voltage signal of trans-impedance amplifier, obtains the output common mode DC voltage relevant to the input signal strength of APD;
Virtual trans-impedance amplifier, replicates the trans-impedance amplifier in described trans-impedance amplifier output voltage sampling module and obtains the circuit the same with trans-impedance amplifier, thus obtaining one at input signal strength is output reference voltage when 0;
Mutual conductance error amplifier, changes the error of described output common mode DC voltage and described output reference voltage, obtains the current signal with the equivalence of described APD input current and exports;
Current ratio amplifier, carries out scaled mirror to the output electric current of described mutual conductance error amplifier, obtains input signal strength display electric current.
In technique scheme, described trans-impedance amplifier output voltage sampling module includes trans-impedance amplifier circuit and output common mode voltage sample circuit, and described trans-impedance amplifier circuit is made up of Open-loop amplifier and negative feedback resistor; Described output common mode voltage sample circuit is the standard RC low-pass filter circuit being made up of the first resistance and the first electric capacity, for taking out the common-mode DC voltage of trans-impedance amplifier output voltage signal;
Described virtual trans-impedance amplifier includes virtual Open-loop amplifier and virtual negative feedback resistance;
Described mutual conductance error amplifier includes the first error amplifier, the second error amplifier, the first NMOS tube, the second NMOS tube and the 3rd NMOS tube;
Described current ratio amplifier includes the first PMOS and the second PMOS.
In technique scheme, the grid of described first NMOS tube connects the outfan of described second error amplifier, and drain electrode connects the positive pole of described APD, source ground; The grid of described second NMOS tube connects the outfan of described second error amplifier, and drain electrode connects the input of described first error amplifier and the source electrode of described 3rd NMOS tube, source ground; The grid of described 3rd NMOS tube connects the outfan of described first error amplifier, and drain electrode connects grid and the drain electrode of described 4th NMOS tube, and source electrode connects the input of described first error amplifier and the drain electrode of described second NMOS tube; The grid of described first PMOS connects drain electrode, and connects the drain electrode of described 3rd NMOS tube and the grid of described second PMOS; The source electrode of described first PMOS and the second PMOS connects power supply, and the drain electrode of described second PMOS is as the outfan of circuit.
In technique scheme, the negative-feedback circuit being made up of described trans-impedance amplifier output voltage sampling module, described virtual trans-impedance amplifier, described second error amplifier and described first NMOS tube, make described output common mode DC voltage equal with described output reference voltage, and the drain voltage of described first NMOS tube is equal with described output reference voltage; When described output common mode DC voltage is equal with the drain voltage of described output reference voltage and described first NMOS tube, the drain current of described first NMOS tube is equal with the DC current of described avalanche photodide.
In technique scheme, the negative-feedback circuit being made up of described first error amplifier, described second NMOS tube and described 3rd NMOS tube so that the input voltage of described first error amplifier and the drain voltage of described second NMOS tube are equal; When the input voltage of described first error amplifier is equal with the drain voltage of described second NMOS tube, namely when the drain current of described second NMOS tube is equal with the drain current of described first NMOS tube, owing to the grid current of described second NMOS tube is equal with the grid current of described first NMOS tube, and the source current of described second NMOS tube is equal with the source current of described first NMOS tube, so, the drain current of described second NMOS tube is equal with the DC current of the drain current of described first NMOS tube and described APD.
In technique scheme, the input voltage of described first error amplifier is equal with described output reference voltage.
In technique scheme, the current mirroring circuit being made up of described second NMOS tube, the 3rd NMOS tube, the first PMOS and the second PMOS, the drain current making described second NMOS tube is mirrored to the drain electrode output of described second PMOS, thus the output electric current of circuit is equal with the drain current of the drain current of described second PMOS and described second NMOS tube, it is achieved thereby that the intensity of APD input current is shown.
In technique scheme, when described APD input current is in the scope of 1uA to 1mA, the error of the output electric current of described circuit is less than 3%.
The present invention adopts the positive pole from APD to carry out the mode sampled, compare with traditional mode carrying out sampling from the negative pole of APD, solve the problem of input signal strength that traditional method cannot show APD at chip internal, and requirement that peripheral system is applied by this programme is simple, of the present invention for the input signal strength display circuit of APD in Optical Receivers, have the advantage that
(1) this RSSI circuit can show the input signal strength of avalanche photodide at chip internal;
(2) this RSSI circuit adopts the output voltage signal to trans-impedance amplifier to be sampled the mode compared, and affects less on the input of trans-impedance amplifier;
(3) the peripheral system application of this RSSI circuit is simpler than the application of the peripheral system of traditional RSSI circuit.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the input signal strength display circuit of traditional APD;
Fig. 2 for the embodiment of the present invention provide a kind of for the structured flowchart of the input signal strength display circuit of APD in Optical Receivers;
Fig. 3 for the embodiment of the present invention provide a kind of for the schematic diagram of the input signal strength display circuit of APD in Optical Receivers;
Fig. 4 for the embodiment of the present invention provide a kind of in Optical Receivers the input signal strength display circuit of APD signal output with input characteristic curve figure.
Detailed description of the invention
Present invention is mainly applied to the trans-impedance amplifier circuit in optic communication, it is directed to the key technology of trans-impedance amplifier, namely input signal strength shows, for precisely showing the input signal strength of avalanche photodide at chip internal, for this, the present invention devises a kind of new input signal strength display packing, propose a kind of brand-new circuit structure, the cardinal principle of the input signal strength display circuit that the present invention proposes is by the output voltage signal of trans-impedance amplifier is sampled, the output reference voltage of the output common mode DC voltage of the trans-impedance amplifier obtained Yu virtual trans-impedance amplifier is carried out conversion process obtain and avalanche photodide operating current equivalence current signal and export, then according to current ratio, current signal is amplified, current signal is consistent with the input signal strength of avalanche photodide, complete in the chip internal display to the input signal strength of avalanche photodide. this circuit that this programme proposes can show the input signal strength of avalanche photodide in the signal input range internal linear of nearly 60dB, and, this programme is without the mirror image triode device of peripheral applications so that apply more convenient and flexible.
Below in conjunction with specification drawings and specific embodiments, the present invention is described in detail.
Embodiments provide a kind of for the input signal strength display circuit of APD in Optical Receivers, as in figure 2 it is shown, include:
Trans-impedance amplifier output voltage sampling module 10, is sampled the output voltage signal of trans-impedance amplifier, obtains the output common mode DC voltage V relevant to the input signal strength of APDsample;
Virtual trans-impedance amplifier 20, replicates the trans-impedance amplifier in trans-impedance amplifier output voltage sampling module 10 and obtains a circuit the same with trans-impedance amplifier, thus obtaining one at input signal strength is output reference voltage V when 0ref;
Mutual conductance error amplifier 30, changes the voltage error of trans-impedance amplifier output voltage sampling module 10 and virtual trans-impedance amplifier 20, obtains the current signal with the equivalence of avalanche photodide operating current and exports;
Current ratio amplifier 40, carries out scaled mirror to the output electric current of mutual conductance error amplifier 30, obtains input signal strength display electric current, the output sense of current of mutual conductance error amplifier 30 is changed meanwhile, allows it become the current source scheme of mainstream applications.
As it is shown on figure 3, trans-impedance amplifier output voltage sampling module 10 includes trans-impedance amplifier circuit and output common mode voltage sample circuit, trans-impedance amplifier circuit is made up of Open-loop amplifier 101 and negative feedback resistor 102; Output common mode voltage sample circuit is the standard RC low-pass filter circuit being made up of the first resistance 103 and the first electric capacity 104, for taking out the common-mode DC voltage of trans-impedance amplifier output voltage signal.
Virtual trans-impedance amplifier 20 includes virtual Open-loop amplifier 201 and virtual negative feedback resistance 202.
Mutual conductance error amplifier 30 includes the first error amplifier the 301, second error amplifier the 302, first NMOS tube the 303, second NMOS tube 304 and the 3rd NMOS tube 305.
Current ratio amplifier 40 includes the first PMOS 401 and the second PMOS 402.
Wherein, the grid of the first NMOS tube 303 connects the outfan of the second error amplifier 302, and drain electrode connects the positive pole of APD, source ground; The grid of the second NMOS tube 304 connects the outfan of the second error amplifier 302, and drain electrode connects the input of the first error amplifier 301 and the source electrode of the 3rd NMOS tube 305, source ground; The grid of the 3rd NMOS tube 305 connects the outfan of the first error amplifier 301, and drain electrode connects grid and the drain electrode of the 4th NMOS tube, and source electrode connects the input of the first error amplifier 301 and the drain electrode of the second NMOS tube 304; The grid of the first PMOS 401 connects drain electrode, and connects the drain electrode of the 3rd NMOS tube 305 and the grid of the second PMOS 402; The source electrode of the first PMOS 401 and the second PMOS 402 connects power supply, and the drain electrode of the second PMOS 402 is as the outfan of circuit;
The negative-feedback circuit being made up of trans-impedance amplifier output voltage sampling module 10, virtual trans-impedance amplifier the 20, second error amplifier 302 and the first NMOS tube 303 so that the output common mode DC voltage V of trans-impedance amplifier output voltage sampling module 10sampleOutput reference voltage V with virtual trans-impedance amplifier 20refEqual, and the drain voltage V of the first NMOS tube 303D_NMOS303Output reference voltage V with virtual trans-impedance amplifier 20refEqual; As output common mode DC voltage VsampleWith output reference voltage VrefDrain voltage V with the first NMOS tube 303D_NMOS303Time equal, i.e. Vsample=Vref=VD_NMOS303Time, the drain current of the first NMOS tube 303 is equal with the DC current of APD, i.e. ID_NMOS303=IAPD��
The negative-feedback circuit being made up of first error amplifier the 301, second NMOS tube 304 and the 3rd NMOS tube 305 so that the input voltage V of the first error amplifier 301refDrain voltage V with the second NMOS tube 304bakEqual; When the input voltage of the first error amplifier 301 and the drain voltage of the second NMOS tube 304 are equal, i.e. Vref=Vbak=VD_NMOS304Time, namely when the drain current of the second NMOS tube 304 and the drain current of the first NMOS tube 303 are equal, owing to the grid current of the second NMOS tube 304 and the grid current of the first NMOS tube 303 are equal, and second NMOS tube 304 source current and the source current of the first NMOS tube 303 equal, so, the drain current of the second NMOS tube 304 and drain current and the APD DC current of the first NMOS tube 303 are equal, i.e. ID_NMOS304=ID_NMOS303=IAPD��
The input voltage V of the first error amplifier 301refWith output reference voltage VrefEqual.
The current mirroring circuit being made up of second NMOS tube the 304, the 3rd NMOS tube the 305, first PMOS 401 and the second PMOS 402, the drain current making the second NMOS tube 304 is mirrored to the drain electrode output of the second PMOS 402, thus circuit output electric current and the drain current of the second PMOS 402 and the drain current of the second NMOS tube 304 equal, i.e. IRSSI=ID_PMOS402=ID_NMOS304, it is achieved thereby that the intensity of APD input current is shown.
As shown in Figure 4, for the output electric current I of circuitRSSIWith APD input current IAPDPerformance diagram, as seen from the figure, as APD input current IAPDTime in the scope of 1uA to 1mA, the output electric current I of circuitRSSIError less than 3%.
The present invention is not limited to above-mentioned preferred forms, and the structure change that anyone makes under the enlightenment of the present invention, every have same or like technical scheme with the present invention, each falls within protection scope of the present invention. It should be noted that the term used in embodiments of the present invention is only merely for the purpose describing specific embodiment, and it is not intended to be limiting the present invention. " one ", " described " and " being somebody's turn to do " of the singulative used in the embodiment of the present invention and appended claims is also intended to include most form, unless context clearly shows that other implications. It is also understood that term "and/or" used herein refers to and comprises any or all of one or more project of listing being associated and be likely to combination.

Claims (8)

1. for the input signal strength display circuit of APD in Optical Receivers, it is characterised in that including:
Trans-impedance amplifier output voltage sampling module, is sampled the output voltage signal of trans-impedance amplifier, obtains the output common mode DC voltage relevant to the input signal strength of APD;
Virtual trans-impedance amplifier, replicates the trans-impedance amplifier in described trans-impedance amplifier output voltage sampling module and obtains the circuit the same with trans-impedance amplifier, thus obtaining one at input signal strength is output reference voltage when 0;
Mutual conductance error amplifier, changes the error of described output common mode DC voltage and described output reference voltage, obtains the current signal with the equivalence of described APD input current and exports;
Current ratio amplifier, carries out scaled mirror to the output electric current of described mutual conductance error amplifier, obtains input signal strength display electric current.
2. as claimed in claim 1 for the input signal strength display circuit of APD in Optical Receivers, it is characterised in that
Described trans-impedance amplifier output voltage sampling module includes trans-impedance amplifier circuit and output common mode voltage sample circuit, and described trans-impedance amplifier circuit is made up of Open-loop amplifier and negative feedback resistor; Described output common mode voltage sample circuit is the standard RC low-pass filter circuit being made up of the first resistance and the first electric capacity, for taking out the common-mode DC voltage of trans-impedance amplifier output voltage signal;
Described virtual trans-impedance amplifier includes virtual Open-loop amplifier and virtual negative feedback resistance;
Described mutual conductance error amplifier includes the first error amplifier, the second error amplifier, the first NMOS tube, the second NMOS tube and the 3rd NMOS tube;
Described current ratio amplifier includes the first PMOS and the second PMOS.
3. as claimed in claim 2 for the input signal strength display circuit of APD in Optical Receivers, it is characterised in that the grid of described first NMOS tube connects the outfan of described second error amplifier, and drain electrode connects the positive pole of described APD, source ground;The grid of described second NMOS tube connects the outfan of described second error amplifier, and drain electrode connects the input of described first error amplifier and the source electrode of described 3rd NMOS tube, source ground; The grid of described 3rd NMOS tube connects the outfan of described first error amplifier, and drain electrode connects grid and the drain electrode of described 4th NMOS tube, and source electrode connects the input of described first error amplifier and the drain electrode of described second NMOS tube; The grid of described first PMOS connects drain electrode, and connects the drain electrode of described 3rd NMOS tube and the grid of described second PMOS; The source electrode of described first PMOS and the second PMOS connects power supply, and the drain electrode of described second PMOS is as the outfan of circuit.
4. as claimed in claim 3 for the input signal strength display circuit of APD in Optical Receivers, it is characterized in that, the negative-feedback circuit being made up of described trans-impedance amplifier output voltage sampling module, described virtual trans-impedance amplifier, described second error amplifier and described first NMOS tube, make described output common mode DC voltage equal with described output reference voltage, and the drain voltage of described first NMOS tube is equal with described output reference voltage; When described output common mode DC voltage is equal with the drain voltage of described output reference voltage and described first NMOS tube, the drain current of described first NMOS tube is equal with the DC current of described avalanche photodide.
5. as claimed in claim 4 for the input signal strength display circuit of APD in Optical Receivers, it is characterized in that, the negative-feedback circuit being made up of described first error amplifier, described second NMOS tube and described 3rd NMOS tube so that the input voltage of described first error amplifier and the drain voltage of described second NMOS tube are equal; When the input voltage of described first error amplifier is equal with the drain voltage of described second NMOS tube, namely when the drain current of described second NMOS tube is equal with the drain current of described first NMOS tube, owing to the grid current of described second NMOS tube is equal with the grid current of described first NMOS tube, and the source current of described second NMOS tube is equal with the source current of described first NMOS tube, so, the drain current of described second NMOS tube is equal with the DC current of the drain current of described first NMOS tube and described APD.
6. as claimed in claim 5 for the input signal strength display circuit of APD in Optical Receivers, it is characterised in that the input voltage of described first error amplifier is equal with described output reference voltage.
7. as claimed in claim 6 for the input signal strength display circuit of APD in Optical Receivers, it is characterized in that, the current mirroring circuit being made up of described second NMOS tube, the 3rd NMOS tube, the first PMOS and the second PMOS, the drain current making described second NMOS tube is mirrored to the drain electrode output of described second PMOS, thus the output electric current of circuit is equal with the drain current of the drain current of described second PMOS and described second NMOS tube, it is achieved thereby that the intensity of APD input current is shown.
8. as claimed in claim 7 for the input signal strength display circuit of APD in Optical Receivers, it is characterised in that when described APD input current is in the scope of 1uA to 1mA, the error of the output electric current of described circuit is less than 3%.
CN201610064172.4A 2016-01-29 2016-01-29 Input signal strength display circuit for APD in Optical Receivers Active CN105656547B (en)

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CN106941379A (en) * 2017-05-05 2017-07-11 烽火通信科技股份有限公司 A kind of automatic gain control circuit for APD trans-impedance amplifiers
CN113965257A (en) * 2021-09-24 2022-01-21 袁艳 Signal intensity indicating circuit applied to optical receiver and control method thereof

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CN113965257A (en) * 2021-09-24 2022-01-21 袁艳 Signal intensity indicating circuit applied to optical receiver and control method thereof
CN113965257B (en) * 2021-09-24 2024-01-23 袁艳 Signal strength indicating circuit applied to optical receiver and control method thereof

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