CN105633010A - Interconnection structure and formation method therefor - Google Patents
Interconnection structure and formation method therefor Download PDFInfo
- Publication number
- CN105633010A CN105633010A CN201410707068.3A CN201410707068A CN105633010A CN 105633010 A CN105633010 A CN 105633010A CN 201410707068 A CN201410707068 A CN 201410707068A CN 105633010 A CN105633010 A CN 105633010A
- Authority
- CN
- China
- Prior art keywords
- layer
- adhesion layer
- interconnection structure
- low
- insulating barrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention provides an interconnection structure and a formation method therefor. The formation method for the interconnection structure comprises the steps of forming an insulating layer on the substrate; forming an adhesion layer on the insulating layer, wherein the material of the adhesion layer is silicon oxide or carbon-doped silicon oxide; the temperature for forming the adhesion layer is 350-400 DEG C; and forming a low-K dielectric layer on the adhesion layer. The density of the adhesion layer formed at the temperature of 350-400 DEG C is between the densities of the low-K dielectric layer and the insulating layer; the density of the adhesion layer is relatively close to the density of the insulating layer, and the adhesion layer is relatively high in mechanical strength; compared with the direct contact between the low-K dielectric layer and the insulating layer in the prior art, the adhesion layer is formed between the low-K dielectric layer and the insulating layer, and the density of the adhesion layer is between the densities of the low-K dielectric layer and the insulating layer in the invention, so that relatively high adhesive force is formed between the low-K dielectric layer and the adhesion layer, and between the adhesion layer and the insulating layer; and therefore, the performance of the interconnection structure is improved.
Description
Technical field
The present invention relates to technical field of semiconductors, especially relate to a kind of interconnection structure and forming method thereof.
Background technology
Semiconductor device in prior art integrated circuit is more and more intensive, the interconnection structure realizing semiconductor device electrical connection is also on the increase, the resistance (R) of interconnection structure and electric capacity (C) create more and more significantly ghost effect, thus easily causing the problem such as transmission delay (RCDelay) and cross-talk (CrossTalk).
Interconnection structure generally includes the conductive plunger adopting metal material, in order to prevent metal from diffusing to the parts that in interconnection structure, other are adjacent, prior art arranges diffusion impervious layer (BarrierLayer) at the conductive plunger place of each interconnection structure, for the problem reducing the metal parts towards periphery diffusion in conductive plunger.
Simultaneously, in order to reduce the parasitic capacitance in interconnection structure, prior art begin to use the material of low-k (K) to form interlayer dielectric layer (Inter-LayerDielectric, ILD), for instance: described advanced low-k materials is have loose porous low-K material or ultra low-K material.
In order to strengthen the insulating properties of interconnection structure, on substrate, generally form the insulating barrier of nitrogen-doped silicon carbide (NitrogenDopedCarbide, NDC) material, form interlayer dielectric layer on the insulating layer. But, the low-K material of this porous or the interlayer dielectric layer mechanical strength of ultra low-K material is poor, density is relatively low, and the insulating barrier density of nitrogen-doped silicon carbide is bigger, make the adhesion between insulating barrier and interlayer dielectric layer poor, and etch, at insulating barrier and interlayer dielectric layer, the step forming through hole, or in packaging technology, adopt and be also easy between interconnection structure and the interlayer dielectric layer of low K or ultra low-K material produce layering (delamination), thus have impact on the performance of interconnection structure.
Summary of the invention
The problem that this invention address that is to provide a kind of interconnection structure and forming method thereof, to improve the adhesion between insulating barrier and low K dielectric layer, and then improves the performance of interconnection structure.
For solving the problems referred to above, the forming method of interconnection structure of the present invention includes:
Substrate is provided;
Form insulating barrier over the substrate;
Forming adhesion layer on described insulating barrier, the material of described adhesion layer is the silicon oxide of silicon oxide or carbon dope, and the temperature of formation adhesion layer is in the scope of 350 to 400 degrees Celsius;
Described adhesion layer is formed low K dielectric layer;
Described low K dielectric layer, adhesion layer and insulating barrier are performed etching, described low K dielectric layer, adhesion layer and insulating barrier are formed through hole;
Described through hole is formed conductive plunger.
Optionally, the material of described insulating barrier is nitrogen-doped silicon carbide.
Optionally, the formation process of described adhesion layer is chemical vapor deposition method.
Optionally, the thickness of described adhesion layer is in the scope of 20 to 500 angstroms.
Optionally, tetraethyl orthosilicate and oxygen, silane and carbon dioxide or organosilane precursor and oxygen is adopted to form the adhesion layer of silicon oxide.
Optionally, the step forming low K dielectric layer includes:
First forming initial medium layer on described adhesion layer, formed in the process of initial medium layer, when the height at initial medium layer reaches the first height, pass into porogen, adulterate in the initial medium layer more than the first height porogen;
Described initial medium layer is carried out ultraviolet light irradiation, remove porogen, initial medium layer more than described first height forms porous medium layer, and the initial medium layer below described first height is buffer medium layer, and described buffer medium layer and porous medium layer constitute described low K dielectric layer.
Optionally, the thickness of described buffer medium layer is in the scope of 10 to 500 angstroms.
Optionally, the step forming initial medium layer on described adhesion layer includes: the formation temperature of described initial medium layer is in the scope of 200 to 300 degrees Celsius.
Optionally, the material of described low K dielectric layer includes silicon oxide, adopts methyldiethoxysilane presoma and oxygen, tetraethyl orthosilicate and oxygen or silane and nitrous oxide to form described low K dielectric layer.
Optionally, the step forming adhesion layer and the step forming low K dielectric layer carry out in the same chamber.
The present invention also provides for a kind of interconnection structure, including:
Substrate;
It is positioned at the insulating barrier on described substrate;
Being positioned at the adhesion layer on described insulating barrier, the material of described adhesion layer is the silicon oxide of silicon oxide or carbon dope, and the temperature of formation adhesion layer is in the scope of 350 to 400 degrees Celsius;
It is positioned at the low K dielectric layer on described adhesion layer;
It is arranged in the conductive plunger of described low K dielectric layer, adhesion layer and insulating barrier.
Optionally, the material of described insulating barrier is nitrogen-doped silicon carbide.
Optionally, the thickness of described adhesion layer is in the scope of 20 to 500 angstroms.
Optionally, described low K dielectric layer includes the buffer medium layer and the porous medium layer that sequentially form.
Optionally, the thickness of described buffer medium layer is in the scope of 10 to 500 angstroms.
Compared with prior art, technical scheme has the advantage that in the forming method of interconnection structure of the present invention, forms insulating barrier over the substrate; Forming adhesion layer on described insulating barrier, the material of described adhesion layer is the silicon oxide of silicon oxide or carbon dope, and the temperature of formation adhesion layer is in the scope of 350 to 400 degrees Celsius; Described adhesion layer is formed low K dielectric layer. The adhesion layer consistency formed in the scope of 350 to 400 degrees Celsius, between low K dielectric layer and the consistency of insulating barrier, is closer to the density of insulating barrier, and mechanical strength is better, and therefore between adhesion layer and insulating barrier, adhesion is stronger. Compared with directly contacting with insulating barrier with low K dielectric layer in prior art, the present invention defines consistency adhesion layer between low K dielectric layer and the consistency of insulating barrier between low K dielectric layer and insulating barrier, make between low K dielectric layer and adhesion layer, between adhesion layer and insulating barrier, be respectively provided with good adhesion, improve the performance of interconnection structure.
Accompanying drawing explanation
Fig. 1��Fig. 6 is the structural representation of forming method one embodiment of interconnection structure of the present invention.
Detailed description of the invention
As stated in the Background Art, in the backend process (BEOL) of existing interconnection structure, the adhesion between insulating barrier and the interlayer dielectric layer of porous is poor, the poor-performing of the interconnection structure formed in the interlayer dielectric layer of porous. Analyzing its reason, the interlayer dielectric layer of porous is generally under low temperature cvd silicon oxide and porogen, then removes porogen and formed. The silica structure formed at low temperatures loosens, and mechanical strength is poor, and wherein distributed substantial amounts of space, and the adhesion between insulating barrier is more weak.
For this, the invention provides the forming method of a kind of interconnection structure, consistency adhesion layer between low K dielectric layer and the consistency of insulating barrier is defined between low K dielectric layer and insulating barrier, the material of described adhesion layer is the silicon oxide of silicon oxide or carbon dope, the adhesion layer consistency formed in the scope of 350 to 400 degrees Celsius is higher, and there is higher mechanical strength, thus the adhesion that improve between insulating barrier and low K dielectric layer, improve the performance of interconnection structure.
Understandable for enabling the above-mentioned purpose of the present invention, feature and advantage to become apparent from, below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in detail.
Fig. 1��Fig. 6 is the structural representation of forming method one embodiment of interconnection structure of the present invention.
With reference to Fig. 1, it is provided that substrate 40, in the present embodiment, described substrate 40 can be previously formed the semiconductor device including source/drain region, grid, substrate 40 can also be formed interlayer dielectric layer.
Described substrate 40 can be silicon substrate, silicon-Germanium substrate, silicon carbide substrates, silicon-on-insulator (SOI) substrate, germanium on insulator (GOI) substrate, glass substrate or other III-V substrates. But the present invention is for the material of described substrate and structure and is not construed as limiting.
It addition, in follow-up accompanying drawing, for making remainder diagram clear, make the scale smaller shared by substrate 40 in accompanying drawing, do not indicate that substrate 40 changes.
With continued reference to Fig. 1, after forming described substrate 40, described substrate 40 is formed insulating barrier 100, in the present embodiment, the material of insulating barrier 100 is nitrogen-doped silicon carbide, and the insulating barrier 100 of described nitrogen-doped silicon carbide can stop that the material of the parts such as the conductive plunger being subsequently formed spreads in substrate 40 preferably. It should be noted that here for prior art, the concrete forming process of insulating barrier 100 is not repeated by the present invention, also it is not construed as limiting simultaneously.
Also, it should be noted the material of insulating barrier 100 is nitrogen-doped silicon carbide, compared with silicon oxide, containing carbon atom and nitrogen-atoms in nitrogen-doped silicon carbide, making nitrogen-doped silicon carbide organizational structure consistency higher, in follow-up etching process, insulating barrier 100 etch rate is relatively low.
With reference to Fig. 2, forming adhesion layer 101 over the substrate, the material of described adhesion layer is the silicon oxide (SiOC) of silicon oxide and carbon dope, and the temperature of formation adhesion layer is in the scope of 350 to 400 degrees Celsius.
Specifically, in the present embodiment, adopt chemical vapor deposition method, described insulating barrier 100 is formed adhesion layer 101.
In the present embodiment, forming adhesion layer 101 in the chamber of chemical vapor deposition method, in the step forming adhesion layer 101, the temperature in chamber is in the scope of 350 to 400 degrees Celsius. Pass into tetraethyl orthosilicate (TEOS) and oxygen in the cavity, to form the adhesion layer 101 of silica material.
Owing to, in the step forming adhesion layer 101, the temperature in chamber is higher, and in the scope of 350 to 400 degrees Celsius, the silicon oxide therefore formed is comparatively dense, and mechanical strength is higher. Therefore between described adhesion layer 101 and insulating barrier 100, adhesion is stronger, it is not easy to stress or the impact of etching in subsequent technique, and causes the defect that crackle occurs between adhesion layer 101 and insulating barrier 100.
In the present embodiment, adopt tetraethyl orthosilicate and oxygen, and the adhesion layer 101 formed at the temperature of 350 to 400 degrees Celsius has good compactness.
It should be noted that, the concrete reacting gas forming adhesion layer 101 is not limited as by the present invention, but, reacting gas needs under the higher temperature of 350 to 400 degrees Celsius, enough consistency silicon oxides can be formed, so that having enough adhesions between adhesion layer 101 and low K dielectric layer.
Such as, in other embodiments, silane and carbon dioxide can also be passed into, to form the adhesion layer 101 of silicon oxide, or pass into organosilane precursor, and pass into oxygen, to form the adhesion layer 101 of silicon oxide, it also is able to realize under the higher temperature of 350 to 400 degrees Celsius, insulating barrier 100 is formed comparatively dense silicon oxide.
It should be noted that, in the present embodiment, described chemical vapor deposition method is plasma reinforced chemical vapour deposition technique (PECVD), adopts the silica material compactness that plasma reinforced chemical vapour deposition technique is formed better, but the invention is not limited in this regard.
It should be noted that, in the present embodiment, the material of described adhesion layer 101 is the silicon oxide formed under the higher temperature of 350 to 400 degrees Celsius, in other embodiments, can also in the step forming adhesion layer 101, the gas of carbon dope is passed into, to form the silicon oxide of carbon dope under the higher temperature of 350 to 400 degrees Celsius. The silicon oxide of the carbon dope formed in the scope of 350 to 400 degrees Celsius is also comparatively dense, and close to the consistency of insulating barrier 100, mechanical strength is higher, the consistency of the adhesion layer 101 of the silicon oxide of carbon dope is equally between the consistency of the consistency of low K dielectric layer and insulating barrier 100, and the adhesion layer 101 so formed is same with the adhesion between insulating barrier 100 or low K dielectric layer higher.
It should be noted that the K value of described adhesion layer 101 is more than the K value of low K dielectric layer. The K value of described adhesion layer 101 is more little, is more beneficial to the RC reducing interconnection structure and postpones. If the thickness of described adhesion layer 101 is excessive, the ratio that then adhesion layer 101 of high-k accounts in an interconnection structure is excessive, it is unfavorable for that the RC reducing interconnection structure postpones, if the thickness of described adhesion layer is too small, then adhesion layer 101 is difficult to play the effect of adhesion between raising insulating barrier 100 and low K dielectric layer, optionally, the thickness of described adhesion layer 101 is in the scope of 20 to 500 angstroms.
With reference to Fig. 3, forming low K dielectric layer on described adhesion layer 101, the K value of described low K dielectric layer is less than or equal to 2.6.
In the present embodiment, in the same chamber forming adhesion layer 101, carry out being formed the step of low K dielectric layer so that the step forming adhesion layer 101 and low K dielectric layer is comparatively coherent, it is not easy to difference produces defect, and saves the production time. But the present invention is without limitation, in other embodiments, it is also possible to carry out being formed the step of low K dielectric layer in different chamber.
In the present embodiment, on described adhesion layer, initial medium layer 102 is first formed. Specifically, in the present embodiment, in the same chamber forming adhesion layer 101, methyldiethoxysilane presoma and oxygen are passed into, to form the initial medium layer 102 of silicon oxide on described adhesion layer 101. But what formation initial medium layer 102 was adopted by the present invention reacting gas does not limit, in other embodiments, it is also possible to pass into tetraethyl orthosilicate and oxygen or silane and nitrous oxide, it is also possible to form the initial medium layer 102 of silicon oxide.
It should be noted that, described adhesion layer 101 is formed in the step of initial medium layer 102, temperature in described chamber is in the scope of 200 to 300 degrees Celsius, specifically, in the present embodiment, temperature in described chamber is at 260 degrees Celsius, and methyldiethoxysilane presoma and oxygen can form the silicon oxide that consistency is relatively low, comparatively loose so that the K value of initial medium layer 102 is relatively low.
When initial medium layer 102 reaches the first height G, continuing to pass into methyldiethoxysilane presoma and oxygen, and pass into porogen 103, adulterate in the initial medium layer 102 more than the first height porogen 103. The material of described porogen 103 can select terpinene (ATRP), and terpinene can volatilize under ultraviolet radiation, forms substantial amounts of hole after volatilization in the silica material of initial medium layer 102. But the material of described porogen 103 is not limited by the present invention, it is also possible to select other materials readily volatilized under ultraviolet radiation.
In conjunction with reference to Fig. 3, Fig. 4, described initial medium layer 102 is carried out ultraviolet light irradiation, remove porogen 103, in the initial medium layer 102 of the first height more than G, form substantial amounts of hole, make the initial medium layer 102 of described first height more than G form porous medium layer 104. Initial medium layer 102 below described first height forms buffer medium layer 107, and the K value of porous medium layer 104 relatively buffer medium layer 107 is lower, and consistency is also lower. Described buffer medium layer 107 and porous medium layer 104 constitute described low K dielectric layer, and in the present embodiment, the material of described buffer medium layer 107 is silicon oxide, and the material of porous medium layer 104 is the silicon oxide with loose and porous structure.
In the present embodiment, due in the step forming adhesion layer 101, form the temperature of adhesion layer 101 in the scope of 350 to 400 degrees Celsius, the silicon oxide formed is comparatively dense, consistency close to nitrogen-doped silicon carbide, and mechanical strength is higher, therefore between described adhesion layer 101 and insulating barrier 100, adhesion is stronger. Compared with (200 to 300 degrees Celsius) deposition with at a lower temperature and the low K dielectric layer that formed, the consistency of described adhesion layer 101 is higher, therefore the consistency of adhesion layer 101 is between the consistency and the consistency of insulating barrier 100 of low K dielectric layer, make between low K dielectric layer and adhesion layer 101, between adhesion layer 101 and insulating barrier 100, be respectively provided with good adhesion, thus the adhesion that improve between insulating barrier 100 and low K dielectric layer, and then improve the performance of interconnection structure.
It should be noted that in the present embodiment, the effect forming buffer medium layer 107 is in that:
Compared with porous medium layer 104, the consistency of buffer medium layer 107 is higher; Compared with adhesion layer 101, the consistency of buffer medium layer 107 is relatively low. Therefore the porous medium layer 104 that buffer medium layer 107 avoids adhesion layer 101 bigger with consistency difference directly contacts, and improves the adhesion of adhesion layer 101 and low K dielectric layer. But the present invention does not limit whether forming buffer medium layer 107, in other embodiments, it is also possible to adulterate porogen 103 in whole initial medium layers 102, after removing porogen 103, direct formation porous medium layer 104 on adhesion layer 101.
It should be noted that, if the thickness of buffer medium layer 107 is excessive, then in low K dielectric layer, buffer medium layer 107 proportion is excessive, make K value less porous medium layer 104 proportion in low K dielectric layer less, it is likely to be unfavorable for that the RC reducing interconnection structure postpones, if the thickness of buffer medium layer 107 is too small, then the opportunity of the porogen 103 that adulterates is difficult to ensure that, it is difficult to keep the uniformity of buffer medium layer 107 thickness. In the present embodiment, described first height G is 300 angstroms so that the thickness of buffer medium layer 107 is 300 angstroms. But the thickness of buffer medium layer 107 is not limited by the present invention, in other embodiments, optionally, the thickness of described buffer medium layer 107 is in the scope of 10 to 500 angstroms.
With reference to Fig. 5, Fig. 6, in the present embodiment, described adhesion layer 101 is formed after low K dielectric layer, described low K dielectric layer, adhesion layer 101 and insulating barrier 100 are performed etching, described low K dielectric layer, adhesion layer 101 and insulating barrier 100 are formed through hole 105, described through hole 105 forms conductive plunger 106, thus forming interconnection structure.
Owing to the consistency of adhesion layer 101 of the present embodiment is between the consistency and the consistency of insulating barrier 100 of low K dielectric layer, make between low K dielectric layer and adhesion layer 101, between adhesion layer 101 and insulating barrier 100, be respectively provided with good adhesion, being formed in the step of through hole 105 in etching, the pattern of through hole 105 is better; And adhesion layer 101 etch rate between the insulating barrier 100 that the higher low K dielectric layer of etch rate and etch rate are relatively low is moderate, make to be formed in the step of through hole 105 in etching, through hole 105 sidewall intersection between low K dielectric layer and adhesion layer 101, between adhesion layer 101 and insulating barrier 100 does not have obvious depression, further improve the pattern of through hole 105, after reducing formation conductive plunger 106, the risk of lamination defect occurs between conductive plunger 106 and low K dielectric layer, improves the performance of interconnection structure.
The present invention also provides for a kind of interconnection structure, and described interconnection structure can be, but not limited to adopt the forming method of the interconnection structure described in above-described embodiment to be formed.
In the present embodiment, described interconnection structure adopts the forming method of the interconnection structure described in above-described embodiment to be formed, therefore can with continued reference to Fig. 6, and the present embodiment interconnection structure includes:
Substrate 40.
It is positioned at the insulating barrier 100 on described substrate 40.
Being positioned at the adhesion layer 101 on described insulating barrier 100, the material of described adhesion layer 101 is silicon oxide or carbon doped silicon oxide, and the temperature of formation adhesion layer 101 is in the scope of 350 to 400 degrees Celsius.
It is positioned at the low K dielectric layer on described adhesion layer 101.
It is arranged in the conductive plunger 106 of described low K dielectric layer, adhesion layer 101 and insulating barrier 100.
In the present embodiment, the material of described insulating barrier 100 is nitrogen-doped silicon carbide. Specifically, the insulating barrier 100 of described nitrogen-doped silicon carbide material is specially nitrogen-doped silicon carbide material, and the insulating barrier 100 of described nitrogen-doped silicon carbide can stop that the material of the parts such as the conductive plunger being subsequently formed spreads in substrate 40 preferably. It should be understood that, here for prior art, the concrete forming process of insulating barrier 100 is not repeated by the present invention, is also not construed as limiting simultaneously. Compared with silicon oxide, containing carbon atom and nitrogen-atoms in nitrogen-doped silicon carbide so that nitrogen-doped silicon carbide organizational structure consistency is higher, and in follow-up etching process, insulating barrier 100 etch rate is relatively low.
In the present embodiment, described low K dielectric layer includes the buffer medium layer 107 and the porous medium layer 104 that sequentially form, the silica material of described buffer medium layer 107 and porous medium layer 104 is (200 to 300 degrees Celsius) deposition at a lower temperature and is formed, and therefore the material of buffer medium layer 107 is the silicon oxide that consistency is relatively low, comparatively loose. The material of described buffer medium layer 107 is silicon oxide, and the material of porous medium layer 104 is the silicon oxide with loose and porous structure, and porous medium layer 104 is internal comprises substantial amounts of hole. Therefore, compared with buffer medium layer 107, the consistency of porous medium layer 104 is lower.
In the present embodiment, the material of adhesion layer 101 is silicon oxide. The formation temperature of adhesion layer 101 is in the scope of 350 to 400 degrees Celsius, and the silicon oxide formed under such condition is comparatively dense, and close to the consistency of nitrogen-doped silicon carbide, and mechanical strength is higher, and therefore between described adhesion layer 101 and insulating barrier 100, adhesion is stronger. Compared with (200 to 300 degrees Celsius) deposition with at a lower temperature and the low K dielectric layer that formed, the consistency of described adhesion layer 101 is higher, therefore the consistency of adhesion layer 101 is between the consistency and the consistency of insulating barrier 100 of low K dielectric layer, make between low K dielectric layer and adhesion layer 101, between adhesion layer 101 and insulating barrier 100, be respectively provided with good adhesion, thus the adhesion that improve between insulating barrier 100 and low K dielectric layer, and then improve the performance of interconnection structure.
It should be noted that, in the present embodiment, the material of described adhesion layer 101 is the silicon oxide formed under the higher temperature of 350 to 400 degrees Celsius, and in other embodiments, the material of described adhesion layer 101 can also be the silicon oxide of the carbon dope formed under the higher temperature of 350 to 400 degrees Celsius. The silicon oxide of the carbon dope formed in the scope of 350 to 400 degrees Celsius is also comparatively dense, and close to the consistency of insulating barrier 100, mechanical strength is higher, the consistency of the adhesion layer 101 of the silicon oxide of carbon dope is equally between the consistency of the consistency of low K dielectric layer and insulating barrier 100, and the adhesion layer 101 so formed is same with the adhesion between insulating barrier 100 or low K dielectric layer higher.
It should be noted that in the present embodiment, the effect arranging buffer medium layer 107 is in that, compared with porous medium layer 104, the consistency of buffer medium layer 107 is higher; Compared with adhesion layer 101, the consistency of buffer medium layer 107 is relatively low, and the porous medium layer 104 that therefore buffer medium layer 107 avoids adhesion layer 101 bigger with consistency difference directly contacts, and improves the adhesion of adhesion layer 101 and low K dielectric layer. But the present invention does not limit whether forming buffer medium layer 107, in other embodiments, it is also possible to adulterate porogen 103 in whole initial medium layers 102, after removing porogen 103, direct formation porous medium layer 104 on adhesion layer 101.
It can further be stated that, if the thickness of buffer medium layer 107 is excessive, then in low K dielectric layer, buffer medium layer 107 proportion is excessive, make K value less porous medium layer 104 proportion in low K dielectric layer less, it is likely to be unfavorable for that the RC reducing interconnection structure postpones, if the thickness of buffer medium layer 107 is too small, then the opportunity of the porogen 103 that adulterates is difficult to ensure that, it is difficult to keep the uniformity of buffer medium layer 107 thickness. In the present embodiment, the thickness of described buffer medium layer 107 is 300 angstroms. But the thickness of buffer medium layer 107 is not limited by the present invention, in other embodiments, optionally, the thickness of described buffer medium layer 107 is in the scope of 10 to 500 angstroms.
Owing to the consistency of adhesion layer 101 of the present embodiment is between the consistency and the consistency of insulating barrier 100 of low K dielectric layer, make between low K dielectric layer and adhesion layer 101, good adhesion it is respectively provided with between adhesion layer 101 and insulating barrier 100, adhesion layer 101 etch rate between the insulating barrier 100 that the higher low K dielectric layer of etch rate and etch rate are relatively low is moderate, make in etching in the step of the through hole of filled conductive connector 106, through hole is between low K dielectric layer and adhesion layer 101, intersection between adhesion layer 101 and insulating barrier 100 does not have obvious depression, after reducing formation conductive plunger 106, the risk of lamination defect occurs between conductive plunger 106 and low K dielectric layer, improve the performance of interconnection structure.
It should be noted that the K value of described adhesion layer 101 is more than the K value of low K dielectric layer. The K value of described adhesion layer 101 is more little, is more beneficial to the RC reducing interconnection structure and postpones. If the thickness of described adhesion layer 101 is excessive, the ratio that then adhesion layer 101 of high-k accounts in an interconnection structure is excessive, it is unfavorable for that the RC reducing interconnection structure postpones, if the thickness of described adhesion layer is too small, then adhesion layer 101 is difficult to play the effect of adhesion between raising insulating barrier 100 and low K dielectric layer, optionally, the thickness of described adhesion layer is in the scope of 20 to 500 angstroms.
Although present disclosure is as above, but the present invention is not limited to this. Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (15)
1. the forming method of an interconnection structure, it is characterised in that including:
Substrate is provided;
Form insulating barrier over the substrate;
Forming adhesion layer on described insulating barrier, the material of described adhesion layer is the silicon oxide of silicon oxide or carbon dope, and the temperature of formation adhesion layer is in the scope of 350 to 400 degrees Celsius;
Described adhesion layer is formed low K dielectric layer;
Described low K dielectric layer, adhesion layer and insulating barrier are performed etching, described low K dielectric layer, adhesion layer and insulating barrier are formed through hole;
Described through hole is formed conductive plunger.
2. the forming method of interconnection structure as claimed in claim 1, it is characterised in that the material of described insulating barrier is nitrogen-doped silicon carbide.
3. the forming method of interconnection structure as claimed in claim 1, it is characterised in that the formation process of described adhesion layer is chemical vapor deposition method.
4. the forming method of interconnection structure as claimed in claim 1, it is characterised in that the thickness of described adhesion layer is in the scope of 20 to 500 angstroms.
5. the forming method of interconnection structure as claimed in claim 1, it is characterised in that adopt tetraethyl orthosilicate and oxygen, silane and carbon dioxide or organosilane precursor and oxygen to form the adhesion layer of silicon oxide.
6. the forming method of interconnection structure as claimed in claim 1, it is characterised in that the step forming low K dielectric layer includes:
First forming initial medium layer on described adhesion layer, formed in the process of initial medium layer, when the height at initial medium layer reaches the first height, pass into porogen, adulterate in the initial medium layer more than the first height porogen;
Described initial medium layer is carried out ultraviolet light irradiation, remove porogen, initial medium layer more than described first height forms porous medium layer, and the initial medium layer below described first height is buffer medium layer, and described buffer medium layer and porous medium layer constitute described low K dielectric layer.
7. the forming method of interconnection structure as claimed in claim 6, it is characterised in that the thickness of described buffer medium layer is in the scope of 10 to 500 angstroms.
8. the forming method of interconnection structure as claimed in claim 6, it is characterised in that the step forming initial medium layer on described adhesion layer includes: the formation temperature of described initial medium layer is in the scope of 200 to 300 degrees Celsius.
9. the forming method of interconnection structure as claimed in claim 1, it is characterized in that, the material of described low K dielectric layer includes silicon oxide, adopts methyldiethoxysilane presoma and oxygen, tetraethyl orthosilicate and oxygen or silane and nitrous oxide to form described low K dielectric layer.
10. the forming method of interconnection structure as claimed in claim 1, it is characterised in that the step forming adhesion layer and the step forming low K dielectric layer carry out in the same chamber.
11. an interconnection structure, it is characterised in that including:
Substrate;
It is positioned at the insulating barrier on described substrate; Being positioned at the adhesion layer on described insulating barrier, the material of described adhesion layer is the silicon oxide of silicon oxide or carbon dope, and the temperature of formation adhesion layer is in the scope of 350 to 400 degrees Celsius;
It is positioned at the low K dielectric layer on described adhesion layer;
It is arranged in the conductive plunger of described low K dielectric layer, adhesion layer and insulating barrier.
12. interconnection structure as claimed in claim 11, it is characterised in that the material of described insulating barrier is nitrogen-doped silicon carbide.
13. interconnection structure as claimed in claim 11, it is characterised in that the thickness of described adhesion layer is in the scope of 20 to 500 angstroms.
14. interconnection structure as claimed in claim 11, it is characterised in that described low K dielectric layer includes the buffer medium layer and the porous medium layer that sequentially form.
15. interconnection structure as claimed in claim 14, it is characterised in that the thickness of described buffer medium layer is in the scope of 10 to 500 angstroms.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410707068.3A CN105633010B (en) | 2014-11-27 | 2014-11-27 | Interconnection structure and forming method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410707068.3A CN105633010B (en) | 2014-11-27 | 2014-11-27 | Interconnection structure and forming method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105633010A true CN105633010A (en) | 2016-06-01 |
| CN105633010B CN105633010B (en) | 2018-11-16 |
Family
ID=56047798
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410707068.3A Active CN105633010B (en) | 2014-11-27 | 2014-11-27 | Interconnection structure and forming method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105633010B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020000380A1 (en) * | 2018-06-29 | 2020-01-02 | 长江存储科技有限责任公司 | Semiconductor structure and forming method therefor |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030008493A1 (en) * | 2001-07-03 | 2003-01-09 | Shyh-Dar Lee | Interconnect structure manufacturing |
| CN1467838A (en) * | 2002-06-10 | 2004-01-14 | ��ʿͨ��ʽ���� | Semiconductor device having multilevel copper wiring layers and its manufacture method |
| CN103943560A (en) * | 2014-05-08 | 2014-07-23 | 上海华力微电子有限公司 | Film forming method for forming low-dielectric constant thin film and buffer layer thereof |
-
2014
- 2014-11-27 CN CN201410707068.3A patent/CN105633010B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030008493A1 (en) * | 2001-07-03 | 2003-01-09 | Shyh-Dar Lee | Interconnect structure manufacturing |
| CN1467838A (en) * | 2002-06-10 | 2004-01-14 | ��ʿͨ��ʽ���� | Semiconductor device having multilevel copper wiring layers and its manufacture method |
| CN103943560A (en) * | 2014-05-08 | 2014-07-23 | 上海华力微电子有限公司 | Film forming method for forming low-dielectric constant thin film and buffer layer thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020000380A1 (en) * | 2018-06-29 | 2020-01-02 | 长江存储科技有限责任公司 | Semiconductor structure and forming method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105633010B (en) | 2018-11-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105336680B (en) | Semiconductor device, manufacturing method thereof and electronic device | |
| KR20120118323A (en) | Semiconductor devices and methods for fabricating the same | |
| US10163655B2 (en) | Through substrate via liner densification | |
| CN105762109A (en) | Formation method of semiconductor structure | |
| CN104282619A (en) | Silicon through hole forming method | |
| CN109545695A (en) | The manufacturing method of semiconductor device | |
| CN103204461B (en) | Semiconductor structure and forming method thereof | |
| CN103794542B (en) | The forming method of Semiconductor substrate | |
| CN102646591B (en) | The manufacture method of transistor | |
| CN105633010A (en) | Interconnection structure and formation method therefor | |
| CN103700643A (en) | Adapter plate deep groove capacitor on basis of TSV (Through Silicon Via) process and manufacturing method thereof | |
| CN105336674B (en) | Interconnection structure and forming method thereof | |
| CN104752334B (en) | The forming method of contact plunger | |
| KR20090036879A (en) | Method of manufacturing semiconductor device | |
| CN102569180B (en) | The manufacture method of power MOS contact hole | |
| KR100772275B1 (en) | Semiconductor device and manufacturing method thereof | |
| CN101577243B (en) | Semiconductor structure and manufacturing method thereof | |
| CN104134612B (en) | A kind of method for repairing side wall damage of ultralow dielectric constant film | |
| CN105720005B (en) | The forming method of ultra-low K dielectric layer | |
| CN104505344A (en) | Method for forming porous ultra-low dielectric material | |
| CN105990217B (en) | Interconnection structure and forming method thereof | |
| CN105206598B (en) | Semiconductor devices and forming method thereof | |
| CN103515353A (en) | Photoresist fill type metal interconnect structure and manufacturing method thereof | |
| CN103187356A (en) | Semiconductor chip and manufacture method of intermetallic dielectric layer | |
| CN104681483A (en) | Manufacturing method of semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |