CN105632924A - Method for manufacturing semiconductor device - Google Patents
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- CN105632924A CN105632924A CN201410597654.7A CN201410597654A CN105632924A CN 105632924 A CN105632924 A CN 105632924A CN 201410597654 A CN201410597654 A CN 201410597654A CN 105632924 A CN105632924 A CN 105632924A
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Abstract
The invention provides a method for manufacturing a semiconductor device. The method comprises steps of: providing a semiconductor substrate at least including a silicon-containing area, wherein a metal silicide layer and a metal layer are successively formed in the silicon-containing area; cleaning the semiconductor substrate by hydrogen peroxide solution; and cleaning the semiconductor substrate by liquid mixing sulfuric acid and hydrogen peroxide (SPM liquid) in order to remove the metal layer. The method first treats the semiconductor device by the hydrogen peroxide solution before removing the metal layer by the SPM liquid, thereby preventing the sulfuric acid from reaching the semiconductor device in advance of the hydrogen peroxide and further damaging the metal silicide layer, and preventing an increase in the Rs of the semiconductor device. Accordingly, the method may improve the performance of the semiconductor device.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of method being used for producing the semiconductor devices.
Background technology
In existing MOS transistor technique, in order to improve the Ohmic contact between the grid of transistor, source electrode and drain electrode and filling connector (plug), it will usually form metal silicide on the surface of grid, source electrode and drain electrode. At present, mostly utilize self-aligned metal silicate (Self-AlignedSilicide) technique to form metal silicide. Specifically, after formation of source and drain, it is formed over the metal level being made up of cobalt, titanium or nickel etc. at source electrode, drain and gate, then pass through a step or multistep short annealing processes (RTA), make metal level and the pasc reaction in grid, source electrode and drain electrode, form the metal silicide of low-resistivity, thus reducing the sheet resistance (Rs) of source electrode and drain electrode. Being formed after metal silicide, in addition it is also necessary to adopt wet clean process remove not with the metal such as the cobalt of the pasc reaction in substrate, titanium or nickel.
In the semiconductor technology of 28nm and techniques below node, when making metal silicide, there is the problem higher for Rs at place of crystal circle center. For nickel platinum metal silicide, diametral compression test result shows, this high Rs problem comes from employing sulphuric acid (H2SO4) and hydrogen peroxide (H2O2) incipient stage of being carried out of mixed solution (i.e. SPM solution). Setting according to proportioning, sulphuric acid and hydrogen peroxide should be simultaneously supplied to wafer. But, sulphuric acid can for some purposes sometimes, and the such as opening time of chemistry valve is different and first flows out mixing valve (i.e. nozzle). Owing to nozzle corresponds generally to crystal circle center, therefore, sulphuric acid can arrive crystal circle center position prior to hydrogen peroxide. At this center position, most nickel can be decomposed out by the high-temperature concentrated sulfuric acid arriving nickel Platinum Silicide surface from nickel Platinum Silicide, thus destroying nickel Platinum Silicide surface. Due to the Oxidation of the decomposition of nickel and hydrogen peroxide, causing defining thicker silicon oxide layer on nickel Platinum Silicide surface, the Rs thus resulting in place of crystal circle center rises. Rs rising can cause the degradation of semiconductor device.
Summary of the invention
For the deficiencies in the prior art, the invention provides a kind of method being used for producing the semiconductor devices, including: providing Semiconductor substrate, described Semiconductor substrate at least includes a silicon-containing regions, and described silicon-containing regions is sequentially formed with metal silicide layer and metal level; Hydrogen peroxide solution is adopted to clean described Semiconductor substrate; And adopt the mixed solution of sulphuric acid and hydrogen peroxide to clean described Semiconductor substrate to remove described metal level.
Alternatively, adopting the time that hydrogen peroxide solution cleans described Semiconductor substrate is 1��300 second.
Alternatively, the volume ratio of the sulphuric acid in the mixed solution of described sulphuric acid and hydrogen peroxide and hydrogen peroxide is 2:1��20:1.
Alternatively, the temperature of the mixed solution of described sulphuric acid and hydrogen peroxide is 120 DEG C��180 DEG C.
Alternatively, described metal level is nickel dam, and described metal silicide layer is nickel silicide layer.
Alternatively, described metal level is nickel platinum alloy layer, and described metal silicide layer is nickel Platinum Silicide layer.
According to a further aspect of the invention, additionally provide a kind of method being used for producing the semiconductor devices, including: providing Semiconductor substrate, described Semiconductor substrate at least includes a silicon-containing regions, and described silicon-containing regions is sequentially formed with metal silicide layer, metal level and barrier layer; Hydrogen peroxide solution is adopted to clean described Semiconductor substrate; And adopt the mixed solution of sulphuric acid and hydrogen peroxide to clean described Semiconductor substrate to remove described barrier layer and described metal level.
Alternatively, adopting the time that hydrogen peroxide solution cleans described Semiconductor substrate is 1��300 second.
Alternatively, the volume ratio of the sulphuric acid in the mixed solution of described sulphuric acid and hydrogen peroxide and hydrogen peroxide is 2:1��20:1.
Alternatively, the temperature of the mixed solution of described sulphuric acid and hydrogen peroxide is 120 DEG C��180 DEG C.
Alternatively, described metal level is nickel dam, and described metal silicide layer is nickel silicide layer.
Alternatively, described metal level is nickel platinum alloy layer, and described metal silicide layer is nickel Platinum Silicide layer.
Alternatively, the material on described barrier layer is titanium nitride.
According to the method being used for producing the semiconductor devices provided by the invention, before adopting SPM solution removal metal level, first provide hydrogen peroxide solution that device is processed, it is possible to avoid sulphuric acid arrive device prior to hydrogen peroxide and destroy metal silicide layer, it is prevented that the Rs of device raises. Therefore, the method for the present invention can improve the performance of semiconductor device.
In order to make the purpose of the present invention, feature and advantage become apparent, especially exemplified by preferred embodiment, and in conjunction with accompanying drawing, it is described below in detail.
Accompanying drawing explanation
The drawings below of the present invention is used for understanding the present invention in this as the part of the present invention. Shown in the drawings of embodiments of the invention and description thereof, it is used for explaining principles of the invention. In the accompanying drawings:
Fig. 1 a-1d illustrates the generalized section of the semiconductor device that the committed step of the method being used for producing the semiconductor devices according to an embodiment of the invention obtains;
Fig. 2 illustrates the flow chart of the method being used for producing the semiconductor devices according to an embodiment of the invention;
Fig. 3 a-3d illustrates the generalized section of the semiconductor device that the committed step of the method being used for producing the semiconductor devices in accordance with another embodiment of the present invention obtains; And
Fig. 4 illustrates the flow chart of the method being used for producing the semiconductor devices in accordance with another embodiment of the present invention.
Detailed description of the invention
In the following description, a large amount of concrete details is given to provide more thorough understanding of the invention. It is, however, obvious to a person skilled in the art that the present invention can be carried out without these details one or more. In other example, in order to avoid obscuring with the present invention, technical characteristics more well known in the art are not described.
In order to thoroughly understand the present invention, detailed step will be proposed in following description, in order to the method being used for producing the semiconductor devices that the explaination present invention proposes. Obviously, the execution of the present invention is not limited to the specific details that the technical staff of semiconductor applications has the knack of. Presently preferred embodiments of the present invention is described in detail as follows, but except these detailed descriptions, the present invention can also have other embodiments.
Should be understood that, when using term " comprising " and/or " including " in this manual, it indicates exists described feature, entirety, step, operation, element and/or assembly, but does not preclude the presence or addition of other features one or more, entirety, step, operation, element, assembly and/or their combination.
It is understood that, when element or layer be referred to as " ... on ", " with ... adjacent ", " being connected to " or " being coupled to " other element or during layer, its can directly on other element or layer, adjacent thereto, be connected or coupled to other element or layer, or can there is element between two parties or layer. On the contrary, when element be referred to as " directly exist ... on ", " with ... direct neighbor ", " being directly connected to " or " being directly coupled to " other element or during layer, then be absent from element between two parties or layer.
Embodiment one
Below, the detailed step of the method being used for producing the semiconductor devices according to an embodiment of the invention is described with reference to Fig. 1 a-1d and Fig. 2.
Fig. 1 a-1d illustrates the generalized section of the semiconductor device that the committed step of the method being used for producing the semiconductor devices according to an embodiment of the invention obtains.
With reference to Fig. 1 a, it is provided that Semiconductor substrate 101, described Semiconductor substrate 101 at least includes a silicon-containing regions, and described silicon-containing regions is sequentially formed with metal silicide layer and metal level. The constituent material of described Semiconductor substrate 101 can be at least one in the following material being previously mentioned: stacking SiGe (S-SiGeOI), germanium on insulator SiClx (SiGeOI) and germanium on insulator (GeOI) etc. on stacking silicon (SSOI), insulator on silicon, silicon-on-insulator (SOI), insulator. Preferably, Semiconductor substrate 101 can be silicon substrate. Although there is described herein several examples of the material that can form Semiconductor substrate 101, but the spirit and scope of the present invention can be each fallen within as any material of Semiconductor substrate. Additionally, Semiconductor substrate 101 can be divided active area, and/or Semiconductor substrate 101 can also be formed with dopant well (not shown) etc. Semiconductor substrate 101 is formed with isolation structure (not shown) for limiting and isolating each IC-components. Described isolation structure can be localized oxidation of silicon (LOCOS) structure or shallow trench isolation (STI) structure. The packing material of isolation structure is the one in dielectric such as silicon oxide, silicon nitride, carborundum or its combination.
For the Semiconductor substrate comprising one or more MOS transistor, described MOS transistor includes grid, source electrode and drain electrode. Described grid, source electrode and drain electrode are silicon-containing regions. Described source electrode, drain surface are silicon materials, and described gate surface is polycrystalline silicon material. At described grid grid oxic horizon arranged below, the material of described grid oxic horizon can be silicon dioxide. Being formed with side wall in described grid both sides, the material of described side wall can be the one in silicon oxide, silicon nitride or combination. To put it more simply, only illustrate the polysilicon layer 102 constituting grid in fig 1 a.
Polysilicon layer 102 is sequentially formed with metal silicide layer 103 and metal level 104. The forming process of metal silicide layer 103 is as follows. Described polysilicon layer 102 is formed metal level 104. The technique forming described metal level 104 can adopt method conventional in this area, for instance, physical vaporous deposition or vapour deposition method etc. The material of described metal level 104 can be nickel or nickel platinum alloy, and the metallic silicon obtained accordingly turns materially nickel silicide or nickel Platinum Silicide. The thickness of described metal level 104 can be 50��300 angstroms. It follows that adopt RTA technique that described metal level 104 is annealed. Annealed process, the material in metal level 104 spreads in the silicon materials in described polysilicon layer 102, and forms metal silicide layer 103 with silicon materials. The temperature of described RTA technique can be 200��350 DEG C, and the persistent period can be 15��45 seconds. The dielectric layer on Semiconductor substrate 101 surface, such as silicon oxide layer or silicon nitride layer, do not react with metal level 104, this makes the follow-up wet-cleaning remaining metal level not reacted of removal be possibly realized.
It follows that with reference to Fig. 1 b, adopt hydrogen peroxide solution to clean described Semiconductor substrate 101. Described hydrogen peroxide solution is the mixed solution of hydrogen peroxide and water, and the concentration of hydrogen peroxide can be the concentration of any appropriate, and this is not limited by the present invention. Such as, in hydrogen peroxide solution, volume ratio shared by hydrogen peroxide can be 30%��90%. In one embodiment, adopting the time that hydrogen peroxide solution cleans described Semiconductor substrate 101 is 1��300 second.
It follows that with reference to Fig. 1 c, adopt the mixed solution (SPM solution) of sulphuric acid and hydrogen peroxide to clean described Semiconductor substrate 101 to remove described metal level 104. In one embodiment, the volume ratio of the sulphuric acid in the mixed solution of described sulphuric acid and hydrogen peroxide and hydrogen peroxide is 2:1��20:1, it is preferred to 5:1��10:1. The temperature of the mixed solution of described sulphuric acid and hydrogen peroxide can be 120 DEG C��180 DEG C, and namely described mixed solution is high temperature mixed solution. Higher temperature can so that the corrosiveness of sulphuric acid be relatively strong, therefore can corroding metal layer quickly. Semiconductor substrate 101 surface can not had by the mixed solution of sulphuric acid and hydrogen peroxide and the residual metallic layer 104 of pasc reaction generation metal silicide is removed. The profile of the semiconductor device after removing metal level 104 is referred to Fig. 1 d.
Hydrogen peroxide can oxidized metal silicide layer 103, its surface formed layer silicon oxide layer (not shown). This relatively thin silicon oxide layer can protect metal silicide to exempt from sulfuric acid corrosion, and owing to it is relatively thin, therefore the Rs of device is affected little.
Fig. 2 illustrates the flow chart of the method 200 being used for producing the semiconductor devices according to an embodiment of the invention. Method 200 comprises the following steps:
Step S201: providing Semiconductor substrate, described Semiconductor substrate at least includes a silicon-containing regions, and described silicon-containing regions is sequentially formed with metal silicide layer and metal level.
Step S202: adopt hydrogen peroxide solution to clean described Semiconductor substrate.
Step S203: adopt the mixed solution of sulphuric acid and hydrogen peroxide to clean described Semiconductor substrate to remove described metal level.
Embodiment two
Below, the detailed step of the method being used for producing the semiconductor devices in accordance with another embodiment of the present invention is described with reference to Fig. 3 a-3d and Fig. 4.
Fig. 3 a-3d illustrates the generalized section of the semiconductor device that the committed step of the method being used for producing the semiconductor devices according to an embodiment of the invention obtains.
With reference to Fig. 3 a, it is provided that Semiconductor substrate 301, described Semiconductor substrate 301 at least includes a silicon-containing regions, and described silicon-containing regions is sequentially formed with metal silicide layer, metal level and barrier layer. The constituent material of described Semiconductor substrate 301 can be at least one in the following material being previously mentioned: stacking SiGe (S-SiGeOI), germanium on insulator SiClx (SiGeOI) and germanium on insulator (GeOI) etc. on stacking silicon (SSOI), insulator on silicon, silicon-on-insulator (SOI), insulator. Preferably, Semiconductor substrate 301 can be silicon substrate. Although there is described herein several examples of the material that can form Semiconductor substrate 301, but the spirit and scope of the present invention can be each fallen within as any material of Semiconductor substrate. Additionally, Semiconductor substrate 301 can be divided active area, and/or Semiconductor substrate 301 can also be formed with dopant well (not shown) etc. Semiconductor substrate 301 is formed with isolation structure (not shown) for limiting and isolating each IC-components. Described isolation structure can be localized oxidation of silicon (LOCOS) structure or shallow trench isolation (STI) structure. The packing material of isolation structure is the one in dielectric such as silicon oxide, silicon nitride, carborundum or its combination.
For the Semiconductor substrate comprising one or more MOS transistor, described MOS transistor includes grid, source electrode and drain electrode. Described grid, source electrode and drain electrode are silicon-containing regions. Described source electrode, drain surface are silicon materials, and described gate surface is polycrystalline silicon material. At described grid grid oxic horizon arranged below, the material of described grid oxic horizon can be silicon dioxide. Being formed with side wall in described grid both sides, the material of described side wall can be the one in silicon oxide, silicon nitride or combination. To put it more simply, only illustrate the polysilicon layer 302 constituting grid in fig. 3 a.
Polysilicon layer 302 is sequentially formed with metal silicide layer 303, metal level 304 and barrier layer 305. The forming process of metal silicide layer 303 is as follows. Described polysilicon layer 302 is formed metal level 304. The technique forming described metal level 304 can adopt method conventional in this area, for instance, physical vaporous deposition or vapour deposition method etc. The material of described metal level 304 can be nickel or nickel platinum alloy, and the metallic silicon obtained accordingly turns materially nickel silicide or nickel Platinum Silicide. The thickness of described metal level 304 can be 50��300 angstroms. It follows that adopt RTA technique that described metal level 304 is annealed. Annealed process, the material in metal level 304 spreads in the silicon materials in described polysilicon layer 302, and forms metal silicide layer 303 with silicon materials. The temperature of described RTA technique can be 200��350 DEG C, and the persistent period can be 15��45 seconds. The dielectric layer on Semiconductor substrate 301 surface, such as silicon oxide layer or silicon nitride layer, do not react with metal level 304, this makes the follow-up wet-cleaning remaining metal level not reacted of removal be possibly realized.
The material on described barrier layer 305 can be the nitride of refractory metal, for instance titanium nitride. The effect on described barrier layer 305 is to avoid described metal level 304 to be exposed to the environment of non-inert and aoxidize. The thickness on described barrier layer can be 50��200 angstroms.
It follows that with reference to Fig. 3 b, adopt hydrogen peroxide solution to clean described Semiconductor substrate 301. Described hydrogen peroxide solution is the mixed solution of hydrogen peroxide and water, and the concentration of hydrogen peroxide can be the concentration of any appropriate, and this is not limited by the present invention. Such as, in hydrogen peroxide solution, volume ratio shared by hydrogen peroxide can be 30%��90%. In one embodiment, adopting the time that hydrogen peroxide solution cleans described Semiconductor substrate 301 is 1��300 second.
It follows that with reference to Fig. 3 c, adopt the mixed solution (SPM solution) of sulphuric acid and hydrogen peroxide to clean described Semiconductor substrate 301 to remove described barrier layer 305 and described metal level 304. In one embodiment, the volume ratio of the sulphuric acid in the mixed solution of described sulphuric acid and hydrogen peroxide and hydrogen peroxide is 2:1��20:1, it is preferred to 5:1��10:1. The temperature of the mixed solution of described sulphuric acid and hydrogen peroxide can be 120 DEG C��180 DEG C, and namely described mixed solution is high temperature mixed solution. Higher temperature can so that the corrosiveness of sulphuric acid be relatively strong, therefore can corrosion barrier layer and metal level quickly. The temperature of the mixed solution of described sulphuric acid and hydrogen peroxide is 120 DEG C��180 DEG C. Semiconductor substrate 301 surface can not had by the mixed solution of sulphuric acid and hydrogen peroxide and the residual metallic layer 304 of pasc reaction generation metal silicide is removed, and it can also remove the barrier layer 305 above metal level 304 simultaneously. The profile of the semiconductor device after removing metal level 304 and barrier layer 305 is referred to Fig. 3 d.
Hydrogen peroxide can oxidized metal silicide layer 303, its surface formed layer silicon oxide layer (not shown). This relatively thin silicon oxide layer can protect metal silicide to exempt from sulfuric acid corrosion, and owing to it is relatively thin, therefore the Rs of device is affected little.
Fig. 4 illustrates the flow chart of the method 400 being used for producing the semiconductor devices according to an embodiment of the invention. Method 400 comprises the following steps:
Step S401: providing Semiconductor substrate, described Semiconductor substrate at least includes a silicon-containing regions, and described silicon-containing regions is sequentially formed with metal silicide layer, metal level and barrier layer.
Step S402: adopt hydrogen peroxide solution to clean described Semiconductor substrate.
Step S403: adopt the mixed solution of sulphuric acid and hydrogen peroxide to clean described Semiconductor substrate to remove described barrier layer and described metal level.
Method provided by the invention goes for various wet clean process known in the art. According to the method being used for producing the semiconductor devices provided by the invention, before adopting SPM solution removal metal level, first provide hydrogen peroxide solution that device is processed, it is possible to avoid sulphuric acid arrive device prior to hydrogen peroxide and destroy metal silicide layer, it is prevented that the Rs of device raises. Therefore, the method for the present invention can improve the performance of semiconductor device.
The present invention is illustrated already by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to citing and descriptive purpose, and is not intended to limit the invention in described scope of embodiments. In addition it will be appreciated by persons skilled in the art that and the invention is not limited in above-described embodiment, more kinds of variants and modifications can also be made according to the teachings of the present invention, within these variants and modifications all fall within present invention scope required for protection. Protection scope of the present invention is defined by the appended claims and equivalent scope thereof.
Claims (13)
1. the method being used for producing the semiconductor devices, including:
Thering is provided Semiconductor substrate, described Semiconductor substrate at least includes a silicon-containing regions, and described silicon-containing regions is sequentially formed with metal silicide layer and metal level;
Hydrogen peroxide solution is adopted to clean described Semiconductor substrate; And
The mixed solution adopting sulphuric acid and hydrogen peroxide cleans described Semiconductor substrate to remove described metal level.
2. method according to claim 1, it is characterised in that adopting the time that hydrogen peroxide solution cleans described Semiconductor substrate is 1��300 second.
3. method according to claim 1, it is characterised in that sulphuric acid and the volume ratio of hydrogen peroxide in the mixed solution of described sulphuric acid and hydrogen peroxide are 2:1��20:1.
4. method according to claim 1, it is characterised in that the temperature of the mixed solution of described sulphuric acid and hydrogen peroxide is 120 DEG C��180 DEG C.
5. method according to claim 1, it is characterised in that described metal level is nickel dam, described metal silicide layer is nickel silicide layer.
6. method according to claim 1, it is characterised in that described metal level is nickel platinum alloy layer, described metal silicide layer is nickel Platinum Silicide layer.
7. the method being used for producing the semiconductor devices, including:
Thering is provided Semiconductor substrate, described Semiconductor substrate at least includes a silicon-containing regions, and described silicon-containing regions is sequentially formed with metal silicide layer, metal level and barrier layer;
Hydrogen peroxide solution is adopted to clean described Semiconductor substrate; And
The mixed solution adopting sulphuric acid and hydrogen peroxide cleans described Semiconductor substrate to remove described barrier layer and described metal level.
8. method according to claim 7, it is characterised in that adopting the time that hydrogen peroxide solution cleans described Semiconductor substrate is 1��300 second.
9. method according to claim 7, it is characterised in that sulphuric acid and the volume ratio of hydrogen peroxide in the mixed solution of described sulphuric acid and hydrogen peroxide are 2:1��20:1.
10. method according to claim 7, it is characterised in that the temperature of the mixed solution of described sulphuric acid and hydrogen peroxide is 120 DEG C��180 DEG C.
11. method according to claim 7, it is characterised in that described metal level is nickel dam, described metal silicide layer is nickel silicide layer.
12. method according to claim 7, it is characterised in that described metal level is nickel platinum alloy layer, described metal silicide layer is nickel Platinum Silicide layer.
13. method according to claim 7, it is characterised in that the material on described barrier layer is titanium nitride.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111312582A (en) * | 2020-03-23 | 2020-06-19 | 上海华力集成电路制造有限公司 | Cleaning method for reducing pattern defects on surface of silicon wafer |
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| CN1390676A (en) * | 2002-07-19 | 2003-01-15 | 上海华虹（集团）有限公司 | Method for removing excessive metal in preapring silicide |
| CN1567536A (en) * | 2003-06-12 | 2005-01-19 | 台湾积体电路制造股份有限公司 | Metallic silicifying double-layer structure and method for forming same |
| US7037793B2 (en) * | 2004-02-09 | 2006-05-02 | United Microelectronics Corp. | Method of forming a transistor using selective epitaxial growth |
| US20080020587A1 (en) * | 2006-07-20 | 2008-01-24 | Chun-Chieh Chang | Method of stripping remnant metal |
| TW200830386A (en) * | 2007-01-15 | 2008-07-16 | United Microelectronics Corp | Method for cleaning salicide |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1390676A (en) * | 2002-07-19 | 2003-01-15 | 上海华虹（集团）有限公司 | Method for removing excessive metal in preapring silicide |
| CN1567536A (en) * | 2003-06-12 | 2005-01-19 | 台湾积体电路制造股份有限公司 | Metallic silicifying double-layer structure and method for forming same |
| US7037793B2 (en) * | 2004-02-09 | 2006-05-02 | United Microelectronics Corp. | Method of forming a transistor using selective epitaxial growth |
| US20080020587A1 (en) * | 2006-07-20 | 2008-01-24 | Chun-Chieh Chang | Method of stripping remnant metal |
| TW200830386A (en) * | 2007-01-15 | 2008-07-16 | United Microelectronics Corp | Method for cleaning salicide |
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| CN111312582A (en) * | 2020-03-23 | 2020-06-19 | 上海华力集成电路制造有限公司 | Cleaning method for reducing pattern defects on surface of silicon wafer |
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