CN105632912A - Silicon chip etching method - Google Patents
Silicon chip etching method Download PDFInfo
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- CN105632912A CN105632912A CN201410602761.4A CN201410602761A CN105632912A CN 105632912 A CN105632912 A CN 105632912A CN 201410602761 A CN201410602761 A CN 201410602761A CN 105632912 A CN105632912 A CN 105632912A
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Abstract
The embodiment of the invention discloses a silicon chip etching method, and the method can smoothen the surface of an etching pattern formed at a step of dry etching. The method comprises the steps: dry etching: carrying out the etching of the silicon chip surface which is not covered by a mask layer through the dry etching technology, and forming the etching pattern on a silicon chip, wherein the surface of the etching pattern is provided with uneven burrs; wet etching: enabling the silicon chip after dry etching to be placed in corrosion liquid, and carrying out chemical polishing to remove the burrs, wherein the speed that the corrosion liquid etches the peaks of the burrs is greater than the etching speed of valleys of the burrs.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly relate to a kind of silicon chip etching method.
Background technology
In technical field of semiconductors, generally adopt inductively coupled plasma ICP (InductiveCoupledPlasma is called for short ICP inductively coupled plasma) device that silicon chip is performed etching, form specific pattern, to form semiconductor device.
Exemplarily, it is possible on silicon chip, form groove by shallow trench lithographic method or deep silicon etching method. Wherein, shallow trench lithographic method in order to form shallower groove on silicon chip, and shallow trench lithographic method specifically includes: will include the plasma generate halogen family free radical to etch silicon chip in ICP device of one or more gases containing halogen. Generally, in etching process, also can add the gas such as oxygen, nitrogen in ICP device, protective layer can be formed after these gas ionizations on the inwall of groove, hinder the continuation to inwall to etch. Deep silicon etching method in order to form deeper groove on silicon chip; deep silicon etching method specifically includes: the area deposition protective layer that first need not etch on silicon chip; then silicon chip is performed etching; the trench wall formed in first time etching again forms protective layer; to hinder the continuation to inwall to etch; groove being performed etching, so circulation carries out, to form deeper groove again. Protective layer is generally silicon oxide or polymer.
Inventor have found that, as it is shown in figure 1, silicon chip is being carried out in shallow trench etching process; protective layer cannot be formed on trench wall uniformly, and then causes unprotect layer on the last subregion of inwall, may proceed to etching; so that trench wall air spots is sliding, there is burr. As in figure 2 it is shown, silicon chip is being carried out in deep silicon etching process, the bottom of groove is unsmooth, has burr. Utilize the device that above-mentioned silicon chip is made, at burr place, point discharge phenomenon easily occurs, reduce the performance of device, even result in component failure.
Summary of the invention
The technical problem to be solved is in that to provide a kind of silicon chip etching method, it is possible to the surface of the etching pattern formed in dry etch step on smooth silicon chip
For solving above-mentioned technical problem, embodiments provide a kind of silicon chip etching method, adopt the following technical scheme that
A kind of silicon chip etching method includes:
Dry etch step, is performed etching the unlapped silicon chip surface of mask layer by dry carving technology, and to form etching pattern on described silicon chip, the surface of described etching pattern has rough burr;
Wet etching step, the chemical polishing being placed in corrosive liquid by the silicon chip after dry etching to be removed burr processes, and described corrosive liquid is to etch rate more than the low ebb to described burr of the etch rate of the sharp cutting edge of a knife or a sword of described burr.
Further, described corrosive liquid includes for making silica turn to the acid of silicon oxide and for the acid of corrosion oxidation silicon, and the described acid for making silica turn to silicon oxide mass fraction in described corrosive liquid is more than the described acid for corrosion oxidation silicon mass fraction in described corrosive liquid.
Further, the described acid for making silica turn to silicon oxide is nitric acid, and the described acid for corrosion oxidation silicon is Fluohydric acid..
Further, described corrosive liquid also includes for regulating the capillary acid of corrosive liquid.
Further, being used for regulating the capillary acid of corrosive liquid is acetic acid.
Further, in described corrosive liquid, the mass fraction of nitric acid is 30%��50%, and the mass fraction of Fluohydric acid. is 1%��10%, and the mass fraction of acetic acid is 20%��40%.
Further, in described corrosive liquid, the mass fraction of nitric acid is 42%, and the mass fraction of acetic acid is 30%, and the mass fraction of Fluohydric acid. is 4%.
Further, described corrosive liquid to be mass concentration the be nitric acid of 70%, pure acetic acid and the Fluohydric acid. that mass concentration is 40% mix with the ratio of 6:3:1.
Alternatively, described etching pattern includes for as the pattern of gate in fin formula field effect transistor.
Further, described dry etch step uses inductance coupled plasma device to complete.
Embodiments providing a kind of silicon chip etching method, this silicon chip etching method includes dry etch step and wet etching step. The surface of the etching pattern formed in dry etch step has rough burr, and the silicon chip after dry etching is carried out chemical polishing process by recycling wet etching step afterwards, to remove burr to a certain extent. It is specially to be placed in corrosive liquid silicon chip and performs etching, described corrosive liquid is to etch rate more than the low ebb to burr of the etch rate of the sharp cutting edge of a knife or a sword of burr, thus after wet etching step, the gradient of burr becomes slow and smooths, and then can smooth the surface of the etching pattern formed in dry etch step on silicon chip.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below the accompanying drawing used required during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the premise not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the silicon chip schematic diagram in prior art after shallow trench etching;
Fig. 2 is the silicon chip schematic diagram in prior art after deep silicon etching;
Fig. 3 is the flow chart of embodiment of the present invention silicon chip etching method;
Fig. 4 is the schematic diagram of wet etching step in silicon chip etching method shown in Fig. 3.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is a part of embodiment of the present invention, rather than whole embodiments. Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under not making creative work premise, broadly fall into the scope of protection of the invention.
Embodiments provide a kind of silicon chip etching method, specifically, as it is shown on figure 3, this silicon chip etching method includes:
Step S301, dry etch step, performed etching the unlapped silicon chip surface of mask layer by dry carving technology, and to form etching pattern on silicon chip, the surface of etching pattern has rough burr.
Step S302, wet etching step, the chemical polishing being placed in corrosive liquid by the silicon chip after dry etching to be removed burr processes, and corrosive liquid is to etch rate more than the low ebb to burr of the etch rate of the sharp cutting edge of a knife or a sword of burr.
The silicon chip etching method that above-described embodiment provides includes dry etch step and wet etching step. The surface of the etching pattern formed in dry etch step has rough burr, and recycling wet etching step carries out chemical polishing process afterwards, to remove burr to a certain extent. It is specially to be placed in corrosive liquid silicon chip and performs etching, described corrosive liquid is to etch rate more than the low ebb to burr of the etch rate of the sharp cutting edge of a knife or a sword of burr, thus after wet etching step, the gradient of burr becomes slow and smooths, and then can smooth the surface of the etching pattern formed in dry etch step on silicon chip.
Specifically, in the above-described embodiments, the corrosive liquid used in wet etching step includes for making silica turn to the acid of silicon oxide and for the acid of corrosion oxidation silicon, wherein, for making silica turn to the acid of silicon oxide mass fraction in corrosive liquid more than the mass fraction in corrosive liquid of the acid for corrosion oxidation silicon in corrosive liquid. In wet etching step, first silica is turned to silicon oxide, then by silica erosion, thus realizing the wet etching to etching pattern surface. Therefore, in wet etching step, made by proportioning, make in corrosive liquid for making silica turn to the acid of silicon oxide mass fraction in corrosive liquid more than the mass fraction in corrosive liquid of the acid for corrosion oxidation silicon, so that form the speed of silicon oxide on etching pattern surface more than by the speed of silica erosion, smoothing the surface of the etching pattern of formation in the dry etch step on silicon chip.
Being preferred in the embodiment of the present invention making the acid that silica turns to silicon oxide is nitric acid, and the acid for corrosion oxidation silicon is Fluohydric acid., and in corrosive liquid, the mass fraction of nitric acid is more than the mass fraction of Fluohydric acid.. Use nitric acid and the mixed solution of Fluohydric acid. as corrosive liquid in the chemical substance that comprises identical with the chemical substance used in traditional silicon technique, will not introduce other materials affects the performance of the structure that material is silicon, and process costs is relatively low. In addition it is also possible to select other acid to make silica turn to silicon oxide or dissolved oxygen SiClx, this is not defined by the embodiment of the present invention, and exemplarily, making the acid that silica turns to silicon oxide can also be sulphuric acid.
For the ease of it will be appreciated by those skilled in the art that the wet etching step using the corrosive liquid including nitric acid and Fluohydric acid. to carry out is described in detail by the embodiment of the present invention.
Specifically, in wet etching step, having the nitric acid of strong oxidizing property and the pasc reaction on etching pattern surface, the silica on etching pattern surface turns to silicon oxide, Fluohydric acid. corrosion oxidation silicon, reaction generates the material that can be dissolved in corrosive liquid. due in corrosive liquid the mass fraction of nitric acid more than the mass fraction of Fluohydric acid., so etch rate is subject to the restriction of Fluohydric acid. diffusion, as shown in Figure 4, exist between corrosive liquid and etching pattern surface and there is certain thickness mass transfer layer, in corrosive liquid, Fluohydric acid. needs just to diffuse to etching pattern surface through mass transfer layer, and then the silicon oxide generated after nitric acid oxidation with etching pattern surface reacts, and the thickness d p of the mass transfer layer at the peak location place of the burr on etching pattern surface is less than the thickness d v of the mass transfer layer of the low ebb position of burr, so that the Fluohydric acid. at the peak location place of burr is more, and then make corrosive liquid to the etch rate of the spike of burr more than the corrosive liquid etch rate to the low ebb of burr, the gradient of burr becomes slow and smooths, and then the surface of the etching pattern formed in dry etch step on silicon chip can be smoothed.
As a kind of improvement to above-described embodiment, described corrosive liquid could be included for regulating the capillary acid of corrosive liquid, such that it is able to reduce corrosion rate, improves the effect of wet etching. Alternatively, being used for regulating the capillary acid of corrosive liquid is acetic acid. It should be noted that water equal solvent can also be added in corrosive liquid to regulate the surface tension of corrosive liquid.
Further, when corrosive liquid includes nitric acid, Fluohydric acid. and acetic acid, in corrosive liquid, the mass fraction of nitric acid is 30%��50%, for instance the mass fraction of nitric acid can be 30%, 35%, 40% or 50% etc.; The mass fraction of Fluohydric acid. is 1%��10%, for instance the mass fraction of Fluohydric acid. can be 2%, 4%, 6%, 8% or 10% etc.; The mass fraction of acetic acid is 20%��40%, for instance the mass fraction of acetic acid can be 20%, 30% or 40% etc. It should be noted that, when the summation of mass fraction of the mass fraction of nitric acid in corrosive liquid, the mass fraction of Fluohydric acid. and acetic acid is less than 100%, other components in corrosive liquid are solvent, this solvent is preferably deionized water, but the solute in corrosive liquid only has three kinds all the time, it may be assumed that nitric acid, acetic acid and Fluohydric acid..
Further, a kind of optional corrosive liquid is embodiments provided: in this corrosive liquid, the mass fraction of nitric acid is 42%, and the mass fraction of acetic acid is 30%, and the mass fraction of Fluohydric acid. is 4%. Now, the summation of the mass fraction of the mass fraction of nitric acid in corrosive liquid, the mass fraction of Fluohydric acid. and acetic acid is 76%, in accordance with the above it can be seen that corrosive liquid also includes deionized water. Further, owing to mass fraction is the percentage ratio that in mixture, certain material mass accounts for gross mass, mass concentration is the quality of certain component in unit volume mixture thing, therefore, mass concentration be the nitric acid of 70%, pure acetic acid and Fluohydric acid. that mass concentration is 40% mix with the ratio of 6:3:1 after can obtain above-mentioned corrosive liquid.
Additionally, when etching pattern includes for pattern as the gate in fin formula field effect transistor, the top of the gate of fin formula field effect transistor be smooth circular arc and sidewall uniform and smooth, and then it can be avoided that when gate top and sidewall roughness or the micro-structure such as jagged exist, the adverse effect that the growth of follow-up High-K dielectric film and the making of Gate are produced, it is possible to be greatly improved the performance of fin formula field effect transistor.
Additionally, the dry etch step in the embodiment of the present invention uses inductance coupled plasma device to complete. Specifically, this dry etch step can include shallow trench etching or deep silicon etching.
The above; being only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, any those familiar with the art is in the technical scope that the invention discloses; change can be readily occurred in or replace, all should be encompassed within protection scope of the present invention. Therefore, protection scope of the present invention should be as the criterion with described scope of the claims.
Claims (10)
1. a silicon chip etching method, it is characterised in that including:
Dry etch step, is performed etching the unlapped silicon chip surface of mask layer by dry carving technology, and to form etching pattern on described silicon chip, the surface of described etching pattern has rough burr;
Wet etching step, the chemical polishing being placed in corrosive liquid by the silicon chip after dry etching to be removed burr processes, and described corrosive liquid is to etch rate more than the low ebb to described burr of the etch rate of the sharp cutting edge of a knife or a sword of described burr.
2. silicon chip etching method according to claim 1, it is characterized in that, described corrosive liquid includes for making silica turn to the acid of silicon oxide and for the acid of corrosion oxidation silicon, and the described acid for making silica turn to silicon oxide mass fraction in described corrosive liquid is more than the described acid for corrosion oxidation silicon mass fraction in described corrosive liquid.
3. silicon chip etching method according to claim 2, it is characterised in that the described acid for making silica turn to silicon oxide is nitric acid, the described acid for corrosion oxidation silicon is Fluohydric acid..
4. silicon chip etching method according to claim 2, it is characterised in that described corrosive liquid also includes for regulating the capillary acid of corrosive liquid.
5. silicon chip etching method according to claim 4, it is characterised in that being used for regulating the capillary acid of corrosive liquid is acetic acid.
6. silicon chip etching method according to claim 5, it is characterised in that in described corrosive liquid, the mass fraction of nitric acid is 30%��50%, the mass fraction of Fluohydric acid. is 1%��10%, and the mass fraction of acetic acid is 20%��40%.
7. silicon chip etching method according to claim 6, it is characterised in that in described corrosive liquid, the mass fraction of nitric acid is 42%, the mass fraction of acetic acid is 30%, and the mass fraction of Fluohydric acid. is 4%.
8. silicon chip etching method according to claim 5, it is characterised in that described corrosive liquid is mass concentration is the nitric acid of 70%, pure acetic acid and the Fluohydric acid. that mass concentration is 40% mixes with the ratio of 6:3:1.
9. the silicon chip etching method according to any one of claim 1��8, it is characterised in that described etching pattern includes for as the pattern of gate in fin formula field effect transistor.
10. the silicon chip etching method according to any one of claim 1��8, it is characterised in that described dry etch step uses inductance coupled plasma device to complete.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108251794A (en) * | 2018-01-19 | 2018-07-06 | 昆山国显光电有限公司 | The post-processing approach and mask plate of mask plate |
| CN108550526A (en) * | 2018-03-29 | 2018-09-18 | 上海集成电路研发中心有限公司 | A method of improving semiconductor fin surface roughness |
| CN109343262A (en) * | 2018-09-14 | 2019-02-15 | 信利半导体有限公司 | Improve the method for flexible base board burr |
| CN114488399A (en) * | 2022-01-30 | 2022-05-13 | 华中科技大学 | Template for preparing optical waveguide device and preparation method and application thereof |
| CN116246947A (en) * | 2023-05-11 | 2023-06-09 | 粤芯半导体技术股份有限公司 | Wafer surface roughening method and preparation method of semiconductor device |
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| US20130089701A1 (en) * | 2011-10-06 | 2013-04-11 | Electro Scientific Industries, Inc. | Substrate containing aperture and methods of forming the same |
| CN103887354A (en) * | 2012-12-19 | 2014-06-25 | 茂迪股份有限公司 | Solar cell, method for manufacturing same, and solar cell module |
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| CN102598311A (en) * | 2009-08-25 | 2012-07-18 | 荷兰能源建设基金中心 | Solar cell and method for manufacturing such a solar cell |
| US20130089701A1 (en) * | 2011-10-06 | 2013-04-11 | Electro Scientific Industries, Inc. | Substrate containing aperture and methods of forming the same |
| CN103887354A (en) * | 2012-12-19 | 2014-06-25 | 茂迪股份有限公司 | Solar cell, method for manufacturing same, and solar cell module |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108251794A (en) * | 2018-01-19 | 2018-07-06 | 昆山国显光电有限公司 | The post-processing approach and mask plate of mask plate |
| CN108550526A (en) * | 2018-03-29 | 2018-09-18 | 上海集成电路研发中心有限公司 | A method of improving semiconductor fin surface roughness |
| CN109343262A (en) * | 2018-09-14 | 2019-02-15 | 信利半导体有限公司 | Improve the method for flexible base board burr |
| CN114488399A (en) * | 2022-01-30 | 2022-05-13 | 华中科技大学 | Template for preparing optical waveguide device and preparation method and application thereof |
| CN116246947A (en) * | 2023-05-11 | 2023-06-09 | 粤芯半导体技术股份有限公司 | Wafer surface roughening method and preparation method of semiconductor device |
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Address after: 100176 No. 8 Wenchang Avenue, Beijing economic and Technological Development Zone Applicant after: Beijing North China microelectronics equipment Co Ltd Address before: 100026 Jiuxianqiao East Road, Chaoyang District, building, No. 1, M5 Applicant before: Beifang Microelectronic Base Equipment Proces Research Center Co., Ltd., Beijing |
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Application publication date: 20160601 |