CN105611199A - Digital clock circuit system for terrestrial digital television - Google Patents

Digital clock circuit system for terrestrial digital television Download PDF

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Publication number
CN105611199A
CN105611199A CN201410589539.5A CN201410589539A CN105611199A CN 105611199 A CN105611199 A CN 105611199A CN 201410589539 A CN201410589539 A CN 201410589539A CN 105611199 A CN105611199 A CN 105611199A
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CN
China
Prior art keywords
clock
circuit
digital
signal
digital television
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410589539.5A
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Chinese (zh)
Inventor
赵猛
吕华平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIANGSU LVYANG ELECTRONIC INSTRUMENT GROUP CO Ltd
Original Assignee
JIANGSU LVYANG ELECTRONIC INSTRUMENT GROUP CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JIANGSU LVYANG ELECTRONIC INSTRUMENT GROUP CO Ltd filed Critical JIANGSU LVYANG ELECTRONIC INSTRUMENT GROUP CO Ltd
Priority to CN201410589539.5A priority Critical patent/CN105611199A/en
Publication of CN105611199A publication Critical patent/CN105611199A/en
Pending legal-status Critical Current

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Abstract

The invention belongs to the field of digital television signal processing, and especially relates to a circuit system for modulating national-standard terrestrial digital television signal baseband data. A digital clock circuit system for terrestrial digital television of the invention comprises a clock frequency conversion circuit, an input clock selection circuit, a crystal oscillator power supply circuit and a clock amplification drive circuit. The clock frequency conversion circuit generates a 30.24MHz clock signal of high precision and stability through a direct digital frequency synthesis technology under the assistance of a digital phase-locked loop frequency synthesizer, and amplification driving is performed through the clock amplification drive circuit to provide a clock signal needed for the running of a baseband modulation module. The system for modulating digital television signal data provides a basis for further promotion and development of the terrestrial digital television technology through effective, stable and reliable digital television signal modulation.

Description

For terrestrial DTV digital clock circuit system
Technical field
The invention belongs to digital television signal process field, relate in particular to a kind of for GB terrestrial digital TVThe Circuits System that signal baseband data are modulated.
Background technology
Digital television techniques is mainly divided into three kinds of terrestrial DTV, satellite digital TV and cable digital TVs,In inland of China, most of citizen watch DTV by wired city TV's net, and ground digital electricityDepending on main, towards the area such as outskirts of a town, rural area that there is no the network coverage, and mobile terminal is as vehicle-mounted digital televisionAnd mobile phone. Terrestrial DTV standard promulgates on August 16th, 2006, and on August 1st, 2007 is formal realExecute, General Bureau of Radio, Film and Television in 2007 successively applies for and starts to work out 17 planning standards carrying out tie surface DTVPopularize and promote. And the dominant frequency of the work that the clock of DTV is whole system, high accuracy, high stabilityReference clock signal design is most important. Effective and reliable and stable Digital clock design is ground digitalOne of further essential condition of promoting and develop of TV tech.
Summary of the invention
Technique effect of the present invention can overcome above-mentioned defect, when one is provided for terrestrial DTV numeralClock Circuits System, its modulation to digital television signal is reliable and stable.
For achieving the above object, the present invention adopts following technical scheme: it comprise clock frequency translation circuit,Input clock is selected circuit, crystal oscillator power supply circuits, clock amplification driving circuit, clock frequency conversionCircuit, by direct digital frequency synthesis technology, taking digital phase-locked loop frequency synthesizer as auxiliary, produces and has heightThe clock signal of the 30.24MHz of precision and stability, amplifies driving by clock amplification driving circuit,For the operation of baseband modulation module provides required clock signal.
Complete machine adopts the constant temperature crystal of high accuracy, high stability as the reference clock signal of system, clock letterNumber frequency is 10.000MHz. The 10.000MHz conduct that also can adopt external GPS source synchronous clock signal to provideThe reference clock signal of system.
Under the control of single-chip microcomputer, integrated circuit AD9857 passes through Direct Digital frequency synthesis (DDS) technology,Taking digital phase-locked loop frequency synthesizer as auxiliary, produce the clock letter of the 30.24MHz with high accuracy and stabilityNumber, amplify driving by operational amplifier OPA2690, for the operation of baseband modulation module provides requiredClock signal.
System of modulating for digital television signal data of the present invention, it is capable for digital television signalEffective and reliable and stable modulation, for terrestrial DTV technology is further promoted and development provides the foundation.
Brief description of the drawings
Fig. 1 is clock frequency translation circuit of the present invention;
Fig. 2 is that input clock of the present invention is selected circuit;
Fig. 3 is crystal oscillator power supply circuits of the present invention;
Fig. 4 is clock amplification driving circuit of the present invention.
Detailed description of the invention
Of the present invention for terrestrial DTV digital clock circuit system, comprise clock frequency translation circuit,Input clock is selected circuit, crystal oscillator power supply circuits, clock amplification driving circuit, clock frequency conversionCircuit, by direct digital frequency synthesis technology, taking digital phase-locked loop frequency synthesizer as auxiliary, produces and has heightThe clock signal of the 30.24MHz of precision and stability, amplifies driving by clock amplification driving circuit,For the operation of baseband modulation module provides required clock signal.
Clock frequency conversion fraction circuit is as Figure of description 1: as described in clock frequency translation circuit adopt constant temperatureCrystal is as the reference clock signal of system, and clock signal frequency is 10.000MHz; Or adopt external GPS sameThe 10.000MHz that step clock signal source provides is as the reference clock signal of system. Described clock frequency conversionCircuit adopts AD9857 model. Complete machine adopts the constant temperature crystal of high accuracy, high stability as the benchmark of systemClock signal, clock signal frequency is 10.000MHz. Also can adopt external GPS source synchronous clock signal to carryThe 10.000MHz of confession is as the reference clock signal of system. Modulator acquiescence crystal inside provides clock signal.
Figure of description 2 is input clock selection circuit. When modulator has the reference clock of outside 10.000MHzWhen signal input, detection signal DETOUT is delivered to microprocessor by integrated circuit U6 (MC100LVEL16), micro-The clock of the outside input of signal CLKSEL control integration circuit U 4 (SA630D) gating for processor, and use VCOThe conducting of CTL signal controlling triode 2N3906, to turn-off the operating voltage of crystal inside, may produce avoidingRaw interference.
Figure of description 3 is crystal oscillator power supply circuits. Under the control of single-chip microcomputer, integrated circuit AD9857By Direct Digital frequency synthesis (DDS) technology, taking digital phase-locked loop frequency synthesizer as auxiliary, generation hasThe clock signal of the 30.24MHz of high accuracy and stability, by operational amplifier, OPA2690 drives,For baseband modulation module is moved required clock signal. Figure of description 4 is clock amplification driving circuit.

Claims (7)

1. for a terrestrial DTV digital clock circuit system, it is characterized in that, comprise clock frequency conversionCircuit, input clock are selected circuit, crystal oscillator power supply circuits, clock amplification driving circuit, clockFrequency-conversion circuit passes through direct digital frequency synthesis technology, taking digital phase-locked loop frequency synthesizer as auxiliary,Generation has the clock signal of the 30.24MHz of high accuracy and stability, enters by clock amplification driving circuitRow amplifies driving, for the operation of baseband modulation module provides required clock signal.
2. according to claim 1ly it is characterized in that for terrestrial DTV digital clock circuit system,Described clock frequency translation circuit adopts the reference clock signal of constant temperature crystal as system, clock signalFrequency is 10.000MHz; Or the 10.000MHz conduct that adopts external GPS source synchronous clock signal to provideThe reference clock signal of system.
3. according to claim 2ly it is characterized in that for terrestrial DTV digital clock circuit system,Described clock frequency translation circuit adopts AD9857 model.
4. according to claim 1ly it is characterized in that for terrestrial DTV digital clock circuit system,Described input clock is selected in circuit, when modulator has the reference clock signal of outside 10.000MHz defeatedFashionable, detection signal DETOUT is delivered to microprocessor by integrated circuit U6, microprocessor signal CLKThe clock of the outside input of SEL control integration circuit U 4 gatings, and with VCOCTL signal controlling crystal oscillationThe conducting of triode in device power supply circuits, to turn-off the operating voltage of crystal inside, may produce avoidingInterference.
5. according to claim 4ly it is characterized in that for terrestrial DTV digital clock circuit system,Described integrated circuit U6 adopts MC100LVEL16 model, and described control integration circuit U 4 adopts SA630DModel.
6. according to claim 4ly it is characterized in that for terrestrial DTV digital clock circuit system,Triode in described crystal oscillator power supply circuits adopts 2N3906 model.
7. according to claim 1ly it is characterized in that for terrestrial DTV digital clock circuit system,Described clock amplification driving circuit adopts OPA2690 model.
CN201410589539.5A 2014-10-28 2014-10-28 Digital clock circuit system for terrestrial digital television Pending CN105611199A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410589539.5A CN105611199A (en) 2014-10-28 2014-10-28 Digital clock circuit system for terrestrial digital television

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410589539.5A CN105611199A (en) 2014-10-28 2014-10-28 Digital clock circuit system for terrestrial digital television

Publications (1)

Publication Number Publication Date
CN105611199A true CN105611199A (en) 2016-05-25

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410589539.5A Pending CN105611199A (en) 2014-10-28 2014-10-28 Digital clock circuit system for terrestrial digital television

Country Status (1)

Country Link
CN (1) CN105611199A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203261316U (en) * 2013-05-28 2013-10-30 中国人民解放军63921部队 Clock source
US20140111257A1 (en) * 2012-10-22 2014-04-24 Mediatek Inc. Frequency divider, clock generating apparatus, and method capable of calibrating frequency drift of oscillator
CN103762978A (en) * 2014-01-20 2014-04-30 东南大学 Broadband low-phase noise frequency synthesizer without frequency divider based on harmonic mixing
CN103812636A (en) * 2012-11-09 2014-05-21 江苏绿扬电子仪器集团有限公司 Device for high-speed data acquisition system to acquire high-quality sampling clock
CN203883807U (en) * 2014-04-18 2014-10-15 江汉大学 Digital atomic frequency standard system circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140111257A1 (en) * 2012-10-22 2014-04-24 Mediatek Inc. Frequency divider, clock generating apparatus, and method capable of calibrating frequency drift of oscillator
CN103812636A (en) * 2012-11-09 2014-05-21 江苏绿扬电子仪器集团有限公司 Device for high-speed data acquisition system to acquire high-quality sampling clock
CN203261316U (en) * 2013-05-28 2013-10-30 中国人民解放军63921部队 Clock source
CN103762978A (en) * 2014-01-20 2014-04-30 东南大学 Broadband low-phase noise frequency synthesizer without frequency divider based on harmonic mixing
CN203883807U (en) * 2014-04-18 2014-10-15 江汉大学 Digital atomic frequency standard system circuit

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