CN105591618A - RF digital-analog hybrid demodulation circuit - Google Patents

Abstract

The invention discloses an RF digital-analog hybrid demodulation circuit. The RF digital-analog hybrid demodulation circuit comprises a detector, a second-order low pass filter, a differentiating circuit, a reverse amplifier, a first comparator, a second comparator and an RS trigger. By use of the interception rising and falling edge features of the differentiating circuit, two upward or downward spike pulses are formed on carrier wave signals, a group of digital signals for an RS trigger circuit are obtained through the reverse amplifier and the double comparators, and by use of the feature that the RS trigger circuit is not overturned in case of equidirectional level trigger, data in carrier waves is extracted. According to the invention, the RF digital-analog hybrid demodulation circuit can communicate normally under a TYPE A mode and a TYPE B mode in an ISO/IEC 14443 protocol, can satisfy application on a high-baud-rate occasion, and is applied to a stimulator.

Description

RF digital-to-analogue is mixed demodulator circuit

Technical field

The present invention relates to demodulator circuit field, particularly relate to a kind of RF (radio frequency) that is applied to emulatorDigital-to-analogue is mixed demodulator circuit.

Background technology

Along with the continuous progress of semiconductor fabrication process and IC design ability, processor chipsExploitation more and more depends on the simulated environment of emulator. And get at FPGA (field programmable gate array)Under environment for chip ASIC (special IC), digital circuit simulation has been no longer bottleneck.The emulation of analog module, the link of especially communicating by letter more and more comes into one's own. At present, emulatorRF demodulator circuit can only support at one time TYPE in ISO/IEC14443 agreement (type) AOr TYPEB pattern is wherein a kind of, and baud rate cannot reach working condition requirement more than 106K.In the time that needs are debugged the automatic identification of TYPEA/B or high bit rate, cannot meet user's exploitationDemand. The different demodulator circuit of frequent replacing, depends on the modes such as software emulation, has restricted greatlyThe efficiency of COS (SOC(system on a chip)) exploitation, and can not obtain desirable simulation result. Therefore designOne can proper communication under TYPEA and these two kinds of patterns of TYPEB, and supports high bit rateDemodulator circuit be of great practical significance.

Summary of the invention

The technical problem to be solved in the present invention is to provide a kind of RF digital-to-analogue and mixes demodulator circuit, Neng GouAll energy proper communications under two kinds of patterns of TYPEA in ISO/IEC14443 agreement and TYPEB, andMeet the application under high bit rate occasion.

For solving the problems of the technologies described above, RF digital-to-analogue of the present invention is mixed demodulator circuit, comprising:

One wave detector, the Data Modulation of input, on the carrier wave of 13.56MHz, becomes first-harmonic through detection27.12MHz；

One second-order low-pass filter, is connected with described wave detector, and the carrier signal of input is filteredRipple, an envelope form of shape paired data;

One differential circuit, is connected with described second-order low-pass filter, edge signal extracted,In carrier signal, form two spikes up or down;

One sign-changing amplifier, is connected with described differential circuit, and the signal of input is amplified;

One first comparator, its intermediate potential is+0.5V, is connected with described sign-changing amplifier, forExtract rising edge signal;

One second comparator, its intermediate potential is-0.5V, is connected with described sign-changing amplifier, forExtract trailing edge signal;

One rest-set flip-flop, is connected with the second comparator with described the first comparator, to rising edge signalCarry out shaping with trailing edge signal, extract the data in carrier wave.

Adopt RF digital-to-analogue of the present invention to mix demodulator circuit, the data-signal pulse keeping obtaining veryStandard, can remain on the error level of the same order of magnitude Neng Gou with the signal in carrier waveAll energy proper communications under two kinds of patterns of TYPEA in ISO/IEC14443 agreement and TYPEB, andMeet the application under high bit rate occasion.

The present invention is applicable to emulator.

Brief description of the drawings

Below in conjunction with accompanying drawing and detailed description of the invention, the present invention is further detailed explanation:

Fig. 1 is that described RF digital-to-analogue is mixed demodulator circuit structure chart.

Fig. 2 is that described RF digital-to-analogue is mixed demodulator circuit one embodiment schematic diagram.

Detailed description of the invention

Shown in Figure 1, described RF digital-to-analogue is mixed demodulator circuit, comprising: a wave detector, a second orderLow pass filter, a differential circuit, a sign-changing amplifier, one first comparator, one second comparatorWith a rest-set flip-flop. Described wave detector and second-order low-pass filter and existing traditional structure are similar. After4 grades is that described RF digital-to-analogue is mixed the peculiar structure of demodulator circuit, has newly increased differential circuit, has oppositely putLarge device, dual comparator and rest-set flip-flop.

Fig. 2 is that described RF digital-to-analogue is mixed demodulator circuit one specific embodiment. Wherein, wave detector adopts twoUtmost point pipe detecting way, the two Schottky diodes that are made up of BAS70 form. Second-order low-pass filter is adoptedWith elementary LC filtering, secondary RC filtering mode composition. Differential circuit is by the ceramic condenser group of 100pFBecome. Sign-changing amplifier is made up of the ADA4891 integrated transporting discharging of a slice wide bandwidth. Two-way comparator all byHigh-speed comparator chip MAX976 chip composition. Rest-set flip-flop is by the two-way NAND gate of taking from 74LVC00Composition.

Described RF digital-to-analogue is mixed demodulator circuit and is utilized the intercepting rising edge edge of differential circuit and trailing edge along spyProperty, in carrier signal, form two spikes up or down, by sign-changing amplifier and two ratioObtain one group of data signal for rest-set flip-flop circuit compared with device, utilize rest-set flip-flop circuit in TongfangThe characteristic that can not overturn during to level triggers, carry out pulse keeping and bit error rate correction, in carrier waveData extract. Because of pulse characteristic (extracting signal edge characteristic) and the rest-set flip-flop of differential circuitCircuit can not miss rollover characteristics, make the non-of data-signal pulse keeping that this demodulator circuit obtainsNormal standard, can remain on the error level of the same order of magnitude with the signal in carrier wave, can meetApplication scenario under high bit rate.

Described sign-changing amplifier makes the signal of TYPEB10% modulation depth can reach threshold range,Make in amplifier comparator cut coverage that pulse signal can be enough, two-way comparator circuit can basisThe component of signal needing is cut in the position that is rising edge and trailing edge, is sent to next stage rest-set flip-flopTwo road ports.

Cascade rest-set flip-flop circuit after dual comparator circuit, utilizes rest-set flip-flop circuit in the same wayLevel can continuous trigger characteristic, by the signal after comparator, be organized into the numeral needingSignal, has reduced the bit error rate.

In conjunction with shown in Fig. 2, application data is modulated on the carrier wave of 13.56MHz again, through Schottky twoThe detection of utmost point pipe, first-harmonic becomes 27.12MHz, by the filtering of two-stage low-pass filter circuit, formsTo data envelope form. Capacitor C 17 is differential circuit, has selected the ceramic disc capacitor of 100pF,There is a good extraction effect for edge signal. Due to the existence of differential circuit, no matter 100% adjustThe data of the degree of depth processed and 10% modulation depth, all can form a pulse signal. In the data of high bit rateWhile coming in, that on the rise time at edge, comes than common demodulation mode high communication number is short, at thisLink can be avoided pulsewidth time deformation. Signal amplifies through broadband operational amplifier ADA4891, can be TYPEThe 10% low modulation depth signal edge of B is also amplified to the amplitude of 0-3.3V. Sign-changing amplifier central pointCurrent potential is 1.65V. Rear two stage comparator level is 1.8V and 1.5V. 2 end comparator circuits can beRising edge signal and trailing edge signal extract respectively. The RS of signal through being formed by 2 NAND gatesFlip-flop circuit shaping, obtains the waveform that demodulation needs. At the poor ring of EMC (electromagnetic compatibility) environmentUnder border, can suitably relax two comparative levels of comparator circuit, effectively the more clutters of filtering.

Although the present invention utilizes specific embodiment to describe, the explanation of embodiment is not limitMake scope of the present invention. One skilled in the art is by reference to explanation of the present invention, notDeviate from the situation of the spirit and scope of the present invention, easily carry out various amendments or can be to embodimentCombine.

Claims (1)

1. RF digital-to-analogue is mixed a demodulator circuit, comprising:

One wave detector, the Data Modulation of input, on the carrier wave of 13.56MHz, becomes first-harmonic through detection27.12MHz；

One second-order low-pass filter, is connected with described wave detector, and the carrier signal of input is filteredRipple, an envelope form of shape paired data;

One differential circuit, is connected with described second-order low-pass filter, edge signal extracted,In carrier signal, form two spikes up or down;

It is characterized in that, also comprise:

One sign-changing amplifier, is connected with described differential circuit, and the signal of input is amplified;

One first comparator, its intermediate potential is+0.5V, is connected with described sign-changing amplifier, forExtract rising edge signal;

One second comparator, its intermediate potential is-0.5V, is connected with described sign-changing amplifier, forExtract trailing edge signal;

One rest-set flip-flop, is connected with the second comparator with described the first comparator, to rising edge signalCarry out shaping with trailing edge signal, extract the data in carrier wave.