CN205992226U - Multifrequency RFID reader based on software radio - Google Patents
Multifrequency RFID reader based on software radio Download PDFInfo
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- CN205992226U CN205992226U CN201620666745.6U CN201620666745U CN205992226U CN 205992226 U CN205992226 U CN 205992226U CN 201620666745 U CN201620666745 U CN 201620666745U CN 205992226 U CN205992226 U CN 205992226U
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Abstract
The utility model proposes a kind of multifrequency RFID reader based on software radio.Due to lacking a unified standard, the RF identification frequency of every country fails to reach unanimously, and in order to adapt to the demand of country variant, read write line allows for possessing the demand identifying multiple frequencies with the RFID product for country variant or area.This utility model provides a kind of multifrequency RFID reader based on software radio, is made up of radio-frequency module, baseband module and power module, wherein power module is connected with radio-frequency module, baseband module respectively；Described radio-frequency module is used for realizing the modulation to baseband signal, demodulation, and sends reception modulated signal；Described baseband module realizes the control to whole read write line, coding, decoding, verification, read write line are interacted and the control to radio-frequency module with host computer, baseband module includes arm processor system and FPGA, arm processor system is connected with FPGA, and FPGA is connected with radio-frequency module.
Description
Technical field
This utility model is related to a kind of multifrequency RFID reader based on software radio, and more particularly to one kind can be known
The rfid interrogator of other multi-frequency label, can be used for freeway management, the identification of logistics goods and classification, valuables QC
Reason, false proof, gate control system, warehousing management, retail management, Container Transport, postal service etc..
Background technology
Rfid interrogator is also called " RFID reader ", i.e. radio frequency identification, by radio frequency identification signal automatic identification
Destination object simultaneously obtains related data, and without manual intervention, recognizable high-speed moving object simultaneously can identify multiple RFID marks simultaneously
Sign, swift and convenient to operate.Rfid interrogator is divided into low frequency, high frequency, hyperfrequency and microwave frequency band four class read write line.
At present, the implementation method of domestic and international rfid interrogator base band control section is varied, to meet different occasions
Application demand.Main implementation method has single-chip microcomputer, DSP, ARM and FPGA/CPLD etc., and in addition increasing read write line is wide
The implementation method of general employing multi-controller, i.e. the combination of multiple or several control units, such as：Single-chip microcomputer+single-chip microcomputer, single-chip microcomputer+
DSP, single-chip microcomputer+FPGA, DSP+FPGA, ARM+FPGA etc..The structure of read-write machine baseband control section controller to be used,
Function and performance difference are very big, need according to specific application scenario selection control and its implementation.
Due to lacking a unified standard, the RF identification frequency of every country fails to reach unanimously, in order to adapt to not
With the demand of country, read write line allows for possessing and identifies that the demand of multiple frequencies is produced with the RFID for country variant or area
Product.
Utility model content
The purpose of this utility model is to overcome above-mentioned deficiency present in prior art, and provides a kind of structure design to close
Reason, solves the problems, such as to identify that frequency is single, and can adapt to the multifrequency based on software radio of country variant demand
RFID reader.
The technical scheme in the invention for solving the above technical problem is：Should be read based on multifrequency RFID of software radio
Read device it is characterised in that：Be made up of radio-frequency module, baseband module and power module, wherein power module respectively with radio-frequency module,
Baseband module connects,
Described radio-frequency module is used for realizing the modulation to baseband signal, demodulation, and sends reception modulated signal；
Described baseband module realizes the friendship of the control to whole read write line, coding, decoding, verification, read write line and host computer
Mutually and the control to radio-frequency module, baseband module includes arm processor system and FPGA, arm processor system with can
Programmed logic connects, and FPGA is connected with radio-frequency module.
Radio-frequency module described in the utility model include the first receiving channel, the second receiving channel, the first sendaisle, second
Sendaisle, first annular device, the second circulator, the first power amplifier and the second power amplifier, the first receiving channel and
Second receiving channel is to be independently arranged, and the first sendaisle and the second sendaisle are to be independently arranged；
Described first receiving channel is connected with first annular device, and the first receiving channel receives the signal from antenna, successively
Carry out a down coversion, mixing, secondary down coversion, filter filtering, analog-digital converter carries out analog digital conversion, and antenna is received
Brewed analogue signal be converted to demodulated digital signal, and baseband module is sent to by the data-interface of radio-frequency module
FPGA；
Described second receiving channel is connected with the second circulator, and the second receiving channel receives the signal from antenna, successively
Carry out a down coversion, mixing, secondary down coversion, filter filtering, analog-digital converter carries out analog digital conversion, and antenna is received
Brewed analogue signal be converted to demodulated digital signal, and baseband module is sent to by the data-interface of radio-frequency module
FPGA；
Described first sendaisle is connected with the first power amplifier, and the first power amplifier is connected with first annular device,
The data-interface of radio-frequency module receives the unmodulated digital signal of the FPGA of baseband module, through digital to analog converter conversion
Become analogue signal, after filtering device filtering, then carry out up-conversion, mixing and secondary up-conversion successively, be transformed into modulated letter
Number, and pass through the amplification to signal for first power amplifier, launch via antenna；
Described second sendaisle is connected with the second power amplifier, and the second power amplifier is connected with the second circulator,
The data-interface of radio-frequency module receives the unmodulated digital signal of the FPGA of baseband module, through digital to analog converter conversion
Become analogue signal, after filtering device filtering, then carry out up-conversion, mixing and secondary up-conversion successively, be transformed into modulated letter
Number, and pass through the amplification to signal for second power amplifier, launch via antenna.
SPI interface is provided with radio-frequency module described in the utility model, the arm processor system of baseband module passes through SPI
Interface carries out the extraction of radio frequency parameter configuration and status information to radio-frequency module.
The data-interface of the FPGA of baseband module described in the utility model passes through FMC data path and radio-frequency module
Data-interface connect.
Data interaction between baseband module described in the utility model and radio-frequency module adopts two kinds of interfaces, and the first is to adopt
With parallel data port come transmission data, its transmission mode is CMOS level, and second adopts Differential Input port and outfan
Mouth carrys out transmission data, and its transmission level pattern is LVDS level.
First receiving channel described in the utility model and the second receiving channel all include three input ports, and each port can
With Differential Input it is also possible to single ended input, described first sendaisle and the second sendaisle TX2 are respectively provided with two outfans,
Each outfan adopts difference output mode.
Power module described in the utility model includes input, and baseband module passes through to input 5V signal, cascades in order, with
The order of 1.0V, 1.8V, 1.5V, 3.3V completes power up, and 3.3V finally rises, and electric power source pair of module radio-frequency module provides
Three kinds of power supplys are powered：Analog power 1.3V, interface power 1.8V and GP0 power supply 3.3V.
Radio-frequency module described in the utility model adopts high-frequency range, high channel bandwidth, high integration, programmability flexible
Agile transceiver AD9361, described baseband module is using programmable expansible process structure zynq-7000 entirely.
This utility model compared with prior art, has advantages below and effect：1；Structure is simple, reasonable in design；2nd, base
It is integrated with arm processor system and FPGA two parts, using the framework of FPGA+ARM stone, this framework in band module
For comparing the single processor chips of single FPGA+, solve bandwidth bottleneck when FPGA and processor pass through and ask
Topic, for the soft core of FPGA+ARM, the performance of processor is more preferable, and it is less to occupy FPGA resource；3rd, this utility model
In radio-frequency module, there is unprecedented high-frequency range, high channel bandwidth, high integration, flexible programmability, break through
Hinder the maximum technical bottleneck of soft radio applications all the time；4th, data processing speed of the present utility model is fast, covers
Frequency range is wide (860Mhz-960Mhz, 2.4Ghz-2.45Ghz, 5.8Ghz).
Brief description
In order to be illustrated more clearly that this utility model embodiment or technical scheme of the prior art, below will be to embodiment
Or in description of the prior art the accompanying drawing of required use be briefly described it should be apparent that, drawings in the following description are only
It is some embodiments of the present utility model, for those of ordinary skill in the art, before not paying creative labor
Put, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the system diagram of the multifrequency RFID reader based on software radio in the embodiment of the present invention.
Fig. 2 is the hardware elementary diagram of the multifrequency RFID reader based on software radio.
Fig. 3 is the power supply the principle figure of baseband module.
Fig. 4 is the power supply the principle figure of radio-frequency module.
Specific embodiment
The utility model is described in further detail below in conjunction with the accompanying drawings and by embodiment, and following examples are right
Of the present utility model explain and this utility model is not limited to following examples.
Embodiment 1.
Referring to Fig. 1 to Fig. 4, the multifrequency RFID reader based on software radio of the present embodiment is by radio-frequency module 1, base band
Module 2 and power module 3 form, and wherein power module 3 is connected with radio-frequency module 1, baseband module 2 respectively.
Radio-frequency module 1 in the present embodiment is used for realizing the modulation to baseband signal, demodulation, and sends the modulated letter of reception
Number.
Baseband module 2 in the present embodiment realize control to whole read write line, coding, decoding, verification, read write line with upper
The position interaction of machine and the control to radio-frequency module 1, baseband module 2 includes arm processor system PS and FPGA PL, ARM
Processor system PS is connected with FPGA PL, and FPGA PL is connected with radio-frequency module 1.
Radio-frequency module 1 in the present embodiment includes the first receiving channel RX1, the second receiving channel RX2, the first sendaisle
TX1, the second sendaisle TX2, first annular device 11, the second circulator 12, the first power amplifier 13 and the second power amplification
Device 14, the first receiving channel RX1 and the second receiving channel RX2 are to be independently arranged, the first sendaisle TX1 and the second sendaisle
TX2 is to be independently arranged.
The first receiving channel RX1 in the present embodiment is connected with first annular device 11, and the first receiving channel RX1 receives and is derived from
The signal of antenna, the first receiving channel RX1 is correspondingly arranged once down coversion, mixing, secondary down coversion, wave filter, mould therewith
The modules such as number converter AD, the first receiving channel RX1 carries out a down coversion successively, mixing, secondary down coversion, and wave filter is filtered
Ripple, analog-digital converter AD carries out analog digital conversion, and the brewed analogue signal that antenna is received is converted to demodulated digital signal,
And the FPGA PL of baseband module 2 is sent to by the data-interface of radio-frequency module 1.
The second receiving channel RX2 in the present embodiment is connected with the second circulator 12, and the second receiving channel RX2 corresponds to therewith
The setting once module such as down coversion, mixing, secondary down coversion, wave filter, analog-digital converter AD, the second receiving channel RX2 connects
Receive the signal from antenna, carry out a down coversion successively, mixing, secondary down coversion, filter filtering, analog-digital converter AD enters
Row analog digital conversion, the brewed analogue signal that antenna is received is converted to demodulated digital signal, and by radio-frequency module 1
Data-interface sends the FPGA PL of baseband module 2 to.
The first sendaisle TX1 in the present embodiment is connected with the first power amplifier 13, the first power amplifier 13 with
First annular device 11 connects, and the first sendaisle TX1 is correspondingly arranged once down coversion, mixing, secondary down coversion, filtering therewith
The modules such as device, analog-digital converter DA, the data-interface of radio-frequency module 1 receives the unmodulated of the FPGA PL of baseband module 2
Digital signal, is converted into analogue signal through digital to analog converter DA, after filtering device filtering, then carry out successively up-conversion,
Mixing and secondary up-conversion, are transformed into modulated signal, and pass through the amplification to signal for first power amplifier 13, send out via antenna
It is shot out.
The second sendaisle TX2 in the present embodiment is connected with the second power amplifier 14, the second power amplifier 14 with
Second circulator 12 connects, and the second sendaisle TX2 is correspondingly arranged once down coversion, mixing, secondary down coversion, filtering therewith
The modules such as device filtering, analog-digital converter DA, the FPGA PL of the data-interface reception baseband module 2 of radio-frequency module 1 is not
Modulated digital signal, is converted into analogue signal through digital to analog converter DA, after filtering device filtering, then carries out once upper change successively
Frequently, mixing and secondary up-conversion, are transformed into modulated signal, and pass through the amplification to signal for second power amplifier 14, via sky
Line is launched.
SPI interface SPI is provided with the radio-frequency module 1 in the present embodiment, arm processor system PS of baseband module 2 is led to
Cross the extraction that SPI interface SPI carries out radio frequency parameter configuration and status information to radio-frequency module 1.By using SPI drive module,
Baseband module 2 and the information exchange of radio-frequency module 1 can be completed, configure radio frequency parameter and read status information etc..
The data-interface of the FPGA PL of the baseband module 2 in the present embodiment passes through FMC data path and radio frequency mould
The data-interface of block 1 connects.
Data interaction between baseband module 2 in the present embodiment and radio-frequency module 1 adopts two kinds of interfaces, and the first is to adopt
With 12 bit parallel data port (P0 [D11：D0] and P1 [D11：D0]) carry out transmission data, its transmission mode is CMOS level, P0
Mouth is a part for CMOS level data port " 0 ", and P1 mouth is a part for CMOS level data port " 1 ", and second adopts
LVDS Differential Input port (TX [D5：D0]) and output port (RX [D5：D0]) carry out transmission data, its transmission level pattern is
LVDS level, the first receiving channel RX1, the second receiving channel RX2 are six Differential Input of LVDS, the first sendaisle TX1, the
Two sendaisle TX2 are six difference output of LVDS.Both transmission means, can be with flexible configuration to meet FPDP line
System requirements.Working method has two kinds, two-way (TDD) pattern and full duplex (FDD) pattern, in the fdd mode, half digit
For launching data, half digit is used for receiving data.
The first receiving channel RX1 in the present embodiment includes three input ports (RX1A, RX1B, RX1C), the second reception
Passage RX2 includes three input ports (RX2A, RX2B, RX2C), each port can with Differential Input it is also possible to single ended input,
Because differential signal is a kind of balanced signal, in signal, the amplitude of positive negative signal is identical, but opposite in phase, and final result is with whole
Signal deducts negative signal, thus can effectively eliminate the interference such as systematic error and noise, can also effectively provide altogether
Mould rejection ratio and PSRR, so the present embodiment adopts Differential Input.First sendaisle TX1 has two outfans
(TX1A, TX1B), the second sendaisle TX2 has two outfans (TX2A, TX2B), and each outfan adopts difference output side
Formula.
As shown in figure 3, the power module 3 in the present embodiment includes input Input, baseband module 2 passes through to input 5V letter
Number, cascade in order, power up is completed with the order of 1.0V, 1.8V, 1.5V, 3.3V, 3.3V finally rises, provide multiple simultaneously
Position signal carries out the operation that resets to system, and the I/O level of ARM processing system ps and each pin of FPGA PL is by processor
There is provided.As shown in figure 4, power module 3 provides three kinds of power supplys to power to radio-frequency module 1：Analog power 1.3V, interface power
1.8V and GP0 power supply 3.3V, for the application optimizing noiseproof feature, the power source design of radio-frequency module 1 adopts low noise power supply solution
Certainly scheme.
Radio-frequency module 1 in the present embodiment adopts high-frequency range, high channel bandwidth, high integration, programmability flexible
Agile transceiver AD9361, baseband module 2 using entirely programmable expansible process structure zynq-7000.
As shown in figure 1, the rfid system of complete set is by host computer, read write line, antenna, label four part in the present embodiment
Composition.
Above content described in this specification is only to this utility model example explanation.This utility model
Person of ordinary skill in the field can make various modifications or supplement or adopt class to described specific embodiment
As mode substitute, the content without departing from this utility model description or surmount model defined in the claims
Enclose, protection domain of the present utility model all should be belonged to.
Claims (6)
1. a kind of multifrequency RFID reader based on software radio it is characterised in that：By radio-frequency module, baseband module and power supply
Module forms, and wherein power module is connected with radio-frequency module, baseband module respectively；
Described radio-frequency module is used for realizing the modulation to baseband signal, demodulation, and sends reception modulated signal；
Described baseband module includes arm processor system and FPGA, and arm processor system is connected with FPGA,
FPGA is connected with radio-frequency module.
2. the multifrequency RFID reader based on software radio according to claim 1 it is characterised in that：Described radio frequency mould
Block includes the first receiving channel, the second receiving channel, the first sendaisle, the second sendaisle, first annular device, the second annular
Device, the first power amplifier and the second power amplifier, the first receiving channel and the second receiving channel are to be independently arranged, first
Passage and the second sendaisle is sent to be to be independently arranged；
Described first receiving channel is connected with first annular device, and the first receiving channel receives the signal from antenna, carries out successively
Down coversion, mixing, secondary down coversion, filter filtering, analog-digital converter carries out analog digital conversion, and antenna is received
Modulated analog signal is converted to demodulated digital signal, and sends compiling of baseband module to by the data-interface of radio-frequency module
Journey logic；
Described second receiving channel is connected with the second circulator, and the second receiving channel receives the signal from antenna, carries out successively
Down coversion, mixing, secondary down coversion, filter filtering, analog-digital converter carries out analog digital conversion, and antenna is received
Modulated analog signal is converted to demodulated digital signal, and sends compiling of baseband module to by the data-interface of radio-frequency module
Journey logic；
Described first sendaisle is connected with the first power amplifier, and the first power amplifier is connected with first annular device, radio frequency
The data-interface of module receives the unmodulated digital signal of the FPGA of baseband module, is converted into mould through digital to analog converter
Intend signal, after filtering device filtering, then carry out up-conversion, mixing and secondary up-conversion successively, be transformed into modulated signal, and
By the amplification to signal for first power amplifier, launch via antenna；
Described second sendaisle is connected with the second power amplifier, and the second power amplifier is connected with the second circulator, radio frequency
The data-interface of module receives the unmodulated digital signal of the FPGA of baseband module, is converted into mould through digital to analog converter
Intend signal, after filtering device filtering, then carry out up-conversion, mixing and secondary up-conversion successively, be transformed into modulated signal, and
By the amplification to signal for second power amplifier, launch via antenna.
3. the multifrequency RFID reader based on software radio according to claim 1 and 2 it is characterised in that：Described penetrate
SPI interface is provided with frequency module.
4. the multifrequency RFID reader based on software radio according to claim 2 it is characterised in that：Described base band mould
The data-interface of the FPGA of block is connected with the data-interface of radio-frequency module by FMC data path.
5. the multifrequency RFID reader based on software radio according to claim 2 it is characterised in that：Described first connects
Receive passage and the second receiving channel all includes three input ports, described first sendaisle and the second sendaisle TX2 all have
There are two outfans.
6. the multifrequency RFID reader based on software radio according to claim 1 it is characterised in that：Described radio frequency mould
Block adopts high-frequency range, high channel bandwidth, high integration, programmability flexible agile transceiver AD9361, described base band
Module is using programmable expansible process structure zynq-7000 entirely.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620666745.6U CN205992226U (en) | 2016-06-29 | 2016-06-29 | Multifrequency RFID reader based on software radio |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620666745.6U CN205992226U (en) | 2016-06-29 | 2016-06-29 | Multifrequency RFID reader based on software radio |
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| Publication Number | Publication Date |
|---|---|
| CN205992226U true CN205992226U (en) | 2017-03-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620666745.6U Expired - Fee Related CN205992226U (en) | 2016-06-29 | 2016-06-29 | Multifrequency RFID reader based on software radio |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105912970A (en) * | 2016-06-29 | 2016-08-31 | 长春理工大学 | Multi-frequency RFID reader based on software radio |
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2016
- 2016-06-29 CN CN201620666745.6U patent/CN205992226U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105912970A (en) * | 2016-06-29 | 2016-08-31 | 长春理工大学 | Multi-frequency RFID reader based on software radio |
| CN105912970B (en) * | 2016-06-29 | 2018-07-24 | 长春理工大学 | A kind of multifrequency RFID reader based on software radio |
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| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170301 Termination date: 20180629 |