CN105583718A - Chemical mechanical polishing (CMP) method - Google Patents

Chemical mechanical polishing (CMP) method Download PDF

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CN105583718A
CN105583718A CN201410643429.2A CN201410643429A CN105583718A CN 105583718 A CN105583718 A CN 105583718A CN 201410643429 A CN201410643429 A CN 201410643429A CN 105583718 A CN105583718 A CN 105583718A
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defect
density
cmp
oxide layer
thickness
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CN105583718B (en
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曹鹤
陈岚
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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Abstract

The invention discloses a chemical mechanical polishing (CMP) method. The method includes the steps that first flaw distribution of a chip to be processed is obtained according to the thickness of an initial oxide layer, and flaw parameters of a flaw area of the chip to be processed are obtained according to the first flaw distribution; the optimizing thickness of the oxide layer is determined according to the flaw parameters, so that CMP flaws are reduced; second flaw distribution of the chip to be processed in the optimizing thickness is obtained, and dummy fill is carried out on the chip to be processed according to the second flaw distribution; and CMP is carried out on the chip to be processed after dummy fill. By the adoption of the method for carrying out CMP on the chip to be processed, the unevenness of the surface of the chip is relieved, the dummy fill quantity is reduced, and therefore the interconnection line parasitic effect caused by dummy fill is substantially reduced.

Description

A kind of chemical and mechanical grinding method
Technical field
The present invention relates to field of manufacturing semiconductor devices, particularly relate to a kind of chemical and mechanical grinding method.
Background technology
The chip of super large-scale integration adopts the mode of stacking layer by layer in manufacture process, along with collectionCheng Du is more and more higher, and chip features size is more and more less, just smooth to every layer of material in manufacture processProperty has proposed more and more higher requirement. Cmp (CMP) technique is in chip manufacturing process onePlant common overall flattening method, because the medium such as metal and oxide has different material behaviors,In CMP process, the removal speed of different medium is not identical, and removes different material require employingsDifferent lapping liquids and different process conditions, therefore whole CMP process is divided into P1 stage (rough polishing rankSection), P2 stage (middle throwing stage) and P3 stage (smart throwing stage) three phases. Finish when the P3 stageAfter, may produce two problems: metal dish (Dishing) and oxide layer corrode (Erosion), thisTwo kinds of defects and domain graphic feature are as closely related in metal live width and distance between centers of tracks etc., are to affect chip surfaceThe principal element of degree of planarization.
At present, the defect problem itself bringing in order to solve this CMP technique, may produce CMP conventionallyRedundancy metal (Dummyfill) is filled at the position of defect, makes layout density homogenising, thereby reduces defectGeneration. But the filling of redundancy metal has brought a major issue, be exactly interconnection line ghost effect:Redundancy metal, as a kind of interconnection line parasitic elements, can cause the RC delay of interconnection line and the string of signalDisturb, integrated circuit especially of today is just towards high speed, high density, low-power consumption future development, redundancy goldBelong to the interconnection line ghost effect that brings become key that restriction deep-submicron integrated circuit manufactures because ofElement.
Therefore, we need one can reduce chip surface unevenness, can reduce again interconnection line parasitismThe chemical and mechanical grinding method of effect.
Summary of the invention
For addressing the above problem, the invention provides a kind of chemical and mechanical grinding method, can reduce chipThe smooth property of air spots, can reduce again interconnection line ghost effect.
A kind of chemical and mechanical grinding method provided by the invention, the method comprises:
Obtain the first defect distribution of pending chip according to initial oxidation layer thickness, lack according to described firstThe defect parameters in pending chip defect region described in sunken distributed acquisition;
Determine the optimization thickness of described oxide layer according to described defect parameters, to reduce CMP defect;
Obtain second defect distribution of described pending chip under described optimization thickness, and according to describedTwo defect distribution are carried out redundancy metal filling to described pending chip;
The described pending chip carrying out after described redundancy metal filling is carried out to cmp.
Preferably, in above-mentioned chemical and mechanical grinding method, described in obtain the first defect of pending chipDistribute and obtain described defect parameters and be:
Utilize CMP-DFM instrument to simulate, the first defect distribution of obtaining described pending chip withAnd described defect parameters.
Preferably, in above-mentioned chemical and mechanical grinding method, described in obtain the defect parameters bag of defect areaDraw together:
Obtain live width, spacing and a Dishing value of the metal of described defect area.
Preferably, in above-mentioned chemical and mechanical grinding method, definite bag of the optimization thickness of described oxide layerDraw together step:
The 2nd Dishing value of the defect that A1) setting will be eliminated;
A2), according to a described Dishing value and described the 2nd Dishing value, utilize oxide layer to optimize thicknessComputing formula, calculates the optimization thickness of described oxide layer;
A3) check technique complete after described oxide layer whether all remove, if all do not removed, adjustWhole described the 2nd Dishing value, returns to steps A 2), corresponding oxygen in the time that described oxide layer is all removedThe optimization thickness of changing layer is final definite optimization thickness.
Preferably, in above-mentioned chemical and mechanical grinding method, described oxide layer is optimized thickness equations and is:
h 20 = ( v 3 - v 4 ) × t - D 2 - D 30 + ( 1 - v 3 v 1 ) × h 1 ( v 3 v 2 - 1 )
Wherein, h20For the optimization thickness of described oxide layer, h1For barrier layer thickness, D2For described firstDishing value, D30For the 2nd Dishing value of the described defect that will eliminate, v1For on average going of barrier layerRemoval rates, v2For the average removal rate of oxide layer, v3For the average removal rate of dielectric layer, v4For goldThe average removal rate that belongs to wire, t is total milling time in P3 stage.
Preferably, in above-mentioned chemical and mechanical grinding method, described according to described the second defect distribution to instituteStating pending chip carries out redundancy metal and fills and comprise step:
Set density lower limit DI and allow density fluctuation △ D;
Utilize CMP-DFM instrument to obtain the density value of described defect area;
Judge that whether described defect area has the grid that exceeds density lower limit, if had, adds redundancy metalMake the density of described grid reach density lower limit DI;
Calculate the density maximum D that each described grid is adjacent gridmax
Judge described density maximum DmaxWhether be greater than △ D with the difference of current described mesh-density, ifBe greater than △ D, adjust the pad parameter that Density Distribution reports an error in region, current mesh-density is adjusted intoDmax-△D。
Preferably, in above-mentioned chemical and mechanical grinding method, described size of mesh opening and CMP-DFM adoptSize of mesh opening identical.
Preferably, in above-mentioned chemical and mechanical grinding method, described adjustment Density Distribution reports an error in regionPad parameter is: filled metal dimension or changed buffer distance by change and adjust the Density Distribution district that reports an errorPad parameter in territory.
Preferably, in above-mentioned chemical and mechanical grinding method, described oxide layer is for utilizing ethyl orthosilicate systemStandby silicon dioxide layer.
Preferably, in above-mentioned chemical and mechanical grinding method, described redundancy metal is copper.
By foregoing description, chemical and mechanical grinding method provided by the invention comprises: according to initial oxide layerThickness obtains the first defect distribution of pending chip, described in obtaining, waits to locate according to described the first defect distributionThe defect parameters in reason chip defect region; Determine the optimization thickness of described oxide layer according to described defect parameters,To reduce CMP defect; Obtain second defect distribution of described pending chip under described optimization thickness,And according to described the second defect distribution, described pending chip is carried out to redundancy metal filling; To carry out described inDescribed pending chip after redundancy metal is filled carries out cmp. Chemical machine provided by the inventionTool Ginding process by calculating the optimization thickness of oxide layer, carries out CMP under described optimization thickness,Will significantly reduce the defect that CMP brings, therefore only need redundancy metal still less to fill, soAfter carry out CMP. This method had both reduced the unevenness of chip surface, had reduced again redundancy metalFill quantity, fill thereby significantly reduced redundancy metal the interconnection line ghost effect bringing.
Brief description of the drawings
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, below will be to realityThe accompanying drawing of executing required use in example or description of the Prior Art is briefly described, apparently, belowAccompanying drawing in description is only embodiments of the invention, for those of ordinary skill in the art, notPay under the prerequisite of creative work, other accompanying drawing can also be provided according to the accompanying drawing providing.
The schematic flow sheet of a kind of chemical and mechanical grinding method that Fig. 1 provides for the embodiment of the present application;
Fig. 2 is the structural representation of described pending chip;
A kind of oxide layer that Fig. 3 provides for the embodiment of the present application is optimized the flow process signal of definite method of thicknessFigure;
The schematic flow sheet of a kind of redundancy metal fill method that Fig. 4 provides for the embodiment of the present application.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried outDescribe clearly and completely, obviously, described embodiment is only the present invention's part embodiment, andNot whole embodiment. Based on the embodiment in the present invention, those of ordinary skill in the art are not doingGo out the every other embodiment obtaining under creative work prerequisite, all belong to the scope of protection of the invention.
The embodiment of the present application provides a kind of chemical and mechanical grinding method, and as shown in Figure 1, Fig. 1 is the applicationThe schematic flow sheet of a kind of chemical and mechanical grinding method that embodiment provides, described method comprises:
S1: obtain the first defect distribution of pending chip and defect area according to initial oxidation layer thicknessDefect parameters.
In this step, the instrument utilizing is CMP-DFM (ChemicalmechanicalPolishing-Designformanufacture) instrument, i.e. the manufacturability design tool of cmp,The CMP overall process of utilizing this instrument can treat process chip is carried out analogue simulation, to obtain best workSkill condition, thereby the object that reaches Optimization Technology and enhance productivity. Pending described in the present inventionAs shown in Figure 2, the structural representation that Fig. 2 is described pending chip, comprises four parts: stop to chip altogetherLayer 201, oxide layer 202, dielectric layer 203 and plain conductor 204. Wherein, barrier layer 201 material therefors are logicalNormal is Ta/TaN, and its effect is that copper diffusion barrier enters in silicon or silica; Oxide layer 202 is generally to utilizeTEOS, the silicon dioxide layer that prepared by ethyl orthosilicate, in general situation, foundries requires to setAn initial oxide layer one-tenth-value thickness 1/10; Dielectric layer 203 is generally the material of silica or low-k; GoldBelong to wire 204 and be generally copper conductor. CMP process based on the interconnected pending chip of copper conductor is generally divided intoThree phases: P1 (rough polishing stage), P2 (middle throwing stage) and P3 (smart throwing stage). CMP processWhy being divided into three phases, is will utilize different technological parameters and consumption because remove different materialsProduct, and the removal speed in each stage is also different.
In this step, first obtain foundries and require the initial oxidation layer thickness arranging, and definite CMPTechnological parameter, these technological parameters comprise: downforce, grinding pad rotating speed and pending chip rotating speed etc.,Recycling CMP-DFM instrument arranges described initial oxidation layer thickness and described technological parameter, carries out CMPThe analogue simulation of technical process, obtains the former domain of described pending chip in described technique and described initialThe first defect distribution producing under oxidated layer thickness, then according to described the first defect distribution, extracts defectThe parameters such as live width, spacing and a Dishing value of the metal in region, a wherein said Dishing value isAs shown in Figure 2 before the P3 stage, the height difference of described barrier layer and described plain conductor.
S2: the optimization thickness of determining described oxide layer according to described defect parameters.
In this step, specifically as shown in Figure 3, Fig. 3 is this Shen to definite method of the optimization thickness of oxide layerA kind of oxide layer please embodiment providing is optimized definite method of thickness, comprising:
S21: the 2nd Dishing value of the defect that setting will be eliminated.
In this step, described the 2nd Dishing value is a critical value, can set voluntarily. First,After carrying out CMP by analysis under initial oxide layer thickness condition, the defect that its P3 stage producesDishing value distribution situation, then, determines a 2nd Dishing value, makes by optimizing oxide layerThickness, can eliminate the defect that Dishing value is less than described the 2nd Dishing value.
S22: utilize oxide layer to optimize thickness equations, calculate the optimization thickness of described oxide layer.
In this step, oxide layer optimize THICKNESS CALCULATION have various ways, wherein, the present embodiment adopt asUnder formula calculate:
h 20 = ( v 3 - v 4 ) × t - D 2 - D 30 + ( 1 - v 3 v 1 ) × h 1 ( v 3 v 2 - 1 )
Wherein, h20For the optimization thickness of described oxide layer, h1For the thickness on described barrier layer 201, D2For instituteState a Dishing value, D30For the 2nd Dishing value of the described defect that will eliminate, v1For described barrier layer201 average removal rate, v2For the average removal rate of described oxide layer 202, v3For described dielectric layer 203Average removal rate, v4For the average removal rate of described plain conductor 204, the above v1、v2、v3、v4Be constant, t is total milling time in P3 stage, and computational methods are t=h4/v4, wherein h4For describedThe thickness of plain conductor.
S23: after inspection technique completes, whether described oxide layer is all removed.
In this step, why to carry out this inspection, be because if CMP technique is gone back after completingRemain oxide layer, can produce adverse influence to follow-up chip flow process. Wherein, optimal feelingsCondition is exactly: by continuing to optimize described the 2nd Dishing value, obtains a described oxide layer and optimizes thickness,Make after CMP technique completes, oxide layer is removed just completely. If check and find oxide layer notAll remove, return to step S21, adjust described the 2nd Dishing value, specifically, can be by secondDishing value is constantly adjusted from small to big, and carries out the simulation of CMP, so repeatedly, until oxide layer202 are removed just completely, enter step S24.
S24: oxidated layer thickness when oxide layer in step S23 is removed just is completely defined as final oxygenChange layer and optimize thickness.
S3: obtain second defect distribution of described pending chip under described optimization thickness, and carry out superfluousRemaining metal filled.
In this step, be to utilize CMP-DFM instrument equally, analyze in described oxide layer and optimize thicknessUnder condition, after analogue simulation is carried out in the CMP technological process for the treatment of process chip, the second defect obtainingDistribute. It should be noted that herein, although the thickness of described oxide layer is set to optimize thickness, thisAlso minimizing defect that can only be by a relatively large margin, and can not eliminate completely defect. In this case,Need to carry out necessary redundancy metal to defect area and fill, make the density metal homogenising of domain, fromAnd the defects such as the Dishing that minimizing CMP brings. Described redundancy metal can be preferably copper, but is not limited only toCopper.
Wherein, the method that described redundancy metal is filled as shown in Figure 4, the one that Fig. 4 provides for the present embodimentThe schematic flow sheet of redundancy metal fill method, the method comprises:
S31: set density lower limit DI and allow density fluctuation △ D.
In this step, described density lower limit DI is whether grid carries out the critical of redundancy metal fillingValue, in the time that the density metal of grid is less than density lower limit DI, needs to carry out redundancy metal filling, to keep awayAfter exempting from CMP there is defect in this grid place, and in the time that the density metal of grid is greater than density lower limit DI, notNeed to fill redundancy metal. The implication of described permission density fluctuation △ D is: the metal of any two adjacent meshDensity difference can not exceed △ D, if exceed △ D, also can after CMP, produce defect.
S32: utilize CMP-DFM instrument to obtain the density value of described defect area.
In this step, the size of the grid that described defect area divides is first set, in the present invention by thisIt is identical that sizing grid is preferably the sizing grid adopting with CMP-DFM instrument, is 20 μ m*20 μ m, like thisSelection is for easy and simple to handle, can certainly be arranged to other sizing grid; Then utilizeCMP-DFM instrument obtains the density value of each grid of described defect area.
S33: whether described defect area has the grid that exceeds density lower limit.
In this step, judge and in described defect area, whether exist density metal to be less than density lower limitGrid, if had, enters step S34, if do not had, directly enters step S35.
S34: add redundancy metal, make defect area density reach DI.
In this step, the adding of redundancy metal the too low region of original density metal is reached to setDI value, thus in subsequent CMP process, be unlikely to produce because suffering overmastication the defects such as Dishing.
S35: the density maximum D that calculates each described grid and be adjacent gridmax
In this step, the density metal that each grid is adjacent to grid compares, and obtains metal closeDegree maximum, object is bulk density fluctuation.
S36: described density maximum DmaxWhether be greater than △ D with the difference of current described mesh-density.
In this step, the density metal maximum described in calculation procedure S35 and the metal of current described gridThe difference of density, judges whether this difference is greater than △ D. If result is yes, enters step S37, needTo carry out the filling of redundancy metal to current described grid, and if do not fill, current described grid andThe grid of the density metal maximum adjacent with current described grid will, after CMP technological process, produceDifference in height be greater than described the 2nd Dishing value, thereby do not reach object of the present invention; If result is no,Directly enter step S38.
S37: adjust pad parameter, current mesh-density is adjusted into Dmax-△D。
In this step, the method for described adjustment pad parameter comprises the size and the change that change filling metalBuffer distance. Current mesh-density is adjusted into DmaxAfter-△ D, described current grid and being adjacentHave the grid of maximum metal density after CMP technique, the Dishing value of the defect of generation is institute justState the 2nd Dishing value, reached object of the present invention.
S38: advance from left to right, proceed to next line in the time of low order end.
In this step, all grids for the treatment of process chip all judge and carry out necessary redundancy goldBelong to and filling.
S39: judge whether to exist untreated grid.
If there is untreated network, enter step S35, proceed judgement and redundancy metal and fill,If there is no untreated network, redundancy metal filling process finishes.
S4: the described pending chip carrying out after described redundancy metal filling is carried out to cmp.
This step is after the preparation based on above steps, optimizes thickness condition in described oxide layerUnder, carry out cmp, the described oxide layer of final removal just, so just at minimum redundancy goldBelong under the prerequisite of filling, ensured to greatest extent the flatness of chip surface. .
Utilize chemical and mechanical grinding method as above, both reduced the unevenness of chip surface, againReduce the filling quantity of redundancy metal, filled the interconnection line bringing and post thereby significantly reduced redundancy metalComing into force should.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field can be realized or useThe present invention. To be aobvious and easy for those skilled in the art to the multiple amendment of these embodimentSee, General Principle as defined herein can be in the situation that not departing from the spirit or scope of the present invention,Realize in other embodiments. Therefore, the present invention will can not be restricted to these embodiment shown in this article,But to meet the widest scope consistent with principle disclosed herein and features of novelty.

Claims (10)

1. a chemical and mechanical grinding method, is characterized in that, comprising:
Obtain the first defect distribution of pending chip according to initial oxidation layer thickness, lack according to described firstThe defect parameters in pending chip defect region described in sunken distributed acquisition;
Determine the optimization thickness of described oxide layer according to described defect parameters, to reduce CMP defect;
Obtain second defect distribution of described pending chip under described optimization thickness, and according to describedTwo defect distribution are carried out redundancy metal filling to described pending chip;
The described pending chip carrying out after described redundancy metal filling is carried out to cmp.
2. method according to claim 1, is characterized in that, described in obtain of pending chipOne defect distribution and obtain described defect parameters and be:
Utilize CMP-DFM instrument to simulate, the first defect distribution of obtaining described pending chip withAnd described defect parameters.
3. method according to claim 2, is characterized in that, described in obtain the defect of defect areaParameter comprises:
Obtain live width, spacing and a Dishing value of the metal of described defect area.
4. method according to claim 3, is characterized in that, the optimization thickness of described oxide layerDetermine and comprise step:
The 2nd Dishing value of the defect that A1) setting will be eliminated;
A2), according to a described Dishing value and described the 2nd Dishing value, utilize oxide layer to optimize thicknessComputing formula, calculates the optimization thickness of described oxide layer;
A3) check technique complete after described oxide layer whether all remove, if all do not removed, adjustWhole described the 2nd Dishing value, returns to steps A 2), corresponding oxygen in the time that described oxide layer is all removedThe optimization thickness of changing layer is final definite optimization thickness.
5. method according to claim 4, is characterized in that, described oxide layer is optimized THICKNESS CALCULATIONFormula is:
h 20 = ( v 3 - v 4 ) × t - D 2 - D 30 + ( 1 - v 3 v 1 ) × h 1 ( v 3 v 2 - 1 )
Wherein, h20For the optimization thickness of described oxide layer, h1For barrier layer thickness, D2For described firstDishing value, D30For the 2nd Dishing value of the described defect that will eliminate, v1For on average going of barrier layerRemoval rates, v2For the average removal rate of oxide layer, v3For the average removal rate of dielectric layer, v4For goldThe average removal rate that belongs to wire, t is total milling time in P3 stage.
6. according to the method described in claim 1-5 any one, it is characterized in that, described according to describedTwo defect distribution are carried out redundancy metal filling to described pending chip and are comprised step:
Set density lower limit DI and allow density fluctuation △ D;
Utilize CMP-DFM instrument to obtain the density value of described defect area;
Judge that whether described defect area has the grid that exceeds density lower limit, if had, adds redundancy metalMake the density of described grid reach density lower limit DI;
Calculate the density maximum D that each described grid is adjacent gridmax
Judge described density maximum DmaxWhether be greater than △ D with the difference of current described mesh-density, ifBe greater than △ D, adjust the pad parameter that Density Distribution reports an error in region, current mesh-density is adjusted intoDmax-△D。
7. method according to claim 6, is characterized in that, described size of mesh opening and CMP-DFMThe size of mesh opening adopting is identical.
8. method according to claim 6, is characterized in that, the described adjustment Density Distribution district that reports an errorPad parameter in territory is: filled metal dimension or changed buffer distance by change and adjust Density DistributionThe pad parameter reporting an error in region.
9. method according to claim 1, is characterized in that, described oxide layer is for utilizing positive silicic acidSilicon dioxide layer prepared by ethyl ester.
10. method according to claim 1, is characterized in that, described redundancy metal is copper.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112198416A (en) * 2020-09-28 2021-01-08 上海华力集成电路制造有限公司 Layer removing method for improving chip flatness
CN112331561A (en) * 2020-11-20 2021-02-05 上海华力集成电路制造有限公司 Method for improving chemical mechanical polishing yield

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CN102019577A (en) * 2009-09-17 2011-04-20 中芯国际集成电路制造(上海)有限公司 Optimization method of chemical mechanical polishing process
CN102380815A (en) * 2010-09-01 2012-03-21 无锡华润上华半导体有限公司 Chemical mechanical grinding method and chemical mechanical grinding system
CN102975111A (en) * 2012-08-20 2013-03-20 广东肇庆微硕电子有限公司 Grinding method and special device for soft magnetic ferrite magnetic cores

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CN112198416A (en) * 2020-09-28 2021-01-08 上海华力集成电路制造有限公司 Layer removing method for improving chip flatness
CN112331561A (en) * 2020-11-20 2021-02-05 上海华力集成电路制造有限公司 Method for improving chemical mechanical polishing yield
CN112331561B (en) * 2020-11-20 2024-04-26 上海华力集成电路制造有限公司 Method for improving yield of chemical mechanical polishing

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