CN105575345A - Image display method and image display device - Google Patents

Image display method and image display device Download PDF

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CN105575345A
CN105575345A CN201410538460.XA CN201410538460A CN105575345A CN 105575345 A CN105575345 A CN 105575345A CN 201410538460 A CN201410538460 A CN 201410538460A CN 105575345 A CN105575345 A CN 105575345A
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odd number
image
voltage signal
pixel rows
number pixel
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CN105575345B (en
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黄顺明
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Hisense Visual Technology Co Ltd
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Qingdao Hisense Electronics Co Ltd
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Abstract

The invention discloses an image display method and an image display device. The image display method comprises the steps of determining the display mode of a to-be-displayed image; when a fact that the display mode is a 3D display mode is determined, successively scanning odd-number pixel lines on a liquid crystal display panel by a timing controller through a gate electrode driver, in scanning each odd-number pixel line, applying a voltage signal which corresponds with an image that is displayed on the odd-number pixel line on the scanned odd-number pixel line through the gate electrode driver; and after the timing controller scans a final odd-number pixel line through the gate electrode driver, simultaneously scanning all even-number pixel lines and simultaneously applying a preset voltage signal on all even-number pixel lines on the liquid crystal display panel. According to the image display method provided by the embodiment of the invention, crosstalk is prevented in a 3D manner. The image display method does not affect display of a 3D image and furthermore performs functions of preventing a ghost in display the 3D image and realizing no brightness loss in display a 2D image.

Description

A kind of method for displaying image and device
Technical field
The present invention relates to display technique field, particularly relate to a kind of method for displaying image and device.
Background technology
The 3D technology of current main flow can be divided into shutter 3D (English: Shutter3D) and polarization type 3D (English: Polarization3D).As shown in Figure 1, in polarization type 3D technology, when showing image in display panel, adjacent two pixel columns have different polarized lights, when beholder wears polaroid glasses viewing, between adjacent two pixel columns, a pixel column can only be watched by left eye, another pixel column can only be watched by right eye, can synthesize 3D rendering after the process of beholder's brain.In this technology, the reasons such as the defect existed due to display panel itself or the defect of polaroid glasses, the pixel watched by left eye can be caused to be seen by right eye, or the pixel should watched by right eye is seen by left eye, crosstalk (English: crosstalk) phenomenon at this moment will be produced.
At present in order to solve crosstalk phenomenon, the liquid crystal panel that prior art takes large pixel column and small pixel line interlacing to arrange, wherein, under 3D display mode, in large pixel column, parity rows shows left eye and eye image respectively, and at all small pixel row display black images, like this, the small pixel of display black image is about to right and left eyes image and is played space centrifugation, to reduce crosstalk between right and left eyes image, as shown in Figure 2, but, its scan mode takes size pixel column to scan refreshing display image successively, like this, interlock due to right and left eyes picture material and black image content and refresh, under showing same right and left eyes image information situation, its line frequency but needs to double, and then bring right and left eyes view data refresh time to shorten, reduce image display effect.
Summary of the invention
The embodiment of the present invention provides a kind of method for displaying image and device, when it solves polarization type 3D display, at the odd number pixel rows display right and left eyes image of liquid crystal panel, and even pixel row display black image is separated right and left eyes image minimizing crosstalk simultaneously with space, how to reduce and refreshes black image data problem consuming time.
The embodiment of the present invention provides a kind of method for displaying image, and the method comprises:
Determine the display mode of image to be displayed;
When determining that described display mode is 3D display mode, then the odd number pixel rows on display panels opened successively by time schedule controller by gate drivers, wherein, during each unlatching a line odd number pixel rows, and apply the voltage signal corresponding with the image that described unlatching a line odd number pixel rows shows by source electrode driver;
After described time schedule controller scans last column odd number pixel rows by described gate drivers, scan all even pixel row and applied the voltage signal preset by the even pixel row that source electrode driver is all on described display panels simultaneously.
The embodiment of the present invention provides a kind of image display device, and this device comprises:
Determining unit, for determining the display mode of image to be displayed;
Display unit, during for determining that described display mode is 3D display mode, the odd number pixel rows on display panels is then opened successively by gate drivers, wherein, during each scanning a line odd number pixel rows, and apply the voltage signal corresponding with the image that described odd number pixel rows shows by source electrode driver; After scanning last column odd number pixel rows by described gate drivers, applied the voltage signal preset by the even pixel row that source electrode driver is all on described display panels simultaneously.
The embodiment of the present invention provides a kind of method for displaying image and device, when showing image, determine the display mode of image to be displayed, when 3D display mode, the odd number pixel rows on display panels opened successively by time schedule controller by gate drivers, and by source electrode driver to being applied corresponding voltage signal in the odd number pixel rows that scans; After time schedule controller scans last column odd number pixel rows by described gate drivers, scan all even pixel row and applied the voltage signal preset by source electrode driver to all even pixel row simultaneously.By the method that the embodiment of the present invention provides, scan all odd number pixel rows successively, right and left eyes 3D rendering is refreshed at odd number pixel rows, and after in the end the line scanning of a line odd pixel completes, simultaneously to the voltage signal preset applied in all even pixel row, shorten even pixel row refresh time, relatively improve the right and left eyes 3D rendering Refresh Data time of odd number pixel rows, that is: improve the duration of charging of odd number pixel rows, decrease power consumption simultaneously.
Accompanying drawing explanation
Fig. 1 is polarization type 3D technology schematic diagram;
Fig. 2 is the polarization type 3D technology schematic diagram with polarization band;
A kind of method for displaying image process flow diagram that Fig. 3 provides for the embodiment of the present invention;
A kind of pixel column structural representation that Fig. 4 provides for the embodiment of the present invention;
The circuit structure diagram of a kind of method for displaying image that Fig. 5 provides for the embodiment of the present invention;
Fig. 6 is the time diagram of gate drivers under 3D display mode;
Fig. 7 is the time diagram of interlacing odd pixel column;
Fig. 8 is the time diagram of gate drivers under 2D display mode;
Fig. 9 is the time diagram of dual scan;
Figure 10 is scan clock signal schematic diagram;
A kind of image display device structural drawing that Figure 11 provides for the embodiment of the present invention.
Embodiment
In order to make the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, the present invention is described in further detail, and obviously, described embodiment is only a part of embodiment of the present invention, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making other embodiments all obtained under creative work prerequisite, belong to the scope of protection of the invention.
Below in conjunction with Figure of description, the embodiment of the present invention is described in detail.
As shown in Figure 3, a kind of method for displaying image process flow diagram that the embodiment of the present invention provides, the method comprises:
Step 301: the display mode determining image to be displayed;
Step 302: when determining that described display mode is 3D display mode, then the odd number pixel rows on display panels opened successively by time schedule controller by gate drivers, wherein, each scanning a line odd number pixel rows, and apply to show voltage signal corresponding to image with described unlatching a line odd number pixel rows by source electrode driver;
Step 303: after described time schedule controller scans last column odd number pixel rows by described gate drivers, is scanned all even pixel row and is applied the voltage signal preset by the even pixel row that source electrode driver is all on described display panels simultaneously.
As shown in Figure 4, the area of the pixel in display panels in odd number pixel rows shared by display panels is greater than the area of pixel shared by display panels in even pixel row.The area shared on display panels of the pixel be all greater than in even pixel row for the area that odd number pixel rows is shared on display panels is in the following description described, the situation of the area that the pixel be greater than in odd number pixel rows for the area that even pixel row is shared on display panels is shared on display panels is not described in detail, and can be greater than the description of the situation of the pixel in even pixel row with reference to the area that odd number pixel rows is shared on display panels.
The display mode of the image to be displayed described in the embodiment of the present invention has two kinds: 2D display mode and 3D display mode.
According to the display mode of any one prior art determination image to be displayed, such as, can determine that this image to be displayed is 2D or 3D display mode according to mark entrained in image to be displayed in step 301.Other are determined to the method for the display mode of image to be displayed, owing to being prior art, do not repeat them here.
In step 302, when the display mode determining image to be displayed is 3D display mode, time schedule controller produces the scan clock signal needed for 3D display, scans the every pixel column in display panels.The control that time schedule controller is realized by unit such as control gate driver, source electrode drivers, concrete, as shown in Figure 5, Fig. 5 comprises: time schedule controller (TimingCongtroller, TCON), Power Management Unit, Gamma treatment circuit, gate drivers, source electrode driver and the display panels driven by described gate drivers, source electrode driver.Wherein, time schedule controller is except comprising conventional data receiver, conversion, colourity process, overvoltage drive process, scanning sequence control, beyond data output function, also comprise image processing circuit and field sync signal STV, scan clock signal CKV, enable signal OE treatment circuit.
When being described in 3D display mode and 2D display mode below respectively, time schedule controller controls the clock signal produced.
As shown in Figure 6, when 3D display mode, time schedule controller, by the timing control signal shown in the output map such as gate drivers, source electrode driver 6, realizes the display of 3D rendering.Time schedule controller is produced by STV treatment circuit and starts the signal showing image, Ga1 to Gan scan clock signal is produced according to DISPLAY ORDER by gate drivers, scanning odd number pixel rows, wherein Gan represents the scan clock signal that the odd number pixel rows to n-th line inputs.Meanwhile, source electrode driver is to voltage signal corresponding to the pixel shown at this row by input in the odd number pixel rows that scans and image to be displayed.
In step 303, after having scanned last column odd number pixel rows by gate drivers, time schedule controller sends sweep signal to every row even pixel row by gate drivers simultaneously, and in all even pixel row simultaneously opening time region, applied the voltage signal preset by source drive to all even pixel row.Concrete, time schedule controller produces Gb1 to Gbn scan clock signal by gate drivers simultaneously, scan all even pixel row in display panels simultaneously, and by source electrode driver to being inputted default voltage signal by the even pixel row that scans, wherein Gbn represents the scan clock signal that the even pixel row to n-th line inputs.Preferably, the voltage signal preset is the voltage signal that black image is corresponding.
In embodiments of the present invention, time schedule controller first scans odd number pixel rows by gate drivers, after all odd pixel line scannings, scan all even pixel row more simultaneously.Provide a kind of time diagram generating interlacing odd pixel column below.
As shown in Figure 7, under 3D display mode, the clock signal schematic diagram of interlacing odd pixel column.
A scan clock signal CKV comprises two pulse signals within a pixel column transmission cycle, after field sync signal STV produces impulse level, image processing circuit starts to accept image to be displayed data, time schedule controller maintains high level by making the enable signal OE of gate drivers when second pulse signal of CKV, counteracts second pulse signal in CKV.Like this, gate drivers is when first pulse signal of CKV, produce high level pulse signal, drive the gate turn-on of the thin film transistor (TFT) of corresponding a line odd-numbered line, the voltage signal of this odd number pixel rows is inputted, simultaneously because second pulse signal of CKV is cancelled, now gate drivers is when second pulse signal of CKV, drives the grid of the thin film transistor (TFT) of corresponding a line odd-numbered line to close.
Same, if desired scan even pixel row, time schedule controller maintains high level by making the enable signal OE of gate drivers when first pulse signal of CKV, counteracts first pulse signal in CKV, just only can scan even pixel row.
During 3D display mode, in display panels, alternately apply voltage signal corresponding to left-eye image and voltage signal corresponding to eye image by source electrode driver.Concrete, in the capable odd number pixel rows of M, apply voltage signal corresponding to left-eye image by source electrode driver, in the capable odd number pixel rows of M+1, apply voltage signal corresponding to eye image, wherein M is positive integer.Such as, in the 1st row odd number pixel rows, apply voltage signal corresponding to left-eye image, in 2 row odd number pixel rows, apply voltage signal corresponding to eye image, other row the like.Such as in the 2nd row odd number pixel rows, apply voltage signal corresponding to left-eye image again, in 3 row odd number pixel rows, apply voltage signal corresponding to eye image, other row the like.
As shown in Figure 8, when image to be shown is 2D display mode, time schedule controller, by the timing control signal shown in the output map such as gate drivers, source electrode driver 8, realizes the display of 2D image.Time schedule controller is produced by STV treatment circuit and starts the signal showing image, produces Ga1 to Gan scan clock signal by gate drivers according to DISPLAY ORDER, scanning odd number pixel rows.Meanwhile, time schedule controller produces Gb1 to Gbn scan clock signal by gate drivers simultaneously, and while scanning a line odd number pixel rows, scan the even pixel row adjacent with this odd number pixel rows, namely Ga1 and Gb1 sequential is identical, Gan and Gbn sequential is identical.Time schedule controller inputs identical voltage signal by source electrode driver in the odd number pixel rows be synchronously scanned and even pixel row, and when the odd number pixel rows be therefore synchronously scanned and even pixel row show in display panels, display is same content.The area shared on display panels due to the pixel in the area ratio even pixel row that the pixel in odd number pixel rows is shared on display panels is large, therefore adjacent with the pixel of even pixel row in odd number pixel rows and the pixel inputting identical voltage signal can regard an entirety as when showing, can't impact the image of display, even pixel row can also carry out luminance compensation to odd number pixel rows simultaneously.
As shown in Figure 9, under 2D display mode, dual scan time diagram.Time schedule controller generates two scan clock signals within the data line input cycle, the pulse width controlling previous scan clock signal in two scan clock signals is less than the pulse width of a rear scan clock signal, the front and back of output enable signal OE, along covering edge before and after previous scan clock signal, make two scan clock signal synchronism output.Concrete, as shown in Figure 10, in a number of lines of pixels according in input cycle (7.4 μ s), the pulse width of previous scan clock signal is the high level of 1 μ s, after the low level of interval 1 μ s, a rear scan clock signal pulse width is the high level of 2.7 μ s.Certainly, the high level width of two scan clock signals also can be identical.
For said method flow process, the embodiment of the present invention also provides a kind of image display device, and the particular content of this device can be implemented with reference to said method, does not repeat them here.
As shown in figure 11, the embodiment of the present invention provides a kind of image display device, and this device comprises:
Determining unit 1101, for determining the display mode of image to be displayed;
Display unit 1102, during for determining that described display mode is 3D display mode, the odd number pixel rows on display panels is then scanned successively by gate drivers, each scanning a line odd number pixel rows, and apply the voltage signal corresponding with the image that described odd number pixel rows shows by source electrode driver to by the odd number pixel rows that scans; After scanning last column odd number pixel rows by described gate drivers, applied the voltage signal preset by the even pixel row that source electrode driver is all on described display panels simultaneously.
Preferably, described display unit 1102 also for:
When determining that described display mode is 2D display mode, then scan adjacent a line odd number pixel rows and a line even number line picture on display panels by described gate drivers at every turn simultaneously, and apply the voltage signal corresponding with the image shown in described odd number pixel rows by described source electrode driver to by the odd number pixel rows that scans, and applied the voltage signal identical with described odd number pixel rows to the while of odd number pixel rows by the even pixel row that scans.
Preferably, described display unit 1102 specifically for:
In the capable odd number pixel rows of M, apply voltage signal corresponding to left-eye image by described source electrode driver, in the capable odd number pixel rows of M+1, apply voltage signal corresponding to eye image, wherein M is positive integer.
Preferably, described display unit 1102 also for:
Sweep signal is sent to every row even pixel row by gate drivers simultaneously, and in all even pixel row simultaneously opening time region, applied the voltage signal preset by source drive to all even pixel row.
Preferably, described default voltage signal is the voltage signal that black image is corresponding.
Preferably, the area of the pixel in described odd number pixel rows shared by described display panels is greater than the area of pixel shared by described display panels in described even pixel row.
According to the method that the invention process provides, before display image, determine the display mode of image to be displayed, when 3D display mode, time schedule controller scans the odd number pixel rows on display panels successively by gate drivers, and by source electrode driver to being applied corresponding voltage signal in the odd number pixel rows that scans; After time schedule controller scans last column odd number pixel rows by described gate drivers, scan all even pixel row simultaneously and applied the voltage signal preset by source electrode driver to all even pixel row simultaneously.By the method that the embodiment of the present invention provides, 3D rendering is when showing, due to while dual numbers pixel columns in the voltage signal preset that applies, achieve the short time to many pixel column applying voltage, decrease the refresh time of the even pixel row not showing 3D rendering, add the refresh time of the odd number pixel rows of display 3D rendering, and improve the duration of charging of odd number pixel rows.Simultaneously when showing 2D image, by voltage identical in the odd number pixel rows that applies in even pixel row to be adjacent, making odd number pixel rows adjacent in display panel identical with the content shown in even pixel row, realizing the luminance compensation to 2D image.
The present invention describes with reference to according to the process flow diagram of the method for the embodiment of the present invention, equipment (system) and computer program and/or block scheme.Should understand can by the combination of the flow process in each flow process in computer program instructions realization flow figure and/or block scheme and/or square frame and process flow diagram and/or block scheme and/or square frame.These computer program instructions can being provided to the processor of multi-purpose computer, special purpose computer, Embedded Processor or other programmable data processing device to produce a machine, making the instruction performed by the processor of computing machine or other programmable data processing device produce device for realizing the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
These computer program instructions also can be stored in can in the computer-readable memory that works in a specific way of vectoring computer or other programmable data processing device, the instruction making to be stored in this computer-readable memory produces the manufacture comprising command device, and this command device realizes the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
These computer program instructions also can be loaded in computing machine or other programmable data processing device, make on computing machine or other programmable devices, to perform sequence of operations step to produce computer implemented process, thus the instruction performed on computing machine or other programmable devices is provided for the step realizing the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
Although describe the preferred embodiments of the present invention, those skilled in the art once obtain the basic creative concept of cicada, then can make other change and amendment to these embodiments.So claims are intended to be interpreted as comprising preferred embodiment and falling into all changes and the amendment of the scope of the invention.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.

Claims (12)

1. a method for displaying image, is characterized in that, the method comprises:
Determine the display mode of image to be displayed;
When determining that described display mode is 3D display mode, then the odd number pixel rows on display panels opened successively by time schedule controller by gate drivers, wherein, during each unlatching a line odd number pixel rows, and apply the voltage signal corresponding with the image that described unlatching a line odd number pixel rows shows by source electrode driver;
After described time schedule controller scans last column odd number pixel rows by described gate drivers, scan all even pixel row and applied the voltage signal preset by the even pixel row that source electrode driver is all on described display panels simultaneously.
2. the method for claim 1, is characterized in that, the method also comprises:
When determining that described display mode is 2D display mode, then described time schedule controller scans a line odd number pixel rows adjacent on display panels and a line even pixel row by described gate drivers simultaneously, and by described source electrode driver to being applied the voltage signal corresponding with showing image by a line odd number pixel rows of scanning and a line even pixel row simultaneously.
3. the method for claim 1, is characterized in that, the described voltage signal corresponding with the image that described unlatching a line odd number pixel rows shows by source electrode driver applying, comprising:
In the capable odd number pixel rows of M, apply voltage signal corresponding to left-eye image by described source electrode driver, in the capable odd number pixel rows of M+1, apply voltage signal corresponding to eye image, wherein M is positive integer.
4. the method for claim 1, is characterized in that, the voltage signal that all even pixel row of described scanning simultaneously being applied by the even pixel row that source electrode driver is all on described display panels are preset, and comprising:
Described time schedule controller sends sweep signal by gate drivers to every row even pixel row, and in all even pixel row simultaneously opening time region, applied the voltage signal preset by source drive to all even pixel row.
5. the method as described in as arbitrary in Claims 1-4, it is characterized in that, described default voltage signal is the voltage signal that black image is corresponding.
6. the method as described in as arbitrary in Claims 1-4, is characterized in that, the area shared on described display panels of the pixel in described odd number pixel rows is greater than pixel in described even pixel row area shared on described display panels.
7. an image display device, is characterized in that, this device comprises:
Determining unit, for determining the display mode of image to be displayed;
Display unit, during for determining that described display mode is 3D display mode, the odd number pixel rows on display panels is then opened successively by gate drivers, wherein, during each scanning a line odd number pixel rows, and apply the voltage signal corresponding with the image that described odd number pixel rows shows by source electrode driver; After scanning last column odd number pixel rows by described gate drivers, applied the voltage signal preset by the even pixel row that source electrode driver is all on described display panels simultaneously.
8. device as claimed in claim 7, is characterized in that, described display unit also for:
When determining that described display mode is 2D display mode, then scan a line odd number pixel rows adjacent on display panels and a line even number line picture by described gate drivers simultaneously, and apply the voltage signal corresponding with showing image by described source electrode driver to by a line odd number pixel rows of scanning and a line even pixel row simultaneously.
9. device as claimed in claim 7, is characterized in that, described display unit specifically for:
In the capable odd number pixel rows of M, apply voltage signal corresponding to left-eye image by described source electrode driver, in the capable odd number pixel rows of M+1, apply voltage signal corresponding to eye image, wherein M is positive integer.
10. device as claimed in claim 7, is characterized in that, described display unit also for:
By gate drivers, sweep signal is sent to every row even pixel row, and in all even pixel row simultaneously opening time region, applied the voltage signal preset by source drive to all even pixel row.
11. as arbitrary in claim 8 to 10 as described in device, it is characterized in that, described default voltage signal is the voltage signal that black image is corresponding.
12. as arbitrary in claim 8 to 10 as described in device, it is characterized in that, the area shared on described display panels of the pixel in described odd number pixel rows is greater than pixel in described even pixel row area shared on described display panels.
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