CN105552176A - Preparation method for epitaxial structure provided with electron blocking layer and hole adjustment layer - Google Patents

Preparation method for epitaxial structure provided with electron blocking layer and hole adjustment layer Download PDF

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Publication number
CN105552176A
CN105552176A CN201510978815.1A CN201510978815A CN105552176A CN 105552176 A CN105552176 A CN 105552176A CN 201510978815 A CN201510978815 A CN 201510978815A CN 105552176 A CN105552176 A CN 105552176A
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layer
epitaxial structure
preparation
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hole
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CN105552176B (en
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张佳胜
蔡吉明
黄文宾
蓝永凌
林兓兓
张家宏
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Anhui Sanan Optoelectronics Co Ltd
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Anhui Sanan Optoelectronics Co Ltd
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Priority to PCT/CN2016/097872 priority patent/WO2017107552A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure

Abstract

A preparation method for an epitaxial structure provided with an electron blocking layer and a hole adjustment layer is disclosed. The preparation method comprises the following steps of providing a substrate; depositing a buffer layer on the substrate; depositing an N type doped semiconductor layer on the buffer layer; depositing a light-emitting layer on the N type doped semiconductor layer; depositing a P type doped hole injection layer having the material of Alx0Iny0Ga1-x0-y0N on the light-emitting layer; depositing a multilayer structure on the hole injection layer, wherein the multilayer structure is formed by the electron blocking layer having the material of Alx1Iny1Ga1-x1-y1N and the hole adjustment layer having the material of Alx2Iny2Ga1-x2-y2N in an alterative stacking manner; y0 is greater than x0, and x0 is greater than 0; x1 is greater than y1, and y1 is greater than 0; x2 is greater than or equal to y2, and y2 is greater than 0; x1 is greater than x2, and x2 is greater than or equal to x0; and y0 is greater than y2, and y2 is greater than y1; and depositing a P type doped semiconductor layer on the multilayer structure to form the epitaxial structure.

Description

A kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer
Technical field
The invention belongs to technical field of semiconductor preparation, particularly a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer.
Background technology
Light-emitting diode (LED, LightEmittingDiode) is a kind of extension solid state light emitters, and by loading forward voltage at device two ends, electronics and hole produce a large amount of photon in active area compound, and electric energy conversion is luminous energy.And gallium nitride-based epitaxial is the third generation epitaxial material after Si and GaAs, development in recent years is comparatively rapid.Such as, but be equally also faced with a lot of problem, when LED is in running order, a large amount of electrons overflows from active layer, makes luminous efficiency greatly reduce.The normal solution adopted is after luminescent layer, grow one deck P type aluminium gallium nitride alloy electronic barrier layer at present, in order to reduce the spilling of electronics, significantly can also reduce the dislocation density of P-type layer in epitaxial wafer simultaneously, weaken the self-compensation mechanism of magnesium and suppression and reduce the generation of non-radiative recombination center, improving the injection efficiency in hole.
Current most of P type aluminium gallium nitride alloy is al composition is invariable single layer structure, along with the increase of magnesium, hole concentration monotone increasing in aluminium gallium nitride alloy, when hole concentration reach maximum after, along with the continuation of magnesium increases, the self-compensation mechanism of magnesium makes hole concentration decline on the contrary, and material degradation cracks.Therefore, the design of P-type electron barrier layer structure has very important impact to the internal quantum efficiency of gallium nitride based LED and luminous efficiency.
Summary of the invention
Technical problem solved by the invention is to provide a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer, to solve problem mentioned in above-mentioned background technology.
The concrete technical scheme of preparation method provided by the invention is: a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer, said method comprising the steps of:
One substrate is provided;
Buffer layer is in described substrate;
Deposited n-type doping semiconductor layer is on described resilient coating;
Depositing light emitting layer is on described N-type doping semiconductor layer;
Deposition materials is Al x0in y0ga 1-x0-y0the P type doping hole injection layer of N is on described luminescent layer;
Deposition materials is Al x1in y1ga 1-x1-y1the electronic barrier layer of N and material are Al x2in y2ga 1-x2-y2the hole adjustment layer of N replaces the sandwich construction of stacking composition on described hole injection layer, wherein, and y 0> x 0> 0, x 1> y 1> 0, x 2>=y 2> 0, x 1> x 2>=x 0, y 0> y 2> y 1;
Deposition P type doping semiconductor layer, on described sandwich construction, forms epitaxial structure.
Preferably, deposit the temperature of temperature lower than reative cell during deposition described sandwich construction of reative cell during described P type doping hole injection layer, its temperature gap is 50 ~ 100 DEG C.
Preferably, in deposit multilayer configuration process, first stop passing into p type impurity source, deposition is positioned at the involuntary P type doping sub-portfolio layer of sandwich construction bottom, utilizes the p type impurity in hole injection layer forming process to enter in this sub-portfolio layer by the diffusion under late effect and subsequent high temperature condition; And then passing into p type impurity source, deposition forms the intentional P type doping sub-portfolio layer being positioned at sandwich construction top.
Preferably, the number of described involuntary P type doping sub-portfolio layer is more than or equal to the number of described intentional P type doping sub-portfolio layer.
Preferably, number≤3 of described intentional P type doping sub-portfolio layer.
Preferably, the p type impurity concentration of described hole injection layer is greater than the p type impurity concentration of sandwich construction.
Preferably, p type impurity mean concentration>=1 × 10 of described hole injection layer 18.
Preferably, p type impurity mean concentration>=1 × 10 of described sandwich construction 16.
Preferably, in described sandwich construction, the Al component of at least 2 sub-combination layers is different.
Preferably, number >=2 of described sandwich construction neutron combination layer.
Preferably, the gross thickness of sub-portfolio layer described in each is 10 dust ~ 200 dusts.
Preferably, the thickness of described hole injection layer is 50 dust ~ 1000 dusts.
Preferably, the variation pattern of the Al component of described hole injection layer, electronic barrier layer and hole adjustment layer is constant doping, parabola shaped, increasing or decreasing changes and adulterate.
Adopt above-mentioned preparation method, a kind of epitaxial structure with electronic blocking and hole adjustment layer of preparation, comprise substrate, resilient coating, N-type doping semiconductor layer, luminescent layer and P type doping semiconductor layer from bottom to up successively, wherein, also comprising material between described luminescent layer and P type doping semiconductor layer is Al x0in y0ga 1-x0-y0the P type doping hole injection layer of N and the sandwich construction of the stacking formation of a plurality of sub-portfolio layers; Each sub-portfolio layer described is Al by material x1in y1ga 1-x1-y1the electronic barrier layer of N and material are Al x2in y2ga 1-x2-y2the hole adjustment layer composition of N, wherein, y 0> x 0> 0, x 1> y 1> 0, x 2>=y 2> 0, x 1> x 2>=x 0, y 0> y 2> y 1.
Preferably, the sub-portfolio layer being positioned at bottom in described sandwich construction is involuntary P type doped layer, superposed sub-portfolio layer is intentional P type doped layer, and the sub-portfolio layer number of described involuntary P type doping is more than or equal to the sub-portfolio layer number of described intentional P type doping.
Preferably, the p type impurity concentration of described hole injection layer is greater than the p type impurity concentration of sandwich construction.
Preferably, the p type impurity in described hole injection layer forming process is entered in involuntary P type doping sub-portfolio layer by the diffusion under late effect and subsequent high temperature condition.
Preferably, sub-portfolio layer number≤3 of described intentional P type doping.
Preferably, in described sandwich construction, the Al component of at least 2 sub-combination layers is different.
Preferably, number >=2 of described sandwich construction neutron combination layer.
Preferably, the gross thickness of sub-portfolio layer described in each is 10 dust ~ 200 dusts.
Preferably, the thickness of described hole injection layer is 50 dust ~ 1000 dusts.
the present invention at least has following beneficial effect:
The present invention first to be grown up one deck P type hole injection layer after being terminated by the deposition of luminescent layer in epitaxial structure, enough holes are provided with high-concentration dopant, and close on luminescent layer, can effective improving luminous efficiency, simultaneously for cushioning the crystal lattice difference of luminescent layer and subsequent multi-layer structure and realizing low energy rank characteristic, this hole injection layer adopts the material of low Al component high In ingredient to form.
Grow the sandwich construction of the electronic barrier layer of high Al contents and the alternately laminated composition of hole adjustment layer of low Al component subsequently, the quality of materials utilizing high Al contents and the alternatively distributed structure of low Al component to avoid high Al contents to cause reduces phenomenon, and what utilize the characteristic on In component low energy rank and Al component to arrange in pairs or groups modulation sandwich construction can change to improve sandwich construction entirety electronic blocking and the effect that adjusts of hole further in rank simultaneously.
In addition, do not pass into p type impurity source when depositing and closing on the sub-portfolio layer of the sandwich construction of hole injection layer, but enter in this sub-portfolio layer by the diffusion under the late effect of p type impurity and subsequent high temperature condition; Then mix p type impurity closing in the sub-portfolio layer of P type doping semiconductor layer of continued growth, under guarantee does not increase the prerequisite of voltage characteristic, promote the crystal mass of sandwich construction.
Simultaneously, described hole injection layer and sandwich construction are aluminum indium gallium nitride material layer, the constituent content of aluminium and indium in adjustment sandwich construction, while forming good electronic blocking performance, reduce its resistance, and improve the antistatic property of chip in conjunction with the source, effective hole that aforesaid hole injection layer provides.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, and forms a part for specification, together with embodiments of the present invention for explaining the present invention, is not construed as limiting the invention.In addition, accompanying drawing data describe summary, is not draw in proportion.
Fig. 1 is preparation method's flow chart of the emitting semiconductor epitaxial structure of the embodiment of the present invention one.
Fig. 2 is the emitting semiconductor epitaxial structure schematic diagram of the embodiment of the present invention one.
Fig. 3 is the sandwich construction schematic diagram one of the embodiment of the present invention one.
Fig. 4 is the sandwich construction schematic diagram two of the embodiment of the present invention one.
Fig. 5 is the emitting semiconductor epitaxial structure schematic diagram of the embodiment of the present invention two.
Fig. 6 is the sandwich construction schematic diagram of the embodiment of the present invention two.
In figure: 10. substrate; 20. resilient coatings; 30.N type doping semiconductor layer; 40. luminescent layers; 50.P type doping hole injection layer; 60. sandwich constructions; 61,61 ' 62,62 '. sub-portfolio layer; 611,611 ', 621,621 '. electronic barrier layer; 612,612 ', 622,622 '. hole adjustment layer; 70.P type doping semiconductor layer.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in detail.
embodiment 1
Referring to accompanying drawing 1 ~ 3, the present invention proposes a kind of preparation method with the epitaxial structure of current blocking and hole adjustment layer, and it comprises the following steps:
S01, provide a substrate 10, substrate 10 selects the one in the materials such as sapphire, carborundum, silicon, gallium nitride;
S02, buffer layer 20 are on substrate 10, and resilient coating 20 is undoped nitride layer or low-doped nitride layer;
S03, deposited n-type doping semiconductor layer 30 are on resilient coating 20;
S04, depositing light emitting layer 40 are on n type semiconductor layer 30;
S05, adjustment reaction chamber temperature to 600 ~ 1000 DEG C, pressure is 50 ~ 500torr, and deposition materials is Al x0in y0ga 1-x0-y0the P type of N adulterates hole injection layer 50 on luminescent layer 40, y 0> x 0the thickness of > 0, P type doping hole injection layer 50 is 50 dust ~ 1000 dusts, its p type impurity concentration>=1 × 10 18, utilize this high concentration P type to adulterate and sufficient hole be provided, improve the combined efficiency in luminescent layer 40; And this impurity higher than subsequent multi-layer structure 60 doping content is also for the migration of impurity in subsequent deposited layers provides prerequisite.Simultaneously this layer of depositing temperature a little more than or be equal to luminescent layer 40 temperature, thus avoid luminescent layer 40 to be destroyed because of hot environment;
S06, maintenance pressure are constant, and regulate reaction chamber temperature, make temperature higher than the depositing temperature 50 ~ 100 DEG C of hole injection layer 50, deposition materials is Al x1in y1ga 1-x1-y1the electronic barrier layer of N and material are Al x2in y2ga 1-x2-y2the hole adjustment layer of N replaces the sandwich construction 60 of stacking composition on hole injection layer 50; Compared with the depositing temperature of hole injection layer 50, the depositing temperature of this sandwich construction 60 is higher, utilizes this hot conditions to promote crystal mass, reduces defect, improve the performance of emitting semiconductor, wherein x 1> y 1> 0, x 2>=y 2> 0, x 1> x 2>=x 0, y 0> y 2> y 1;
S07, deposition P type doping semiconductor layer 70 form epitaxial structure on sandwich construction 60.
In the present invention, in described sandwich construction 60, the Al component of at least 2 sub-combination layers is different, and each sub-portfolio layer is Al by a pair material x1in y1ga 1-x1-y1the electronic barrier layer of N and material are Al x2in y2ga 1-x2-y2the hole adjustment layer composition of N, its thickness is 10 dust ~ 200 dusts, and in electronic barrier layer and hole adjustment layer, Al component is constant doping, parabola shaped, increasing or decreasing change doping;
In the present embodiment, the detailed process of deposit multilayer structure 60 is: after hole injection layer 50 deposition of P type doping terminates, stop passing into p type impurity source, grown the sub-portfolio layer 61 of involuntary P type doping by the diffusion under late effect and subsequent high temperature condition, it is by Al x1in y1ga 1-x1-y1the electronic barrier layer 611 of N and Al x2in y2ga 1-x2-y2the hole adjustment layer 612 of N forms, and continues deposition sub-portfolio layer 62, and it is also Al by material x1in y1ga 1-x1-y1the electronic barrier layer 621 of N and Al x2in y2ga 1-x2-y2the hole adjustment layer 622 of N forms, wherein x 1> y 1> 0, x 2>=y 2> 0, herein preferred x 1=0.05 ~ 0.25, y 1=0.01 ~ 0.1, x 2=0.05 ~ 0.25, y 2=0.01 ~ 0.1; Described combination layer 61 and 62 is the different sub-portfolio layer of al composition, and the Al component of preferred sub-portfolio layer 61 is higher than sub-portfolio layer 62, and compared to hole injection layer, its aluminium and indium component meet relational expression: x 1> x 2>=x 0, y 0> y 2> y 1.After pass into p type impurity source, deposition of aluminum component and indium component respectively with sub-portfolio layer 61 and the identical or different sub-portfolio layer of sub-portfolio layer 62 61 ' and 62 ', it is Al by material x1in y1ga 1-x1-y1the electronic barrier layer 611 ' of N, 621 ' and material be Al x2in y2ga 1-x2-y2the hole adjustment layer 612 ', 622 ' of N forms.
Although the sub-portfolio layer 61 and 62 being close in hole injection layer 50 does not pass into impurity source in growth course, but its depositing temperature is higher, and p type impurity source also has diffusion under the high temperature conditions, p type impurity source also has memory and delay effect simultaneously, therefore in the involuntary P type doped layer utilizing these two kinds of characteristics that the p type impurity source postponing to leave in the high concentration p type impurity source of hole injection layer 50 and chamber can be made to enter to close on, under the prerequisite not affecting crystal mass, also make resistance less, reduce the use voltage of the final semiconductor element formed.And the sub-portfolio layer 61 ' and 62 ' being close in P type doping semiconductor layer 70 is because of doped with p type impurity source, thus make p type impurity concentration average>=1 × 10 in the sandwich construction formed 16, reduce the use voltage of semiconductor element further.
As the variation of this method, the sandwich construction of deposition has 2 or 3 sub-combination layers, is close in 1 of hole adjustment layer or 2 sub-combination layers are involuntary P type doped layer, and the sub-portfolio layer being close in P type doping semiconductor layer is then intentional P type doped layer; For optimizing sandwich construction for current blocking effect and antistatic property, the sub-portfolio layer number of preferred involuntary P type doping is more than or equal to the sub-portfolio layer number of described intentional P type doping
Simultaneously, described hole injection layer 50 and sandwich construction 60 are aluminum indium gallium nitride material layer, when al composition is higher, its electronic blocking effect is better, but its stress also thereupon increase cause crystal mass deterioration, therefore the present embodiment adopts the method for al composition change and the structure of multiple-level stack to alleviate this ply stress, coordinate the resistance value of this sandwich construction 60 of mode tuning of p type impurity source undoped/doping simultaneously, and then obtain the P type structure sheaf with good electronic blocking performance and low resistance characteristic, recycle high concentration hole injection layer 50 provides effective hole to inject source simultaneously, improve the antistatic property of chip.
Referring to accompanying drawing 2 and 3, utilize above-mentioned preparation method, the present invention prepares a kind of epitaxial structure with current blocking and hole adjustment layer, and it comprises substrate 10, resilient coating 20, N-type doping semiconductor layer 30, luminescent layer 40, P type doping semiconductor layer 70; Wherein, also comprising a material between luminescent layer 40 and P type doping semiconductor layer 70 is Al x0in y0ga 1-x0-y0n, thickness is the P type doping hole injection layer 50 of 50 dust ~ 1000 dusts, the sandwich construction 60 of a plurality of sub-portfolio layer (61,61 ', 62 and 62 ') stacking formation; Each sub-portfolio layer is Al by material x1in y1ga 1-x1-y1electronic barrier layer (611,611 ', 621,621 ') and the material of N are Al x2in y2ga 1-x2-y2hole adjustment layer (612,612 ', 622, the 622 ') composition of N; Wherein, y 0> x 0> 0, x 1> y 1> 0, x 2>=y 2> 0, x 1> x 2>=x 0, y 0> y 2> y 1.Because the Main Function of P type doping hole injection layer 50 is to provide enough hole concentrations to increase electron-hole recombinations efficiency, therefore luminescent layer is entered in order to make hole move preferably, therefore make the Al component of this layer on the low side, and for avoiding temperature high deposition to destroy luminescent layer quality, then adopt comparatively low deposition temperature, thus make the In doping component of this layer higher, namely meet y 0> x 0the relation of > 0.And in order to make the electronic barrier layer in sandwich construction have better electronic blocking effect, the Al component of this layer preferably higher, i.e. x 1> y 1> 0; Simultaneously for the quality of materials alleviated caused by higher Al component reduces phenomenon, therefore the hole adjustment layer deposited subsequently adopts lower Al component, and be the doping ratio optimizing Al and In further, obtain higher hole corrective action, then the In component of this hole adjustment layer is close or slightly high with this layer of Al component, i.e. x 2>=y 2> 0.Meanwhile, for promoting P type doping hole injection layer 50 and the respective function of sandwich construction 60 further, the present invention limits the concentration of this two-layer middle Al component and In component further, i.e. x 1> x 2>=x 0, y 0> y 2> y 1.
The sub-portfolio layer (61,61 ' and 62,62 ') that 2 Al components are different is at least comprised in sandwich construction 60; Number >=2 of sandwich construction 60 neutron combination layer.The gross thickness of each sub-portfolio layer is 20 dust ~ 200 dusts.Wherein, the sub-portfolio layer 61 and 62 being close in the different al component of hole injection layer 50 is involuntary P type doped layer, and the sub-portfolio layer 61 ' and 62 ' being close in the different al component of P type doping semiconductor layer 70 is intentional P type doped layer, and sub-portfolio layer 61 and 61 ', 62 is identical with the Al component of 62 ', simultaneously preferably in each sub-portfolio layer, electronic barrier layer is identical with the Al component in the adjustment layer of hole, namely layer 611 and 612,611 ' and 612 ', 621 and 622,621 ' identical with the Al component of 622 '.
And as a variant embodiment of this structure, sub-portfolio layer 61 and 61 ', 62 and 62 ' is Al component different layers, and be constant doping or parabola shaped or increasing or decreasing change according to the order of 61,62,61 ', 62 ', its x 1and x 2excursion be: 0.01 ~ 0.25, simultaneously in order to obtain better effect, when regulating aluminum concentration change, the component of also adjustable indium, makes y 1and y 2excursion be 0.01 ~ 0.1.
Referring to accompanying drawing 4, as another variant embodiment of this structure, this sandwich construction 60 described has three sub-combination layers 61,61 ' and 62, and wherein, 61,61 ' is undoped layer, and 62 is P type doped layer; And Al component is different, and according to 61,61 ', 62, order also can according to constant doping or parabola shaped or increasing or decreasing change, its x 1and x 2excursion be: 0.01 ~ 0.25.
embodiment 2
Referring to accompanying drawing 5 and 6, when the difference of the present embodiment and embodiment 1 is deposit multilayer structure 60, close in the sandwich construction 60 that deposition is formed the involuntary P type doping of hole injection layer 50 sub-portfolio layer (61,62 ...) time, its number is greater than 3, deposition intentional P type doping sub-portfolio layer (61 ', 62 ' is continued subsequently on the sub-portfolio layer of this involuntary P type doping ...), after the sub-portfolio layer of this involuntary P type doping and P type adulterated sub-portfolio layer stack gradually and finally form sandwich construction 60.The intentional P type doping sub-portfolio number of layers of wherein said the sub-portfolio layer and upper deposition thereof that close on the involuntary P type doping of hole injection layer 50, according to the electrical property demand flexible of actual production, is not limited to the number of the present embodiment.And be optimize sandwich construction for current blocking effect and antistatic property, when sandwich construction neutron combination layer number is more, such as, when being greater than 8, the sub-portfolio number of layers of preferably doping is less than or equal to 3.
Should be understood that, above-mentioned specific embodiments is the preferred embodiments of the present invention, and scope of the present invention is not limited to this embodiment, all any changes done according to the present invention, all belongs within protection scope of the present invention.

Claims (13)

1. there is a preparation method for the epitaxial structure of electronic blocking and hole adjustment layer, it is characterized in that, said method comprising the steps of:
One substrate is provided;
Buffer layer is in described substrate;
Deposited n-type doping semiconductor layer is on described resilient coating;
Depositing light emitting layer is on described N-type doping semiconductor layer;
Deposition materials is Al x0in y0ga 1-x0-y0the P type doping hole injection layer of N is on described luminescent layer;
Deposition materials is Al x1in y1ga 1-x1-y1the electronic barrier layer of N and material are Al x2in y2ga 1-x2-y2the hole adjustment layer of N replaces the sandwich construction of stacking composition on described hole injection layer, wherein, and y 0>x 0>0, x 1>y 1>0, x 2>=y 2>0, x 1>x 2>=x 0, y 0>y 2>y 1;
Deposition P type doping semiconductor layer, on described sandwich construction, forms epitaxial structure.
2. a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 1, it is characterized in that: deposit described P type doping hole injection layer time reaction chamber temperature lower than deposition described sandwich construction time reaction chamber temperature, temperature gap is 50 ~ 100 DEG C.
3. a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 1, it is characterized in that: in deposit multilayer configuration process, first stop passing into p type impurity source, deposition is positioned at the involuntary P type doping sub-portfolio layer of sandwich construction bottom, utilizes the p type impurity in hole injection layer forming process to enter in this sub-portfolio layer by the diffusion under late effect and subsequent high temperature condition; And then passing into p type impurity source, deposition forms the intentional P type doping sub-portfolio layer being positioned at sandwich construction top.
4. a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 3, is characterized in that: the number of described involuntary P type doping sub-portfolio layer is more than or equal to the number of described intentional P type doping sub-portfolio layer.
5. a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 3, is characterized in that: number≤3 of described intentional P type doping sub-portfolio layer.
6. a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 1, is characterized in that: the p type impurity concentration of described hole injection layer is greater than the p type impurity concentration of sandwich construction.
7. a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 6, is characterized in that: p type impurity mean concentration>=1 × 10 of described hole injection layer 18.
8. a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 6, is characterized in that: p type impurity mean concentration>=1 × 10 of described sandwich construction 16.
9. a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 1, is characterized in that: in described sandwich construction, the Al component of at least 2 sub-combination layers is different.
10. a kind of preparation method with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 1, is characterized in that: number >=2 of described sandwich construction neutron combination layer.
11. a kind of preparation methods with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 1, is characterized in that: the gross thickness of sub-portfolio layer described in each is 10 dust ~ 200 dusts.
12. a kind of preparation methods with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 1, is characterized in that: the thickness of described hole injection layer is 50 dust ~ 1000 dusts.
13. a kind of preparation methods with the epitaxial structure of electronic blocking and hole adjustment layer according to claim 1, is characterized in that: the variation pattern of the Al component of described hole injection layer, electronic barrier layer and hole adjustment layer is constant doping, parabola shaped, increasing or decreasing changes and adulterates.
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