CN105551938B - A method of making NiGeSn material - Google Patents

A method of making NiGeSn material Download PDF

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Publication number
CN105551938B
CN105551938B CN201510977256.2A CN201510977256A CN105551938B CN 105551938 B CN105551938 B CN 105551938B CN 201510977256 A CN201510977256 A CN 201510977256A CN 105551938 B CN105551938 B CN 105551938B
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layer
metal
nigesn
layer surface
present
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CN105551938A (en
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平云霞
孟骁然
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Shanghai University of Engineering Science
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Shanghai University of Engineering Science
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02535Group 14 semiconducting materials including tin
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The invention discloses a kind of method for making NiGeSn material, the method is offer Ge first1‑xSnxLayer material is as initial substrate, then in Ge1‑xSnxLayer surface grows metal inserting layer, then grows Ni metal layer on metal inserting layer surface;Then short annealing processing is carried out:It after being warming up to 300~600 DEG C, heat preservation 20~120 seconds with 25~75 DEG C/sec of heating rate, was cooled to room temperature within 100~200 second time, metal inserting layer and unreacted W metal is finally removed using chemical corrosion method to get NiGeSn material is arrived.The method of the present invention has many advantages, such as simple process, is easy to industrializing implementation;NiGeSn material generated is continuous, uniform, smooth, can meet the application requirement as transistor device contact material, and is conducive to improve the electrical property of transistor device.

Description

A method of making NiGeSn material
Technical field
The present invention is to be related to a kind of method for making NiGeSn material, belongs to technical field of material.
Background technique
In recent years, and traditional silicon materials belong to the germanium tin alloy (GeSn) of column IV element, because of its unique attribute, by Researcher greatly pays close attention to.In transistor channel region, GeSn becomes high migration because it is with high carrier mobility The hot spot of rate MOSFET element research, such as:Hole mobility, germanium tin are improved by introducing large compressive strain in GeSn channel Quantum well devices present excellent electric property;In addition, GeSn is greater than germanium because of its lattice constant in source transistor drain region (Ge), pressure source of the GeSn as Ge channel transistor uniaxial compressive can be introduced, further to promote Ge channel crystal The carrier mobility of pipe.
Nickel germanium tin alloy (NiGeSn) is another the novel height developed on the basis of germanium tin alloy (GeSn) Mobility material is the transistor material of future ideality.Currently, property of the researcher of various countries to nickel germanium tin material, such as: Ni and Sn atom scattering nature, the electrical properties of NiGeSn etc. in GeSn alloy reaction conduct extensive research.
At present be usually that Ni metal film layer is directly grown on GeSn sample about the preparation of NiGeSn, then into Row annealing is to be made NiGeSn.But during preparing NiGeSn in this way, reacted in Ni with GeSn When, since Ni and Ge reaction speed is too fast, and the thermal stability of Sn atom is poor, it is not easy to form continuous NiGeSn film;This Outside, due to the diffusion of Sn, keep the NiGeSn film quality to be formed bad, largely affect NiGeSn film as source and drain The application of contact material.
Summary of the invention
In view of the above-mentioned problems existing in the prior art, the object of the present invention is to provide a kind of sides for making NiGeSn material Method meets it as transistor device contact material to generate continuous, uniform, smooth nickel germanium tin (NiGeSn) material Application requirement.
To achieve the above object, the present invention adopts the following technical scheme that:
A method of NiGeSn material is made, is offer Ge first1-xSnxLayer material as initial substrate, wherein: 0.01≤x≤0.12;Again in Ge1-xSnxLayer surface grows metal inserting layer;Then Ni metal is grown on metal inserting layer surface Layer;Then short annealing processing is carried out:300~600 DEG C are warming up to 25~75 DEG C/sec of heating rate, keeps the temperature 20~120 seconds Afterwards, it was cooled to room temperature within 100~200 second time, Ni metal is made to pass through metal inserting layer and Ge1-xSnxLayer reacts generation NiGe1-xSnxLayer, wherein:0.01≤x≤0.12;Finally using chemical corrosion method removal metal inserting layer and unreacted metal Ni to get arrive NiGeSn material.
Preferably, the Ge1-xSnxLayer material is to use molecular beam epitaxy (i.e.:MBE method) preparation Ge lining The Ge at bottom1-xSnxLayer material.
As further preferred scheme, Ge that molecular beam epitaxy is prepared1-xSnxLayer material passes through surface clean (example As RCA clean) processing after be used as initial substrate.
Preferably, the metal inserting layer is grown using physical vaporous deposition (PVD).
As further preferred scheme, the metal inserting layer is grown using magnetron sputtering method.
Preferably, the metal inserting layer with a thickness of 1~10nm.
As further preferred scheme, above-mentioned metal inserting layer selects titanium (Ti) or aluminum metal (Al).
Preferably, the Ni metal layer with a thickness of 5~100nm.
As further preferred scheme, the Ni metal layer is using magnetron sputtering technique or electron beam evaporation process in metal Insertion layer surface is grown.
Preferably, short annealing processing is to carry out in a vacuum or inert atmosphere.
Preferably, the chemical attack uses the hydrochloric acid solution of 5~15wt%.
The present invention passes through in Ge1-xSnxLayer surface grows metal inserting layer, then grows Ni on the surface of metal inserting layer Metal layer can inhibit Ni and Ge due to the presence of metal inserting layer1-xSnxReaction rate makes Ni and Ge1-xSnxReaction With the progress of more slow speed, hence for Ge1-xSnxStrain play the role of certain holding, ensure that generated The flatness and continuity of NiGeSn material.The present invention makes specific temperature ensure that Ni in combination with specific annealing process With Ge1-xSnxThermal activation energy needed for alloying reaction.
Compared with prior art, the present invention has the advantages that:
1) the method for the present invention simple process is easy to industrializing implementation;
2) NiGeSn material generated is continuous, uniform, smooth, can meet the application as transistor device contact material It is required that and be conducive to improve transistor device electrical property.
Detailed description of the invention
Fig. 1 is the method for the present invention implementation process diagram;
Fig. 2 is the AFM test chart of NiGeSn material prepared by embodiment;
Fig. 3 is the AFM test chart of NiGeSn material prepared by comparative example.
Specific embodiment
Combined with specific embodiments below and attached drawing, the present invention is further explained.
Embodiment
As shown in Figure 1:The Ge that will be prepared by MBE method1-xSnxLayer material passes through diluted hydrofluoric acid (HF:H2O=1:50, volume Than) and the surface clean of deionized water after be used as initial substrate, wherein 0.01≤x≤0.12;Again in Ge1-xSnxLayer surface is adopted With physical vaporous deposition (such as:Magnetron sputtering method) growth thickness be 3nm Al metal inserting layer;Then it is inserted into Al metal Layer uses magnetron sputtering technique or electron beam evaporation process growth thickness for the Ni metal layer of 10nm;Then it carries out at short annealing Reason:After being warming up to 500 DEG C, heat preservation 30 seconds with 40 DEG C/sec of heating rate, it was cooled to room temperature within 120 second time, annealing atmosphere For nitrogen, Ni metal is made to pass through metal inserting layer and Ge1-xSnxLayer, which reacts, generates NiGe1-xSnxLayer, wherein:0.01≤x≤ 0.12;Finally using the hydrochloric acid solution removal metal inserting layer of 10wt% and unreacted W metal to get to positioned at Ge1-xSnx The NiGeSn material of layer surface.
Fig. 2 is the AFM test chart of the NiGeSn material of the present embodiment, as seen from Figure 2:Company is generated using the method for the present invention Continuous, uniform, smooth NiGeSn material layer, and the roughness (Rq) of gained NiGeSn material only has 2.22nm, this also anticipates simultaneously Taste the NiGeSn material of the present embodiment thermal stability it is higher.
In addition, when due to using metal Ti as insert layer metal, the surface condition and sheet of obtained NiGeSn material NiGeSn material proximate obtained by embodiment is just no longer carefully chatted one by one in present specification.
Comparative example
The Ge that will be prepared by MBE method1-xSnxLayer material passes through diluted hydrofluoric acid (HF:H2O=1:50, volume ratio) and go from Initial substrate is used as after the surface clean of sub- water, wherein:0.01≤x≤0.12;Then directly in Ge1-xSnxLayer surface uses magnetic Sputtering technology or electron beam evaporation process growth thickness are controlled as the Ni metal layer of 10nm;Then short annealing processing is carried out:With 40 DEG C/sec heating rate be warming up to 400 DEG C, after heat preservation 30 seconds, be cooled to room temperature within 120 second time, annealing atmosphere is nitrogen; Unreacted W metal is finally removed using the hydrochloric acid solution of 10wt%, obtains NiGeSn material.
Fig. 3 is the AFM test chart of the NiGeSn material of this comparative example, as seen from Figure 3:It is generated using comparative example method The rough surface of NiGeSn material layer, agglomerates at out-of-flatness, and the roughness (Rq) of resulting materials is up to 17nm, this is simultaneously Also imply that the thermal stability of the NiGeSn material of this comparative example is lower.
It to sum up tests visible:The present invention passes through in Ge1-xSnxLayer surface first deposited metal insertion before depositing Ni metal layer Layer, in combination with specific annealing process, improve the flatness of the surface film of NiGeSn material, produce it is continuous, uniform, Smooth NiGeSn material layer, while improving the temperature that NiGeSn reunites, hence it is evident that the thermal stability for improving material makes Obtained NiGeSn material can meet the application requirement as transistor device contact material, and be conducive to improve transistors The electrical property of part has conspicuousness progress and industrial application value.
It is it is necessary to described herein finally, the foregoing is merely the preferable specific embodiment of the present invention, but the present invention Protection scope be not limited thereto, anyone skilled in the art in the technical scope disclosed by the present invention, Any changes or substitutions that can be easily thought of, should be covered by the protection scope of the present invention.

Claims (5)

1. a kind of method for making NiGeSn material, it is characterised in that:The method is offer Ge first1-xSnxLayer material as Initial substrate, wherein:0.01≤x≤0.12;Again in Ge1-xSnxLayer surface growth thickness is the aluminum metal insert layer of 1~10nm; Then Ni metal layer is grown in aluminum metal insertion layer surface;Then short annealing processing is carried out:With 25~75 DEG C/sec of heating speed After rate is warming up to 300~600 DEG C, heat preservation 20~120 seconds, it was cooled to room temperature within 100~200 second time, passes through Ni metal Aluminum metal insert layer and Ge1-xSnxLayer, which reacts, generates NiGe1-xSnxLayer, wherein:0.01≤x≤0.12;Finally using chemistry Etch removes aluminum metal insert layer and unreacted W metal to get NiGeSn material is arrived.
2. according to the method described in claim 1, it is characterized in that:The metal inserting layer is carried out using physical vaporous deposition Growth.
3. according to the method described in claim 1, it is characterized in that:The Ni metal layer with a thickness of 5~100nm.
4. method according to claim 1 or 3, it is characterised in that:The Ni metal layer uses magnetron sputtering technique or electricity Beamlet evaporation technology is grown on metal inserting layer surface.
5. according to the method described in claim 1, it is characterized in that:The short annealing processing is in a vacuum or inert atmosphere It carries out.
CN201510977256.2A 2015-12-22 2015-12-22 A method of making NiGeSn material Expired - Fee Related CN105551938B (en)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104752182A (en) * 2013-12-30 2015-07-01 中国科学院上海微系统与信息技术研究所 Method for manufacturing NiSiGe material through Ti inserting layer

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104409321B (en) * 2014-10-30 2017-05-10 上海工程技术大学 Method utilizing NiTi alloy for epitaxial growth NiSiGe material

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104752182A (en) * 2013-12-30 2015-07-01 中国科学院上海微系统与信息技术研究所 Method for manufacturing NiSiGe material through Ti inserting layer

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Formation and characterization of Ni/Al ohmic cntact on n+-type GeSn;Xu Zhang etc.;《Sollid-State Electronics》;20151017(第114期);178-181 *

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