CN105551938A - Method for manufacturing NiGeSn material - Google Patents

Method for manufacturing NiGeSn material Download PDF

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Publication number
CN105551938A
CN105551938A CN201510977256.2A CN201510977256A CN105551938A CN 105551938 A CN105551938 A CN 105551938A CN 201510977256 A CN201510977256 A CN 201510977256A CN 105551938 A CN105551938 A CN 105551938A
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China
Prior art keywords
layer
metal
nigesn
inserting layer
metal inserting
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CN201510977256.2A
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CN105551938B (en
Inventor
平云霞
孟骁然
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Shanghai University of Engineering Science
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Shanghai University of Engineering Science
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02535Group 14 semiconducting materials including tin
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The invention discloses a method for manufacturing an NiGeSn material. The method comprises the steps of providing a Ge1-xSnx layer as an initial substrate firstly; growing a metal insertion layer on the surface of the Ge1-xSnx layer, and then growing an Ni metal layer on the surface of the metal insertion layer; performing rapid annealing treatment: heating to 300-600 DEG C at the heating rate of 25-75 DEG C/second, performing thermal insulation for 20-120 seconds, and then cooling to room temperature within 100-200 seconds; and finally removing the metal insertion layer and unreacted metal Ni by adopting a chemical etching method to obtain the NiGeSn material. The method is simple in process, easy to realize industrial implementation and the like; the generated NiGeSn material is continuous, uniform and tidy; and meanwhile, the NiGeSn material, used as the contact material for a transistor device, can satisfy the application requirements, and can improve the electrical performance of the transistor device.

Description

A kind of method making NiGeSn material
Technical field
The present invention relates to a kind of method making NiGeSn material, belongs to technical field of material.
Background technology
In recent years, and traditional silicon material belongs to the germanium ashbury metal (GeSn) of column IV element, because of the attribute of its uniqueness, receives researcher and pays close attention to greatly.In transistor channel region, GeSn has high carrier mobility because of it, become the focus of high mobility MOSFET element research, such as: improve hole mobility by introducing large compressive strain in GeSn raceway groove, germanium tin quantum well devices presents excellent electric property; In addition, at source transistor drain region, GeSn is greater than germanium (Ge) because of its lattice constant, can introduce the pressure source of GeSn as Ge channel transistor uniaxial compressive, promote the carrier mobility of Ge channel transistor further.
Nickel germanium ashbury metal (NiGeSn) is another the novel high mobility material developed on the basis of germanium ashbury metal (GeSn), is the transistor material of future ideality.At present, the researcher of various countries to the character of nickel germanium tin material, such as: the Sn atoms permeating character in Ni and GeSn alloy reaction, the aspect such as electrical properties of NiGeSn conduct extensive research.
About the preparation of NiGeSn, normally directly at present on GeSn sample, grow Ni metal film layer, then carry out annealing in process thus obtained NiGeSn.But, adopt and prepare in the process of NiGeSn in this way, when Ni and GeSn reacts, because Ni and Ge reaction speed is too fast, and the poor heat stability of Sn atom, be not easy to form continuous print NiGeSn film; In addition, due to the diffusion of Sn, make the NiGeSn film quality of formation bad, have impact on the application of NiGeSn film as source and drain contact material to a great extent.
Summary of the invention
For the problems referred to above that prior art exists, the object of this invention is to provide a kind of method making NiGeSn material, to generate continuous, homogeneous, smooth nickel germanium tin (NiGeSn) material, make its satisfied application requirement as transistor device contact material.
For achieving the above object, the present invention adopts following technical scheme:
Making a method for NiGeSn material, is first provide Ge 1-xsn xlayer material as initial substrate, wherein: 0.01≤x≤0.12; Again at Ge 1-xsn xlayer superficial growth metal inserting layer; Then at metal inserting layer superficial growth Ni metal level; Then carry out short annealing process: be warming up to 300 ~ 600 DEG C with the heating rate of 25 ~ 75 DEG C/sec, be incubated after 20 ~ 120 seconds, within 100 ~ 200 second time, be cooled to room temperature, make Ni metal through metal inserting layer and Ge 1-xsn xlayer reacts and generates NiGe 1-xsn xlayer, wherein: 0.01≤x≤0.12; Finally adopt chemical corrosion method to remove metal inserting layer and unreacted W metal, namely obtain NiGeSn material.
Preferably, described Ge 1-xsn xlayer material is the Ge of the Ge substrate adopting molecular beam epitaxy (that is: MBE method) to prepare 1-xsn xlayer material.
As further preferred version, the Ge that molecular beam epitaxy prepares 1-xsn xlayer material after surface clean (such as RCA cleaning) process as initial substrate.
Preferably, described metal inserting layer adopts physical vaporous deposition (PVD) to grow.
As further preferred version, described metal inserting layer adopts magnetron sputtering method to grow.
Preferably, the thickness of described metal inserting layer is 1 ~ 10nm.
As further preferred version, above-mentioned metal inserting layer selects titanium (Ti) or aluminum metal (Al).
Preferably, the thickness of described Ni metal level is 5 ~ 100nm.
As further preferred version, described Ni metal level adopts magnetron sputtering technique or electron beam evaporation process to grow on metal inserting layer surface.
Preferably, described short annealing process carries out in a vacuum or inert atmosphere.
Preferably, described chemical corrosion adopts the hydrochloric acid solution of 5 ~ 15wt%.
The present invention passes through at Ge 1-xsn xlayer superficial growth metal inserting layer, then at the superficial growth Ni metal level of metal inserting layer, due to the existence of metal inserting layer, therefore can suppress Ni and Ge 1-xsn xreaction rate, makes Ni and Ge 1-xsn xreaction carry out with speed more slowly, thus for Ge 1-xsn xstrain serve certain maintenance effect, ensure that evenness and the continuity of generated NiGeSn material.The present invention, simultaneously in conjunction with specific annealing process, makes specific temperature ensure that Ni and Ge 1-xsn xthermal activation energy needed for alloying reaction.
Compared with prior art, the present invention has following beneficial effect:
1) the inventive method technique is simple, is easy to industrializing implementation;
2) the NiGeSn material generated is continuous, homogeneous, smooth, can meet the application requirement as transistor device contact material, and is conducive to the electrical property improving transistor device.
Accompanying drawing explanation
Fig. 1 is the inventive method implementing procedure schematic diagram;
The AFM resolution chart of the NiGeSn material of Fig. 2 prepared by embodiment;
The AFM resolution chart of the NiGeSn material of Fig. 3 prepared by comparative example.
Embodiment
Below in conjunction with specific embodiments and the drawings, set forth the present invention further.
Embodiment
As shown in Figure 1: will the standby Ge of MBE legal system be passed through 1-xsn xlayer material is through diluted hydrofluoric acid (HF:H 2o=1:50, volume ratio) and deionized water surface clean after as initial substrate, wherein, 0.01≤x≤0.12; Again at Ge 1-xsn xemploying physical vaporous deposition (such as: magnetron sputtering method) growth thickness in layer surface is the Al metal inserting layer of 3nm; Then be the Ni metal level of 10nm at Al metal inserting layer employing magnetron sputtering technique or electron beam evaporation process growth thickness; Then carry out short annealing process: be warming up to 500 DEG C with the heating rate of 40 DEG C/sec, be incubated after 30 seconds, within 120 second time, be cooled to room temperature, annealing atmosphere is nitrogen, makes Ni metal through metal inserting layer and Ge 1-xsn xlayer reacts and generates NiGe 1-xsn xlayer, wherein: 0.01≤x≤0.12; Finally adopt the hydrochloric acid solution of 10wt% to remove metal inserting layer and unreacted W metal, namely obtain being positioned at Ge 1-xsn xthe NiGeSn material on layer surface.
Fig. 2 is the AFM resolution chart of the NiGeSn material of the present embodiment, as seen from Figure 2: adopt the inventive method to generate continuous, homogeneous, smooth NiGeSn material layer, and the roughness (Rq) of gained NiGeSn material only has 2.22nm, this also means that the thermal stability of the NiGeSn material of the present embodiment is higher simultaneously.
In addition, during owing to adopting metal Ti as insert layer metal, the surface condition of obtained NiGeSn material and the present embodiment gained NiGeSn material proximate, just no longer carefully chat in present specification one by one.
Comparative example
The standby Ge of MBE legal system will be passed through 1-xsn xlayer material after the surface clean of diluted hydrofluoric acid (HF:H2O=1:50, volume ratio) and deionized water as initial substrate, wherein: 0.01≤x≤0.12; Then direct at Ge 1-xsn xlayer surface employing magnetron sputtering technique or electron beam evaporation process growth thickness are the Ni metal level of 10nm; Then carry out short annealing process: be warming up to 400 DEG C with the heating rate of 40 DEG C/sec, be incubated after 30 seconds, within 120 second time, be cooled to room temperature, annealing atmosphere is nitrogen; Finally adopt the hydrochloric acid solution of 10wt% to remove unreacted W metal, obtain NiGeSn material.
Fig. 3 is the AFM resolution chart of the NiGeSn material of this comparative example, as seen from Figure 3: the rough surface of the NiGeSn material layer adopting comparative example method to generate, out-of-flatness, appearance cohesion, and the roughness of resulting materials (Rq) is up to 17nm, this also means that the thermal stability of the NiGeSn material of this comparative example is lower simultaneously.
To sum up experiment is visible: the present invention passes through at Ge 1-xsn xfirst plated metal insert layer before layer surface deposition Ni metal level, simultaneously in conjunction with specific annealing process, improve the evenness of the surface film of NiGeSn material, continuous, homogeneous, smooth NiGeSn material layer can be generated, improve the temperature that NiGeSn occurs to reunite simultaneously, significantly improve the thermal stability of material, make obtained NiGeSn material can meet application requirement as transistor device contact material, and be conducive to the electrical property improving transistor device, there is conspicuousness progress and industrial applications value.
Finally be necessary described hereinly be; the foregoing is only the present invention's preferably embodiment; but protection scope of the present invention is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the present invention discloses; the change that can expect easily or replacement, all should be encompassed within protection scope of the present invention.

Claims (7)

1. make a method for NiGeSn material, it is characterized in that: described method first provides Ge 1-xsn xlayer material as initial substrate, wherein: 0.01≤x≤0.12; Again at Ge 1-xsn xlayer superficial growth metal inserting layer; Then at metal inserting layer superficial growth Ni metal level; Then carry out short annealing process: be warming up to 300 ~ 600 DEG C with the heating rate of 25 ~ 75 DEG C/sec, be incubated after 20 ~ 120 seconds, within 100 ~ 200 second time, be cooled to room temperature, make Ni metal through metal inserting layer and Ge 1-xsn xlayer reacts and generates NiGe 1-xsn xlayer, wherein: 0.01≤x≤0.12; Finally adopt chemical corrosion method to remove metal inserting layer and unreacted W metal, namely obtain NiGeSn material.
2. method according to claim 1, is characterized in that: described metal inserting layer adopts physical vaporous deposition to grow.
3. method according to claim 1, is characterized in that: the thickness of described metal inserting layer is 1 ~ 10nm.
4. according to the method in any one of claims 1 to 3, it is characterized in that: described metal inserting layer selects titanium or aluminum metal.
5. method according to claim 1, is characterized in that: the thickness of described Ni metal level is 5 ~ 100nm.
6. method according to claim 1 or 5, is characterized in that: described Ni metal level adopts magnetron sputtering technique or electron beam evaporation process to grow on metal inserting layer surface.
7. method according to claim 1, is characterized in that: described short annealing process carries out in a vacuum or inert atmosphere.
CN201510977256.2A 2015-12-22 2015-12-22 A method of making NiGeSn material Expired - Fee Related CN105551938B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104409321A (en) * 2014-10-30 2015-03-11 上海工程技术大学 Method utilizing NiTi alloy for epitaxial growth NiSiGe material
CN104752182A (en) * 2013-12-30 2015-07-01 中国科学院上海微系统与信息技术研究所 Method for manufacturing NiSiGe material through Ti inserting layer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104752182A (en) * 2013-12-30 2015-07-01 中国科学院上海微系统与信息技术研究所 Method for manufacturing NiSiGe material through Ti inserting layer
CN104409321A (en) * 2014-10-30 2015-03-11 上海工程技术大学 Method utilizing NiTi alloy for epitaxial growth NiSiGe material

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
XU ZHANG ETC.: "Formation and characterization of Ni/Al ohmic cntact on n+-type GeSn", 《SOLLID-STATE ELECTRONICS》 *

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