CN105530139A - 1588 device self check method and 1588 device self check device - Google Patents
1588 device self check method and 1588 device self check device Download PDFInfo
- Publication number
- CN105530139A CN105530139A CN201410510243.XA CN201410510243A CN105530139A CN 105530139 A CN105530139 A CN 105530139A CN 201410510243 A CN201410510243 A CN 201410510243A CN 105530139 A CN105530139 A CN 105530139A
- Authority
- CN
- China
- Prior art keywords
- time
- equipment
- phy
- message
- delay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 21
- 230000002159 abnormal effect Effects 0.000 claims abstract description 18
- 238000012360 testing method Methods 0.000 claims description 9
- 230000001360 synchronised effect Effects 0.000 claims description 8
- 230000002547 anomalous effect Effects 0.000 claims description 2
- 238000012545 processing Methods 0.000 description 16
- 238000012937 correction Methods 0.000 description 8
- 238000001514 detection method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 238000004891 communication Methods 0.000 description 3
- 238000007689 inspection Methods 0.000 description 3
- 230000001934 delay Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 210000001503 joint Anatomy 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
The invention discloses a 1588 device self check method. the method comprises steps: line time delay between a receiving port and a transmitting port of a physical interface transceiver PHY in the1588 device is acquired; when the absolute value for the difference between the line time delay and a standard time is not in a preset difference value range, the time synchronization performance of the 1588 device is determined to be abnormal; and when the absolute value for the difference between the line time delay and the standard time is in a preset difference value range, the time synchronization performance of the 1588 device is determined to be normal. The invention also discloses a 1588 device self check device.
Description
Technical Field
The invention relates to a communication technology, in particular to a self-checking method and a self-checking device for 1588 equipment.
Background
With the increasingly wide application of 1588 devices in the implementation of time synchronization of packet transmission networks, the detection of the receiving and transmitting channels, the synchronization performance and other 1588 functions of 1588 devices becomes more important when 1588 devices are generated and opened.
At present, the detection of 1588 function requires the butt joint of two-end equipment, and after the two-end equipment is configured with time synchronization interface, the detection is carried out to determine whether the two-end equipment realizes time synchronization; when the two-end equipment cannot realize time synchronization, abnormal message receiving and sending channels, abnormal time synchronization performance or abnormal two-end equipment may occur; at this time, a plurality of reasons which may cause that the equipment at the two ends cannot realize time synchronization need to be checked and positioned one by one; in addition, the detection method can only test whether one physical port is normal, and cannot detect all ports of the 1588 device at the same time.
Disclosure of Invention
In view of this, embodiments of the present invention are expected to provide a self-checking method and apparatus for a 1588 device, so as to implement independent detection of a receiving and sending performance of a 1588 message and a time synchronization performance of the 1588 device for all ports of the 1588 device at the same time.
The technical scheme of the embodiment of the invention is realized as follows:
the embodiment of the invention provides a self-checking method of 1588 equipment, which comprises the following steps: the method comprises the steps of obtaining line time delay between a receiving port and a sending port of a PHY (physical layer) in 1588 equipment, determining that the time synchronization performance of the 1588 equipment is abnormal when the absolute value of the difference between the line time delay and standard time is not within a preset difference range, and determining that the time synchronization performance of the 1588 equipment is normal when the absolute value of the difference between the line time delay and the standard time is within the preset difference range.
In the foregoing implementation scheme, the acquiring a line delay between a receiving port and a transmitting port of a PHY in 1588 device includes: recording the time of generating a message timestamp as T1, the time of sending a message by a PHY as T2, the time of receiving the message by the PHY as T3, and the time of returning the message as T4, wherein the line delay is T3-T2, and T3-T2 is T4-T1-C3; wherein, the C3 is the updated time calibration value carried in the return message.
In the above implementation scheme, when the message is generated, the time calibration value in the message is cleared.
In the foregoing implementation scheme, after determining the time synchronization performance of the 1588 device, the method further includes: and displaying the time synchronization performance of the 1588 equipment, the transceiving performance and the return delay of the 1588 equipment port.
In the foregoing implementation scheme, the determining the time synchronization performance exception of the 1588 device includes: determining that the first time synchronization counter and the second time synchronization counter within the 1588 device are not synchronized, and/or that the PHY is anomalous, and/or that the PHY calculates a calibration time error.
An embodiment of the present invention further provides a self-inspection apparatus for 1588 devices, where the apparatus includes: the device comprises an acquisition module, a comparison module and a determination module; wherein,
the acquisition module is used for acquiring the line delay between a receiving port and a transmitting port of a PHY (physical layer) in 1588 equipment;
the comparison module is used for comparing the line time delay with a preset difference range;
the determining module is used for determining that the time synchronization performance of the 1588 equipment is abnormal when the absolute value of the difference between the line time delay and the standard time is not within a preset difference range; and when the absolute value of the difference between the line time delay and the standard time is within a preset difference value range, determining that the time synchronization performance of the 1588 equipment is normal.
In the above implementation scheme, the obtaining module is specifically configured to record that a time when a timestamp of a packet is generated is T1, a time when a PHY sends the packet is T2, a time when the PHY receives the packet is T3, and a time when the packet returns is T4, where the line delay is T3-T2, and T3-T2 is T4-T1-C3; wherein, the C3 is the updated time calibration value carried in the return message.
In the foregoing implementation, the apparatus further includes: and the zero clearing module is used for clearing the time calibration value in the message when the message is generated.
In the foregoing implementation, the apparatus further includes: and the display module is used for displaying the time synchronization performance of the 1588 equipment, the transceiving performance and the return delay of the 1588 equipment port.
In the foregoing implementation scheme, the determining module is specifically configured to determine that the first time synchronization counter and the second time synchronization counter in the 1588 device are not synchronized, and/or that the PHY is abnormal, and/or that the PHY calculates a calibration time error.
According to the self-checking method and device for the 1588 equipment, provided by the embodiment of the invention, the line time delay between the receiving port and the transmitting port of a physical interface transceiver PHY in the 1588 equipment is obtained; when the absolute value of the difference between the line time delay and the standard time is not within a preset difference value range, determining that the time synchronization performance of the 1588 equipment is abnormal; when the absolute value of the difference between the line time delay and the standard time is within a preset difference value range, determining that the time synchronization performance of the 1588 equipment is normal; the time for generating a 1588 device message is T1, the time for receiving the message by the PHY is T2, the time for sending the message by the PHY is T3, the time for returning the message is T4, the calibration time of the message is correction, the line delay is T3-T2, T3-T2 is T4-T1-C3, and the C3 is an updated time calibration value carried in the return message; the embodiment of the invention confirms that a transmitting port Tx and a receiving port Rx of a PHY can work normally by transmitting and receiving messages through the PHY in 1588 equipment; determining the time synchronization performance of the 1588 equipment by comparing the obtained switch-back time delay with a preset difference range; therefore, the detection of the message receiving and sending performance of the 1588 and the time synchronization performance of the 1588 device can be independently performed on all ports of the 1588 device at the same time.
Drawings
Fig. 1 is a schematic processing flow diagram of a self-checking method for equipment 1588 according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a message processing flow of a 1558 device according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of self-testing of 1588 devices, according to an embodiment of the present invention;
FIG. 4 is a self-test result display interface diagram of the device 1588 in accordance with the present invention;
fig. 5 is a schematic structural diagram of a self-inspection apparatus 1588 according to an embodiment of the present invention.
Detailed Description
In the embodiment of the invention, the line time delay between a receiving port and a transmitting port of a physical interface transceiver PHY in 1588 equipment is obtained; when the absolute value of the difference between the line time delay and the standard time is not within a preset difference value range, determining that the time synchronization performance of the 1588 equipment is abnormal; and when the absolute value of the difference between the line time delay and the standard time is within a preset difference value range, determining that the time synchronization performance of the 1588 equipment is normal.
In order to better understand the technical solution of the embodiment of the present invention, the components of the 1588 device and the functions of the components are described in detail below.
1588 the device generally comprises a centralized processing module and a line transceiver module; the centralized processing module is used for generating messages, returning the messages, stamping the messages, selecting a time source of 1588 equipment, calculating time deviation, synchronizing time and the like; the line transceiving module is used for processing the 1588 message timestamp and executing the functions of encoding, transceiving and the like of a physical layer; the centralized processing module is provided with a first time counter, the line transceiver module is provided with a second time counter, and the second time counter needs to be synchronous with the first time counter, so that all timestamps of the line transceiver module and the centralized processing module are guaranteed to be the same reference.
The processing flow of the self-checking method of the 1588 device in the embodiment of the present invention, as shown in fig. 1, includes the following steps:
step 101, obtaining a line delay between a receiving port and a transmitting port of a physical interface transceiver PHY in 1588 equipment;
specifically, in the embodiment of the present invention, as shown in fig. 2, a message processing flow of a 1558 device is schematically illustrated by a self-check of a 1588 device, as shown in fig. 3: the centralized processing module generates a message, the time for generating the timestamp of the message is T1, and the message is sent to the line transceiving module through an internal communication channel of 1588 equipment; a timestamp processing module is entered into the line transceiver module, and the correction value in the message is updated to C1-correction-T1; the time that the PHY sends the message through the sending port Tx is T2, and the PHY updates the correction value in the message to C2-correction-T1 + T2; the time for the PHY to receive the message through the Rx is T3; the PHY returns the packet to the centralized processing module through an internal communication channel of the 1588 device, where the returned packet carries T1 and the updated correction value is C3; the centralized processing module records the time T4 for returning the message, and updates the correction value in the message to C3 ═ correction-T1+ T2+ (T4-T3);
the message can be a sync message, the correction is the calibration time in the message, and the time delay size needing to be calibrated is recorded; when the centralized processing module generates a message, clearing the correction value in the message; the line delay between the receive port and the transmit port of the PHY is T3-T2-T4-T1-C3, and T3-T2 may also be the high-speed serial link return time of the PHY;
here, the line delay may be a line delay obtained at one time, or may be an average value of a plurality of line delays.
102, determining that the time synchronization performance of the 1588 equipment is abnormal when the absolute value of the difference between the line time delay and the standard time is not within a preset difference range;
here, the standard time is a theoretical time for transmitting a packet between a receiving port and a transmitting port of the PHY, and is determined by the PHY; the preset difference range is determined by 1588 equipment, and the preset difference range can be [1ns, 20ns ];
when the line time delay is not within a preset difference range, determining that the time synchronization performance of the 1588 device is abnormal, where the time synchronization performance of the 1588 device is abnormal and includes: 1588 the first time synchronization counter and the second time synchronization counter in the device are not synchronized, and/or the PHY is abnormal, and/or the PHY calculates a calibration time error;
the inaccuracy of the T2 value and the T3 value is caused by the asynchronization of the first time synchronization counter and the second time synchronization counter in the 1588 device and the PHY exception.
And 103, when the line time delay is within a preset difference value range, determining that the time synchronization performance of the 1588 equipment is normal.
The embodiment of the invention also comprises a step 104 of displaying the time synchronization performance, the calibration time and the preset difference range of the 1588 equipment;
specifically, a 1588 device self-inspection result display interface diagram, shown in fig. 4, includes: the time synchronization performance of the 1588 device, the transceiving performance of the 1588 device port, the return delay and the like.
In the message processing process, the embodiment of the invention can perform the high-speed serial link return test on each receiving port and each sending port, detect the transceiving performances of the receiving ports and the sending ports, and further detect the time synchronization performance of the 1588 equipment according to the line delay and the size of the preset difference range when detecting that the transceiving performances of all the receiving ports and the sending ports of the 1588 equipment are normal.
Before implementing an embodiment of the present invention, the method further comprises: setting self-checking options of 1588 equipment in a network management system, wherein the self-checking options comprise: whether to execute the 1588 equipment self-test, the time for executing the 1588 equipment self-test and the like.
In order to implement the self-checking method for the 1588 device, an embodiment of the present invention further provides a self-checking device for the 1588 device, where a composition structure of the device is shown in fig. 5, and the device includes: the device comprises an acquisition module 11, a comparison module 12 and a determination module 13; wherein,
the obtaining module 11 is configured to obtain a line delay between a receiving port and a transmitting port of a PHY in 1588 equipment;
the comparison module 12 is configured to compare the line delay with a preset difference range;
the determining module 13 is configured to determine that the time synchronization performance of the 1588 device is abnormal when the line delay is not within a preset difference range; and when the line time delay is within a preset difference value range, determining that the time synchronization performance of the 1588 equipment is normal.
In the above implementation scheme, the obtaining module 11 is specifically configured to record that a time when a timestamp of a packet is generated is T1, a time when a PHY sends the packet is T2, a time when the PHY receives the packet is T3, and a time when the packet returns back is T4, where the line delay is T3-T2, and T3-T2 is T4-T1-C3; wherein, the C3 is an updated time calibration value carried in the return message;
the message can be a sync message, the correction is a time calibration value of the message, and T3-T2 can also be the high-speed serial link return time of the PHY;
in the foregoing implementation, the apparatus further includes: and the zero clearing module 14 is used for clearing the time calibration value in the message when the message is generated.
In the foregoing implementation, the apparatus further includes: and the display module 15 is used for displaying the time synchronization performance, the calibration time and the preset difference range of the 1588 device.
In the foregoing implementation, the determining module 13 is specifically configured to determine that a first time synchronization counter and a second time synchronization counter in the 1588 device are not synchronized, and/or a PHY is abnormal, and/or a PHY calculation calibration time error;
wherein, the first time synchronization counter and the second time synchronization counter in the 1588 device are not synchronized, and PHY exception causes inaccuracy of the T2 value and the T3 value;
in the above implementation scheme, the line delay may be a line delay obtained at one time, or an average value of a plurality of line delays;
in the above implementation scheme, the standard time is a theoretical time for transmitting a packet between a receiving port and a transmitting port of the PHY, and is determined by the PHY; the preset difference range is determined by 1588 equipment, and the preset difference range can be [1ns, 20ns ].
It should be noted that, in practical application, the functions of the obtaining module 11, the comparing module 12, the determining module 13, the clearing module 14 and the displaying module 15 may be implemented by a Central Processing Unit (CPU), a microprocessor unit (MPU), a Digital Signal Processor (DSP) or a programmable gate array (FPGA) located on the 1588 device.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.
Claims (10)
1. A self-checking method for 1588 equipment is characterized by comprising the following steps: obtaining line time delay between a receiving port and a transmitting port of a physical interface transceiver PHY in 1588 equipment;
when the absolute value of the difference between the line time delay and the standard time is not within a preset difference value range, determining that the time synchronization performance of the 1588 equipment is abnormal;
and when the absolute value of the difference between the line time delay and the standard time is within a preset difference value range, determining that the time synchronization performance of the 1588 equipment is normal.
2. The self-checking method of the 1588 device of claim 1, wherein the obtaining of the line delay between a receive port and a transmit port of a PHY in the 1588 device comprises:
recording the time of generating a message timestamp as T1, the time of sending a message by a PHY as T2, the time of receiving the message by the PHY as T3, and the time of returning the message as T4, wherein the line delay is T3-T2, and T3-T2 is T4-T1-C3; wherein,
and the C3 is the updated time calibration value carried in the return message.
3. The self-checking method of the 1588 device of claim 2, wherein when the message is generated, a time calibration value in the message is cleared.
4. The self-checking method of the 1588 device of claim 1, wherein after determining the time synchronization performance of the 1588 device, the method further comprises:
and displaying the time synchronization performance of the 1588 equipment, the transceiving performance and the return delay of the 1588 equipment port.
5. The self-checking method of the 1588 device of claim 1, wherein the determining a time synchronization performance exception of the 1588 device comprises:
determining that the first time synchronization counter and the second time synchronization counter within the 1588 device are not synchronized, and/or that the PHY is anomalous, and/or that the PHY calculates a calibration time error.
6. A self-checking device of 1588 equipment, characterized in that, the device includes: the device comprises an acquisition module, a comparison module and a determination module; wherein,
the acquisition module is used for acquiring the line delay between a receiving port and a transmitting port of a PHY (physical layer) in 1588 equipment;
the comparison module is used for comparing the line time delay with a preset difference range;
the determining module is used for determining that the time synchronization performance of the 1588 equipment is abnormal when the absolute value of the difference between the line time delay and the standard time is not within a preset difference range; and when the absolute value of the difference between the line time delay and the standard time is within a preset difference value range, determining that the time synchronization performance of the 1588 equipment is normal.
7. The self-checking apparatus of the 1588 device of claim 6, wherein the obtaining module is specifically configured to record that a time when a timestamp of a packet is generated is T1, a time when a PHY sends the packet is T2, a time when the PHY receives the packet is T3, and a time when the packet returns is T4, where the line delay is T3-T2, and T3-T2 is T4-T1-C3; wherein,
and the C3 is the updated time calibration value carried in the return message.
8. The self-test apparatus of claim 7, wherein the apparatus further comprises: and the zero clearing module is used for clearing the time calibration value in the message when the message is generated.
9. The self-test apparatus of claim 6, wherein the apparatus further comprises: and the display module is used for displaying the time synchronization performance of the 1588 equipment, the transceiving performance and the return delay of the 1588 equipment port.
10. The self-test apparatus of claim 6, wherein the determining module is specifically configured to determine that the first time synchronization counter and the second time synchronization counter in the 1588 device are not synchronized, and/or that a PHY is abnormal, and/or that a PHY calculates a calibration time error.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410510243.XA CN105530139B (en) | 2014-09-28 | 2014-09-28 | Self-checking method and device for 1588 equipment |
| PCT/CN2015/073247 WO2016045311A1 (en) | 2014-09-28 | 2015-02-25 | Device self-checking method, apparatus and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410510243.XA CN105530139B (en) | 2014-09-28 | 2014-09-28 | Self-checking method and device for 1588 equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105530139A true CN105530139A (en) | 2016-04-27 |
| CN105530139B CN105530139B (en) | 2021-03-16 |
Family
ID=55580215
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410510243.XA Active CN105530139B (en) | 2014-09-28 | 2014-09-28 | Self-checking method and device for 1588 equipment |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN105530139B (en) |
| WO (1) | WO2016045311A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111239584A (en) * | 2019-12-31 | 2020-06-05 | 视航机器人（佛山）有限公司 | Mainboard testing device, system and method applied to unmanned forklift |
| CN115914038A (en) * | 2022-11-11 | 2023-04-04 | 中国联合网络通信集团有限公司 | Degradation forwarding equipment detection method, device, equipment and storage medium |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101437239A (en) * | 2008-12-11 | 2009-05-20 | 吉林大学 | Real time sensor signal network transmission method based on linear prediction filtering |
| US7724182B2 (en) * | 2007-04-16 | 2010-05-25 | Panasonic Corporation | Radar system |
| CN102833061A (en) * | 2012-08-31 | 2012-12-19 | 北京东土科技股份有限公司 | Method for improving clock accuracy based on seamless redundancy ring network and node |
| CN103905136A (en) * | 2012-12-26 | 2014-07-02 | 中兴通讯股份有限公司 | Time synchronization processing method and device |
| CN104113386A (en) * | 2014-07-09 | 2014-10-22 | 北京东土科技股份有限公司 | Method and device for monitoring Ethernet clock synchronization |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011188042A (en) * | 2010-03-05 | 2011-09-22 | Nec Corp | Digital signal processing circuit, digital signal processing method, and program |
| CN202798152U (en) * | 2012-07-31 | 2013-03-13 | 许继集团有限公司 | Network layering distributed intelligent regional power grid |
-
2014
- 2014-09-28 CN CN201410510243.XA patent/CN105530139B/en active Active
-
2015
- 2015-02-25 WO PCT/CN2015/073247 patent/WO2016045311A1/en active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7724182B2 (en) * | 2007-04-16 | 2010-05-25 | Panasonic Corporation | Radar system |
| CN101437239A (en) * | 2008-12-11 | 2009-05-20 | 吉林大学 | Real time sensor signal network transmission method based on linear prediction filtering |
| CN102833061A (en) * | 2012-08-31 | 2012-12-19 | 北京东土科技股份有限公司 | Method for improving clock accuracy based on seamless redundancy ring network and node |
| CN103905136A (en) * | 2012-12-26 | 2014-07-02 | 中兴通讯股份有限公司 | Time synchronization processing method and device |
| CN104113386A (en) * | 2014-07-09 | 2014-10-22 | 北京东土科技股份有限公司 | Method and device for monitoring Ethernet clock synchronization |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111239584A (en) * | 2019-12-31 | 2020-06-05 | 视航机器人（佛山）有限公司 | Mainboard testing device, system and method applied to unmanned forklift |
| CN115914038A (en) * | 2022-11-11 | 2023-04-04 | 中国联合网络通信集团有限公司 | Degradation forwarding equipment detection method, device, equipment and storage medium |
| CN115914038B (en) * | 2022-11-11 | 2024-04-09 | 中国联合网络通信集团有限公司 | Degradation forwarding device detection method, device, equipment and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105530139B (en) | 2021-03-16 |
| WO2016045311A1 (en) | 2016-03-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9923656B2 (en) | Methods, systems, and computer readable media for testing recovered clock quality | |
| US9813226B2 (en) | Modeling a clock | |
| US9876596B2 (en) | Method and device for detecting fault in synchronization link | |
| US9699051B2 (en) | Methods, systems, and computer readable media for one-way link delay measurement | |
| US9401856B2 (en) | Latency monitoring function | |
| US9451571B2 (en) | Determining uplink and downlink delays between a baseband unit and a remote radio head | |
| EP2528254A1 (en) | Method and device for time synchronization | |
| EP2770678A1 (en) | Clock synchronization method and system in 1588-2008 protocol | |
| US9813175B2 (en) | Method for detecting timing references affected by a change in path delay asymmetry between nodes in a communication network | |
| EP1931084A1 (en) | A method for getting the link estimating parameters | |
| CN103168440B (en) | Time path compensation method and device | |
| WO2017032113A1 (en) | Method and apparatus for measuring time synchronization deviation | |
| CN111464252B (en) | Communication method and optical module | |
| CN102201983A (en) | Method, terminal and system for measuring asymmetric time delay of transmission link | |
| WO2016106908A1 (en) | Method and system for synchronizing clocks in sdh network | |
| WO2016054884A1 (en) | Frequency deviation monitoring method, device and computer storage medium | |
| WO2013143385A1 (en) | Calculating time offset | |
| CN106688207A (en) | Method for determining a propagation time of a telegram in a communication network, and corresponding network components | |
| US20200303919A1 (en) | Differential protection method and system | |
| JP2014216669A (en) | Communication system, synchronous system, and communication method | |
| CN105530139B (en) | Self-checking method and device for 1588 equipment | |
| CN102638339B (en) | Method and device for realizing precision time synchronization | |
| CN105490734B (en) | A kind of optical fibre length measurement method and device | |
| CN106254182B (en) | A kind of time synchronism apparatus of IP network tester | |
| WO2021018407A1 (en) | Clock synchronization in packet communications networks |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |