CN105516625A - Pixel merging read-out circuit structure for CMOS (Complementary Metal Oxide Semiconductor) image sensor and signal processing read-out method - Google Patents
Pixel merging read-out circuit structure for CMOS (Complementary Metal Oxide Semiconductor) image sensor and signal processing read-out method Download PDFInfo
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- CN105516625A CN105516625A CN201610020794.7A CN201610020794A CN105516625A CN 105516625 A CN105516625 A CN 105516625A CN 201610020794 A CN201610020794 A CN 201610020794A CN 105516625 A CN105516625 A CN 105516625A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/766—Addressed sensors, e.g. MOS or CMOS sensors comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
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Abstract
The invention discloses a pixel merging read-out circuit structure for a CMOS (Complementary Metal Oxide Semiconductor) image sensor and a signal processing read-out method. The structure comprises a column bus, a column amplifier, a column read-out reset switch, a column gating switch, a column merging capacitor, a column merging control switch, a column merging bus, a column merging output switch, a row merging capacitor, a merging reset switch, a row merging control switch, a row merging bus and an output amplifier. When a system works, the column bus sequentially selects rows, where pixels to be merged are located, the operation of merging the pixels of rows and columns is completed by the column merging control switch and the row merging control switch, and finally, pixel merged signals are output through the output amplifier. The pixel merging read-out circuit structure for the CMOS image sensor and the signal processing read-out method have the advantages that the function of merging pixels of any scale of the CMOS image sensor is achieved, and meanwhile, a signal-to-noise ratio and frame frequency are increased.
Description
Technical field:
The present invention relates to field of image sensors, be specifically related to a kind of cmos image sensor pixel and merge reading out structure and signal transacting reading method.
Background technology:
At present, the performance of cmos image sensor improves constantly, and has been widely used in all kinds of science imaging, as remote sensing, high-speed photography, light spectrum image-forming etc.The real needs of this kind of special applications are relatively more flexible, sometimes need to obtain high-resolution careful image, sometimes then must ensure high frame rate work, not high to resolution requirement.For addressing this problem, ccd image sensor in the past develops pixel pooling function, the signal of adjacent several pixel can be integrated, and reads as a pixel.Like this, need the occasion of high frame rate, can the method sacrificial system resolution used, effectively reduce read-around number, reducing readout time, thus improve frame frequency.Meanwhile, N number of pixel merges reading, signal to noise ratio can be promoted in theory
doubly, system signal noise ratio is increased.
But the method that this pixel merges also has significant shortcoming.First, it is cumulative that the pixel of CCD merges based on charge packet, and this technique cannot use in cmos detector rapidly developing at present; Secondly, the maximum pixel of this mode merges number and is subject to the quantitative limitation of CCD potential well appearance, and the pixel that cannot realize random scale merges.And although pixel folding has also appearred in present CMOS image sensor, or be add up at the numeric field of detector outside, cannot reduce detector simulation delivery outlet speed, signal to noise ratio promotes also limited; Be the restriction by overlap capacitance, fixed mode (as 2 × 2,4 × 4) pixel can only be realized and merge.And in the science application (spectral coverage in such as light spectrum image-forming merge, generaI investigation application etc. in meticulous remote sensing) very urgent to flexibility demand, be starved of the inner reading out structure of cmos detector that can realize random scale pixel and merge.
Summary of the invention:
The present invention proposes a kind of cmos image sensor pixel and merge reading circuit structure and signal transacting reading method.
The technical problem that the present invention solves is the inner reading circuit structure of cmos detector realizing the merging of random scale pixel, also improves signal to noise ratio and frame frequency simultaneously.
A kind of cmos image sensor pixel merges reading out structure, as shown in Figure 1, comprises column bus, column amplifier, row read reset switch, row gating switch, row merge electric capacity, row merge control switch, and row merge bus, and row merge output switch, row merges electric capacity, merge reset switch, row merges control switch, and row merges bus and output amplifier.The feature that this cmos image sensor pixel merges reading out structure is:
Column bus is connected to the input of row reading reset switch and column amplifier parallel-connection structure, after column selection opens up the output closing and be connected to row reading reset switch and column amplifier parallel-connection structure, opens up pass be connected on row merging electric capacity by column selection; Row merge bus cross and are connected on the row merging electric capacity of each row, be provided with row and merge control switch for row union operation between every two cross-over connection nodes; Merge reset switch and merge Capacitance parallel connection with row, the input of its parallel-connection structure is connected to the output of row merging control switch, row merges bus cross and is connected on the row merging electric capacity of each row, be provided with a row between every two cross-over connection nodes and merge control switch for row union operation, the output of row merging control switch is connected to the input of output amplifier.
When described cmos image sensor pixel merges reading out structure work, choose pixel to be combined successively by column bus be expert at, merge control switch by row merging control switch and row and complete ranks pixel union operation, finally export the signal after pixel merging through output amplifier.
As shown in Figure 2, capable for a M, the cmos detector of N row, carries out p × q pixel and merges, the image of final output m × n scale, meet p × m=M, q × n=N, p>1, q>1, p≤q, after the signal of detector generation enters column bus, the merging method step of this reading circuit structure is as follows:
The closed all row of step (1) read reset switch, merge reset switch, row are merged electric capacity and merges voltage amplitude on electric capacity with row, disconnected by above switch after reset;
The column bus that 1 to q arranges is connected to the 1st row pixel by step (2), simultaneously the row gating switch of closed 1 to q row, and now the signal of the 1st row 1 to q row pixel is stored on corresponding row merging electric capacity;
The row of closed 1 to the q row of step (3) merge control switch, and the signal that now 1 to q row row merge on electric capacity communicates, and signal value is all equal to the signal average of this row 1 to q row pixel;
The row that step (4) disconnects 1 to q row merge control switch, and the row of closed 1st row merge output switch, and the row row signal merged on electric capacity being transferred to these row merges on electric capacity;
The row that step (5) disconnects the 1st row merge output switch;
Step (6) repeats step (1) to step (5), during each repetition, in step (2), respectively the column bus that 1 to q arranges is connected to the 2nd row, the 3rd row ... until the capable pixel of p, closed 1st arrange respectively in step (4), 2nd row ... until the row of p row merge output switch, step (1) is carried out p time altogether to step (5), the row merging electric capacity that after step terminates, 1 to p arranges stores detector 1 to p respectively capable, the often signal average of row q pixel;
The row of closed 1 to the p-1 row of step (7) merges control switch, keeps p row row to merge control switch and disconnects, and the signal now on 1 to p row merging electric capacity communicates, and signal value is all equal to the signal average of p × q pixel;
Step (8) disconnects all row and merges control switch, and in the output amplifier of 1 to p row, optional row read, and read the signal average that result is p × q pixel, and this p × q pixel merges reading to be completed;
Above step completes the pixel union operation of single merging module (scale p × q), when full frame reads, in same merging rows, n the step (1) merging module completes to step (7) simultaneously, step (8) merges module by the 1 to the n-th and carries out successively, after completing a merging rows, carry out the operation of next merging rows again, until full frames of data reads, obtain the image of m × n scale.
According to Noise Theory, suppose that p × q the picture element signal average participating in merging is S, noise average is N (consideration Main Noise Sources is photon noise), then the average signal-to-noise ratio of this p × q pixel is about:
and utilizing the pixel merging method in the present invention, after p × q potting gum, output signal is still S, but after average, output noise is about
new signal to noise ratio meets:
namely signal to noise ratio improves about
doubly.It is consistent that this result and traditional C CD utilize charge packet to carry out the mode result of pixel merging.
After pixel merges, the output amplifier read-around number of a complete frame imaging by M × reduced to for N time m × n time, frame frequency lifting p × q times.
All row are merged control switch and remain open state with row merging control switch, can close pixel pooling function, imageing sensor normally exports the image of M × N scale.
The invention has the advantages that, in cmos sensor, achieve the pixel pooling function of random scale, work schedule need only be adjusted and just can change merging scale.Meanwhile, the circuit structure that this pixel merges as hardware integration, can be avoided post-digital territory pixel to merge the snr loss brought, and alleviate the rate pressure of detector sense amplifier, significantly can improve working frame frequency in sensor readout circuit.The reading out structure that the present invention proposes also can increase the functions such as correlated-double-sampling, promotes signal to noise ratio further, is applied to job requirement science imaging situations flexibly, and such as imaging spectrometer spectral coverage merges, the fast mode etc. of high resolution camera.
Accompanying drawing illustrates:
Accompanying drawing 1 is reading out structure schematic diagram of the present invention.
Accompanying drawing 2 is pixel merging schematic diagram.
Accompanying drawing 3 is embodiment reading out structure schematic diagram.
Embodiment:
According to summary of the invention, the present embodiment constructs a set of cmos detector pixel and merges reading out structure, and image sensor pixel scale is 1024 × 256, and carry out 2 × 2 pixels and merge, final output scale is 512 × 128.
As shown in Figure 3, detector is totally 256 row, reading out structure comprises 1024 column bus, often row comprise column amplifier (A1 ~ A1024), row gating switch (S1-S1024), row merge electric capacity (CS1 ~ CS1024), row merge control switch (SC1 ~ SC1024), row merge output switch (SR1 ~ SR1024), row merges electric capacity (CG1-CG1024), reset switch (ST1 ~ ST1024), row merges control switch (SG1 ~ SG1024), output amplifier (SG1 ~ SG1024).
When changing reading out structure work, choose pixel to be combined successively by column bus be expert at, merge control switch (SG1 ~ SG1024) by row merging control switch (SC1 ~ SC1024) and row and complete ranks pixel union operation, the signal finally after output amplifier output pixel merges.
In the present embodiment, after the signal that cmos detector produces enters column bus, the merging method step of this circuit reading out structure is as follows:
Step (1) closes ST1 ~ ST1024 and SR1 ~ SR1024, by the voltage amplitude on CS1 ~ CS1024 and CG1 ~ CG1024, is disconnected by above switch after reset;
The column bus that 1st, 2 arrange is connected to the 1st row pixel by step (2), simultaneously closed S1, S2, and now the signal of this row 1,2 row pixel is stored on CS1 and CS2;
Step (3) closes SC1, SC2, and the signal now on CS1 and CS2 communicates, and signal value is all equal to the signal average of this row 1,2 row pixel;
Step (4) disconnects SC1, SC2, and closed SR1, transfers on CG1 by the signal on CS1;
Step (5) disconnects SR1;
Step (6) repeats step (1) to step (5), in step 3 the column bus that the 1st, 2 arrange is connected to the 2nd row pixel, closed SR2 in steps of 5, step terminates the signal average rear CG1 storing detector the 1st row 2 pixels, CG2 stores the signal average of detector the 2nd row 2 pixels;
Step (7) closes SG1, and keep SG2 to disconnect, the signal now on CG1 and CG2 communicates, and signal value is all equal to the signal average of 4 pixels;
Step (8) disconnects SG1, SG2, and at amplifier AF1, an optional reading in AF2, reads the signal average that result is 4 pixels, and these 2 × 2 pixels merge reading to be completed;
Above step completes the pixel union operation of single merging module (scale 2 × 2), when full frame reads, in same merging rows, 512 steps (1) merging module complete to step (8) simultaneously, step 9 merges module by the 1st to the 512nd and carries out successively, after completing a merging rows, carry out the operation of next merging rows again, until full frames of data reads, obtain the image of 512 × 128 scales.
After pixel merges, the output amplifier read-around number of a complete frame imaging reduced to 512 × 128 times by 1024 × 256 times, frame frequency lifting 4 times, and signal to noise ratio promotes and is about 2 times.
Claims (2)
1. cmos image sensor pixel merges a reading circuit structure, comprises column bus, column amplifier, row read reset switch, row gating switch, and row merge electric capacity, row merge control switch, row merge bus, and row merge output switch, and row merges electric capacity, merge reset switch, row merges control switch, and row merges bus and output amplifier, it is characterized in that:
Described column bus is connected to the input of row reading reset switch and column amplifier parallel-connection structure, after column selection opens up the output closing and be connected to row reading reset switch and column amplifier parallel-connection structure, opens up pass be connected on row merging electric capacity by column selection; Row merge bus cross and are connected on the row merging electric capacity of each row, be provided with row and merge control switch for row union operation between every two cross-over connection nodes; Merge reset switch and merge Capacitance parallel connection with row, the input of its parallel-connection structure is connected to the output of row merging control switch, row merges bus cross and is connected on the row merging electric capacity of each row, be provided with a row between every two cross-over connection nodes and merge control switch for row union operation, the output of row merging control switch is connected to the input of output amplifier;
When described cmos image sensor pixel merges reading out structure work, choose pixel to be combined successively by column bus be expert at, merge control switch by row merging control switch and row and complete ranks pixel union operation, finally export the signal after pixel merging through output amplifier.
2. merge a signal transacting reading method for reading circuit structure based on cmos image sensor pixel according to claim 1, it is characterized in that:
Capable for a M, the cmos detector of N row, carry out p × q pixel and merge, finally export the image of m × n scale, p, q, m, n are any positive integer and meet p × m=M, q × n=N, p>1, q>1, p≤q; After the signal of cmos detector generation enters column bus, the merging method step of this reading circuit structure is as follows:
(1) closed all row read reset switch, merge reset switch, row are merged electric capacity and merges voltage amplitude on electric capacity with row, disconnected by above switch after reset;
(2) column bus that 1 to q arranges is connected to the 1st row pixel, simultaneously the row gating switch of closed 1 to q row, now the signal of the 1st row 1 to q row pixel is stored on corresponding row merging electric capacity;
(3) row of closed 1 to q row merge control switch, and the signal that now 1 to q row row merge on electric capacity communicates, and signal value is all equal to the signal average of this row 1 to q row pixel;
(4) row disconnecting 1 to q row merge control switch, and the row of closed 1st row merge output switch, and the row row signal merged on electric capacity being transferred to these row merges on electric capacity;
(5) row disconnecting the 1st row merge output switch;
(6) step (2) is repeated to step (5), during each repetition, in step (2), respectively the column bus that 1-q arranges is connected to the 2nd row, the 3rd row ... until the capable pixel of p, closed 1st arrange respectively in step (4), 2nd row ... until the row of p row merge output switch, step (1) is carried out p time altogether to step (5), the row merging electric capacity that after step terminates, 1 to p arranges stores detector 1 to p respectively capable, the often signal average of row q pixel;
(7) row of closed 1 to p-1 row merges control switch, and the row keeping p to arrange merges control switch and disconnects, and the signal that now 1 to p row merge on electric capacity communicates, and signal value is all equal to the signal average of p × q pixel;
(8) disconnect all row and merge control switch, in the output amplifier of 1 to p row, optional row read, and read the signal average that result is p × q pixel, and this p × q pixel merges reading to be completed;
Above step completes the pixel union operation that single scale is the merging module of p × q, when full frame reads, in same merging rows, n the step (1) merging module completes to step (7) simultaneously, step (8) merges module by the 1 to the n-th and carries out successively, after completing a merging rows, carry out the operation of next merging rows again, until full frames of data reads, obtain the image of m × n scale.
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| CN113612948A (en) * | 2021-08-27 | 2021-11-05 | 锐芯微电子股份有限公司 | Readout circuit and image sensor |
| US11837013B2 (en) | 2020-08-21 | 2023-12-05 | Shenzhen GOODIX Technology Co., Ltd. | Image sensor, fingerprint detection apparatus and electronic device |
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