CN105515553B - A kind of two lines bus floating sampled data receiving circuit - Google Patents
A kind of two lines bus floating sampled data receiving circuit Download PDFInfo
- Publication number
- CN105515553B CN105515553B CN201511001957.9A CN201511001957A CN105515553B CN 105515553 B CN105515553 B CN 105515553B CN 201511001957 A CN201511001957 A CN 201511001957A CN 105515553 B CN105515553 B CN 105515553B
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- circuit
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- 238000007667 floating Methods 0.000 title claims abstract description 24
- 230000009466 transformation Effects 0.000 claims abstract description 10
- 238000005070 sampling Methods 0.000 claims abstract description 5
- 230000008859 change Effects 0.000 claims abstract description 4
- 230000005611 electricity Effects 0.000 claims description 6
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000001514 detection method Methods 0.000 abstract description 5
- 230000008901 benefit Effects 0.000 abstract description 3
- 230000005540 biological transmission Effects 0.000 abstract description 2
- 230000035945 sensitivity Effects 0.000 abstract description 2
- 238000012423 maintenance Methods 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 4
- 238000007493 shaping process Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Nonlinear Science (AREA)
- Dc Digital Transmission (AREA)
- Debugging And Monitoring (AREA)
Abstract
The present invention relates to a kind of two lines bus floating sampled data receiving circuit, floated sample circuit by voltage, signal transformation circuit composition；It is characterized in that voltage floating sample circuit samples to the voltage change on two lines bus, identify low and high level signal, advantage one is to float to sample only to detect variable quantity, even if terminal bus voltage is relatively low, as long as bus voltage changes within setting range, receiving sensitivity can be improved by effective detection, improve data reception capabilities, improve sampling adaptability and reliability；Even if bus voltage is decayed during long-distance transmissions, can also be to the normal detection of signal through overvoltage floating sample circuit and signal transformation circuit.Second, circuit structure is simple, component is few, and cost is low；Three are easy for debugging maintenance.
Description
Technical field
The present invention relates to two line communication technical field, more particularly to a kind of two lines bus floating sampled data receiving circuit.
Background technology
At present on traditional two lines bus equipment apart from power supply farther out or equipment is more, bus pressure drop is different, general two lines bus
Sample fixed voltage distinguish low and high level signal, two lines bus end can not normal detection signal, reliability reduce；General two lines bus
Data receiver circuit structure is more complicated, it is difficult to there is debugging, it is difficult to the shortcomings of safeguarding.
The content of the invention
Goal of the invention：
In order to avoid weak point present in background technology, devise a kind of two lines bus floating sampled data and receive electricity
Road, there are simple in construction, improvement data reception capabilities, improve the two lines bus data receiver electricity of data sampling adaptability and reliability
Road.
Technical scheme：
A kind of two lines bus floating sampled data receiving circuit involved in the present invention, including：Voltage floating sample circuit, letter
Number shaping circuit.
Two lines bus no data is in high level state when transmitting, and the high level charges by resistance R1 to electric capacity C1,
C1 voltage is substantially identical with bus high level voltage, and triode Q1 is in cut-off state, colelctor electrode output low level；Micro- place
Reason device input does not have signal；When bus has data transfer, bus can be drawn as low level, at this moment triode Q1 emitter stages electricity
Pressure is higher than base stage, triode conducting, colelctor electrode output high level.
Further, voltage floating sample circuit signal output part connection signal transformation circuit, passes through signal transformation circuit
It is input to microprocessor.
Advantage and effect：
The present invention compared with background technology, advantage one be float sampling only detect variable quantity, even if terminal bus voltage compared with
It is low, as long as bus voltage change within setting range, can improve receiving sensitivity by effective detection, improve data and connect
Receipts ability, improve sampling adaptability and reliability；Even if bus voltage is decayed during long-distance transmissions, floated through overvoltage and sample electricity
Road and signal transformation circuit also can be to the normal detections of signal；Second, circuit structure is simple, component is few, and cost is low；Third, just
Repaired in debugging.
Brief description of the drawings：
Fig. 1：A kind of two lines bus floating sampled data receiving circuit structure chart.
Embodiment：
The present invention will be further described with reference to the accompanying drawings and detailed description, and the scope of the present invention not only limits to
In the statement of herein below.
A kind of described two lines bus floating sampled data receiving circuit（Fig. 1）, including：Voltage floating sample circuit, signal
Shaping circuit.
Described voltage floating sample circuit：Data input connection resistance R1, R2 from VIN；Another termination capacitors of wherein R1
C1 positive poles and triode Q1 emitter stages；Electric capacity C1 negative poles are grounded, and the resistance R2 other ends are connected with triode Q1 base stages；Triode Q1
Colelctor electrode and resistance R3, electric capacity C2 are connected, and resistance R3 other ends ground connection, the electric capacity C2 other ends are connected with resistance R4 one end as electricity
Press floating sample circuit output end, resistance R4 other ends ground connection；By resistance R1, R2, R3, R4, electric capacity C1, C2, triode Q1 groups
Into voltage floating sample circuit voltage variety in bus is detected.
Described signal transformation circuit：NAND gate U1A pin 1,2 connects voltage floating sample circuit output end, and non-
Door U1A pin 3 connects resistance R5, and the resistance R5 other ends and resistance R6 one end are as signal transformation circuit output end, resistance R6
The other end is grounded；By resistance R5, the signal transformation circuit of R6, NAND gate U1A composition carries out shaping to signal.
It is understood that above with respect to the specific descriptions of the present invention, it is merely to illustrate the present invention and is not limited to this
Technical scheme described by inventive embodiments, it will be understood by those within the art that, still the present invention can be carried out
Modification or equivalent substitution, to reach identical technique effect；As long as meet use needs, all protection scope of the present invention it
Interior, the content not being described in detail in description of the invention belongs to the known technology of those skilled in the art.
Claims (3)
1. a kind of two lines bus floating sampled data receiving circuit, including：Voltage floating sample circuit, signal transformation circuit；
The voltage floating sample circuit includes：Resistance R1, R2, R3, R4, electric capacity C1, C2, triode Q1；Resistance R1, R2 connection
Two lines bus；Another termination capacitor C1 positive poles of wherein R1 and triode Q1 emitter stages；Electric capacity C1 negative poles be grounded, the resistance R2 other ends and
Triode Q1 base stages are connected；Triode Q1 colelctor electrodes and resistance R3, electric capacity C2 are connected, resistance R3 other ends ground connection, and electric capacity C2 is another
One end is connected with resistance R4 one end is used as voltage floating sample circuit output end, resistance R4 other ends ground connection；Voltage, which floats, to be sampled
Circuit detects to voltage variety in bus；
Described signal transformation circuit includes：Resistance R5, R6, NAND gate U1A；NAND gate U1A pin 1,2 connects voltage and floated
Sample circuit output end, NAND gate U1A pin 3 connect resistance R5, and the resistance R5 other ends and resistance R6 one end are whole as signal
Shape circuit output end, resistance R6 other ends ground connection.
2. two lines bus floating sampled data receiving circuit according to claim 1, it is characterised in that：Voltage, which floats, samples electricity
Road samples to the voltage change on two lines bus, identifies low and high level signal.
3. according to claim 1, the two lines bus floating sampled data receiving circuit described in 2, it is characterised in that：Sampling of floating only is examined
Variable quantity is surveyed, even if terminal bus voltage is relatively low, as long as bus voltage change can be examined effectively within setting range
Survey.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511001957.9A CN105515553B (en) | 2015-12-29 | 2015-12-29 | A kind of two lines bus floating sampled data receiving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511001957.9A CN105515553B (en) | 2015-12-29 | 2015-12-29 | A kind of two lines bus floating sampled data receiving circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105515553A CN105515553A (en) | 2016-04-20 |
| CN105515553B true CN105515553B (en) | 2018-02-06 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201511001957.9A Active CN105515553B (en) | 2015-12-29 | 2015-12-29 | A kind of two lines bus floating sampled data receiving circuit |
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| Country | Link |
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| CN (1) | CN105515553B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114374308B (en) * | 2021-12-15 | 2024-06-04 | 北京电子工程总体研究所 | Switch power supply isolation remote sampling circuit and design method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102324179A (en) * | 2011-05-17 | 2012-01-18 | 福建省万华电子科技有限公司 | Two-bus communication interface circuit |
| CN202189462U (en) * | 2011-09-15 | 2012-04-11 | 长沙威胜信息技术有限公司 | Concentrator M-bus main machine |
| CN202978888U (en) * | 2012-11-27 | 2013-06-05 | 威海凯瑞电气技术有限公司 | MCU level and two-wire system communication conversion circuit |
| CN205283502U (en) * | 2015-12-29 | 2016-06-01 | 踪念品 | Two buses sample data receiving circuit that floats |
-
2015
- 2015-12-29 CN CN201511001957.9A patent/CN105515553B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102324179A (en) * | 2011-05-17 | 2012-01-18 | 福建省万华电子科技有限公司 | Two-bus communication interface circuit |
| CN202189462U (en) * | 2011-09-15 | 2012-04-11 | 长沙威胜信息技术有限公司 | Concentrator M-bus main machine |
| CN202978888U (en) * | 2012-11-27 | 2013-06-05 | 威海凯瑞电气技术有限公司 | MCU level and two-wire system communication conversion circuit |
| CN205283502U (en) * | 2015-12-29 | 2016-06-01 | 踪念品 | Two buses sample data receiving circuit that floats |
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| Publication number | Publication date |
|---|---|
| CN105515553A (en) | 2016-04-20 |
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Effective date of registration: 20191218 Address after: 110136 Liaoning city of Shenyang province Shenbei New Area Shen road No. 49 Patentee after: Shenyang Wangyun Technology Co., Ltd Address before: College of information Shenyang Institute of Engineering No. 18 Shenbei New Area Road, Shenyang City, Liaoning province 110136 Puchang Patentee before: Trace products |