CN105515553A - Two-bus floating sampling data receiving circuit - Google Patents
Two-bus floating sampling data receiving circuit Download PDFInfo
- Publication number
- CN105515553A CN105515553A CN201511001957.9A CN201511001957A CN105515553A CN 105515553 A CN105515553 A CN 105515553A CN 201511001957 A CN201511001957 A CN 201511001957A CN 105515553 A CN105515553 A CN 105515553A
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- CN
- China
- Prior art keywords
- voltage
- resistance
- bus
- circuit
- floats
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- Granted
Links
- 238000005070 sampling Methods 0.000 title claims abstract description 15
- 238000007667 floating Methods 0.000 title claims abstract description 10
- 230000009466 transformation Effects 0.000 claims description 10
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000007493 shaping process Methods 0.000 abstract description 4
- 238000012423 maintenance Methods 0.000 abstract description 3
- 230000005540 biological transmission Effects 0.000 abstract description 2
- 230000035945 sensitivity Effects 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 4
- 238000004891 communication Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Nonlinear Science (AREA)
- Dc Digital Transmission (AREA)
- Debugging And Monitoring (AREA)
Abstract
The invention relates to a two-bus floating sampling data receiving circuit which is composed of a voltage floating sampling circuit and a signal shaping circuit. The two-bus floating sampling data receiving circuit is characterized in that the voltage floating sampling circuit performs sampling on voltage changes on two buses for identifying high level signals and low level signals. The two-bus floating sampling data receiving circuit is advantageous in that only change amounts are detected in floating sampling, and even a bus end voltage is relatively low, the bus end voltage can be effectively detected as long as the bus voltage change is in a preset range, thereby improving receiving sensitivity, improving data receiving capability and improving sampling adaptability and reliability; even a bus voltage reduces in long-distance transmission, the signal can be normally detected through the voltage floating sampling circuit and the signal shaping circuit; simple circuit structure, small number of components and low cost are realized; and furthermore easy debugging and easy maintenance are realized.
Description
Technical field
The present invention relates to two line communication technical field, particularly relate to
a kind of two lines bus floats sampled data receiving circuit.
Background technology
On two lines bus traditional at present, equipment distance power supply is comparatively far away or equipment is more, and bus pressure drop is different, and general two lines bus sampling fixed voltage distinguishes low and high level signal, and two lines bus end cannot normal detection signal, reliability reduction; , there is debug difficulties, be difficult to the shortcomings such as maintenance in general two lines bus data receiver circuit complicated structure.
Summary of the invention
Goal of the invention:
The weak point existed in background technology, devises
a kind of two lines bus floats sampled data receiving circuit, there is structure simple, improve data reception capabilities, improve the two lines bus data receiver circuit of data sampling adaptability and reliability.
Technical scheme:
Involved in the present invention
a kind of two lines bus floats sampled data receiving circuit, comprising: voltage floats sample circuit, signal transformation circuit.
Two lines bus is in high level state without during transfer of data, and this high level charges to electric capacity C1 through resistance R1, and the voltage of C1 is substantially identical with bus high level voltage, and triode Q1 is in cut-off state, collector electrode output low level; Microprocessor input does not have signal; When bus has transfer of data, bus can be drawn as low level, and at this moment triode Q1 emitter voltage is higher than base stage, triode conducting, and collector electrode exports high level.
Further, voltage floats sample circuit signal output part connection signal shaping circuit, is input to microprocessor by signal transformation circuit.
Advantage and effect:
The present invention is compared with background technology, and advantage one is only change detected amount of sampling of floating, even if terminal bus voltage is lower, as long as bus voltage change, within setting range, can effectively be detected, improve receiving sensitivity, improve data reception capabilities, improve sampling adaptability and reliability; Even if bus voltage decay during long-distance transmissions, also normally can detect signal through float sample circuit and signal transformation circuit of overvoltage; Two is that circuit structure is simple, and components and parts are few, and cost is low; Three is be convenient to debugging maintenance.
accompanying drawingillustrate:
fig. 1:
a kind of two lines bus floats sampled data receiving circuitstructure
figure.
Embodiment:
Below in conjunction with
accompanying drawingthe present invention will be further described with embodiment, and scope is not only confined to the statement of following content.
Described
a kind of two lines bus floats sampled data receiving circuit(
fig. 1), comprising: voltage floats sample circuit, signal transformation circuit.
Described voltage floats sample circuit: data input contact resistance R1 from VIN, R2; Wherein another termination capacitor C1 positive pole of R1 and triode Q1 emitter; Electric capacity C1 minus earth, the resistance R2 other end is connected with triode Q1 base stage; Triode Q1 collector electrode and resistance R3, electric capacity C2 is connected, resistance R3 other end ground connection, and the electric capacity C2 other end is connected with resistance R4 one end and floats sample circuit output as voltage, resistance R4 other end ground connection; By resistance R1, R2, R3, R4, electric capacity C1, C2, the voltage sample circuit that floats that triode Q1 forms detects voltage variety in bus.
The pin 1,2 of described signal transformation circuit: NAND gate U1A connects voltage and to float the pin 3 contact resistance R5 of sample circuit output, NAND gate U1A, the resistance R5 other end and resistance R6 one end as signal transformation circuit output, resistance R6 other end ground connection; The signal transformation circuit be made up of resistance R5, R6, NAND gate U1A carries out shaping to signal.
Be understandable that, above about specific descriptions of the present invention, the technical scheme described by the embodiment of the present invention is only not limited to for illustration of the present invention, those of ordinary skill in the art is to be understood that, still can modify to the present invention or equivalent replacement, to reach identical technique effect; Use needs as long as meet, all within protection scope of the present invention, the content be not described in detail in specification of the present invention belongs to the known technology of those skilled in the art.
Claims (3)
1. two lines bus floats a sampled data receiving circuit, comprising: voltage floats sample circuit, signal transformation circuit;
The described voltage sample circuit that floats comprises: resistance R1, R2, R3, R4, electric capacity C1, C2, triode Q1; Resistance R1, R2 connect two lines bus; Wherein another termination capacitor C1 positive pole of R1 and triode Q1 emitter; Electric capacity C1 minus earth, the resistance R2 other end is connected with triode Q1 base stage; Triode Q1 collector electrode and resistance R3, electric capacity C2 is connected, resistance R3 other end ground connection, and the electric capacity C2 other end is connected with resistance R4 one end and floats sample circuit output as voltage, resistance R4 other end ground connection;
Described signal transformation circuit comprises: resistance R5, R6, NAND gate U1A; The pin 1,2 of NAND gate U1A connects voltage and to float the pin 3 contact resistance R5 of sample circuit output, NAND gate U1A, the resistance R5 other end and resistance R6 one end as signal transformation circuit output, resistance R6 other end ground connection.
2. two lines bus according to claim 1 floats sampled data receiving circuit, it is characterized in that: the voltage sample circuit that floats is sampled to the change in voltage on two lines bus, identifies low and high level signal.
3. according to claim 1, the two lines bus described in 2 floats sampled data receiving circuit, it is characterized in that: floating sampling is change detected amount only, even if terminal bus voltage is lower, as long as bus voltage change is within setting range, can effectively be detected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511001957.9A CN105515553B (en) | 2015-12-29 | 2015-12-29 | A kind of two lines bus floating sampled data receiving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511001957.9A CN105515553B (en) | 2015-12-29 | 2015-12-29 | A kind of two lines bus floating sampled data receiving circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105515553A true CN105515553A (en) | 2016-04-20 |
| CN105515553B CN105515553B (en) | 2018-02-06 |
Family
ID=55723276
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201511001957.9A Active CN105515553B (en) | 2015-12-29 | 2015-12-29 | A kind of two lines bus floating sampled data receiving circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105515553B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114374308A (en) * | 2021-12-15 | 2022-04-19 | 北京电子工程总体研究所 | Switch power supply isolation remote acquisition circuit and design method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102324179A (en) * | 2011-05-17 | 2012-01-18 | 福建省万华电子科技有限公司 | Two-bus communication interface circuit |
| CN202189462U (en) * | 2011-09-15 | 2012-04-11 | 长沙威胜信息技术有限公司 | Concentrator M-bus main machine |
| CN202978888U (en) * | 2012-11-27 | 2013-06-05 | 威海凯瑞电气技术有限公司 | MCU level and two-wire system communication conversion circuit |
| CN205283502U (en) * | 2015-12-29 | 2016-06-01 | 踪念品 | Two buses sample data receiving circuit that floats |
-
2015
- 2015-12-29 CN CN201511001957.9A patent/CN105515553B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102324179A (en) * | 2011-05-17 | 2012-01-18 | 福建省万华电子科技有限公司 | Two-bus communication interface circuit |
| CN202189462U (en) * | 2011-09-15 | 2012-04-11 | 长沙威胜信息技术有限公司 | Concentrator M-bus main machine |
| CN202978888U (en) * | 2012-11-27 | 2013-06-05 | 威海凯瑞电气技术有限公司 | MCU level and two-wire system communication conversion circuit |
| CN205283502U (en) * | 2015-12-29 | 2016-06-01 | 踪念品 | Two buses sample data receiving circuit that floats |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114374308A (en) * | 2021-12-15 | 2022-04-19 | 北京电子工程总体研究所 | Switch power supply isolation remote acquisition circuit and design method thereof |
| CN114374308B (en) * | 2021-12-15 | 2024-06-04 | 北京电子工程总体研究所 | Switch power supply isolation remote sampling circuit and design method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105515553B (en) | 2018-02-06 |
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Effective date of registration: 20191218 Address after: 110136 Liaoning city of Shenyang province Shenbei New Area Shen road No. 49 Patentee after: Shenyang Wangyun Technology Co., Ltd Address before: College of information Shenyang Institute of Engineering No. 18 Shenbei New Area Road, Shenyang City, Liaoning province 110136 Puchang Patentee before: Trace products |