CN105513188A - Linear alarm voice recognition access control system based on filtering and amplifying circuit - Google Patents

Linear alarm voice recognition access control system based on filtering and amplifying circuit Download PDF

Info

Publication number
CN105513188A
CN105513188A CN201510961543.4A CN201510961543A CN105513188A CN 105513188 A CN105513188 A CN 105513188A CN 201510961543 A CN201510961543 A CN 201510961543A CN 105513188 A CN105513188 A CN 105513188A
Authority
CN
China
Prior art keywords
pole
amplifier
triode
resistance
field effect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201510961543.4A
Other languages
Chinese (zh)
Inventor
汤福琼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Kanuoyuan Technology Co Ltd
Original Assignee
Chengdu Kanuoyuan Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Kanuoyuan Technology Co Ltd filed Critical Chengdu Kanuoyuan Technology Co Ltd
Priority to CN201510961543.4A priority Critical patent/CN105513188A/en
Publication of CN105513188A publication Critical patent/CN105513188A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07CTIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C9/00Individual registration on entry or exit
    • G07C9/30Individual registration on entry or exit not involving the use of a pass
    • G07C9/32Individual registration on entry or exit not involving the use of a pass in combination with an identity check
    • G07C9/37Individual registration on entry or exit not involving the use of a pass in combination with an identity check using biometric data, e.g. fingerprints, iris scans or voice recognition

Landscapes

  • Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a linear alarm voice recognition access control system based on a filtering and amplifying circuit. The linear alarm voice recognition access control system is mainly composed of a central processing unit, a linear driving circuit, a display module, a storage, an A/D switching circuit, an access control driving circuit, an access control connected with the access control driving circuit, an alarm module connected with the linear driving circuit and a voice sensor connected with the A/D switching circuit, wherein the linear driving circuit, the display module, the storage, the A/D switching circuit and the access control driving circuit are connected with the central processing unit. The linear alarm voice recognition access control system is characterized in that the filtering and amplifying circuit is further connected between the central processing unit and the A/D switching circuit in series. According to the linear alarm voice recognition access control system based on the filtering and amplifying circuit, the access control is unlocked through voice recognition, and the safety and the stability of access control management are improved. Meanwhile, the access control is not like a traditional lock which needs to be unlocked through a key, and use is more convenient. The filtering and amplifying circuit is arranged, filtering processing can be conducted on an interference signal in an electrical signal, amplification can be conducted on the filtered electrical signal, and therefore the recognition precision of the linear alarm voice recognition access control system is improved.

Description

A kind of linear alarm voice identification gate control system based on filter amplification circuit
Technical field
The present invention relates to a kind of gate control system, specifically refer to a kind of linear alarm voice identification gate control system based on filter amplification circuit.
Background technology
Along with developing rapidly of electronic information technology, conventional door lock is constantly to high-tech, intelligent direction development, progress in the life of people with the intelligent identifying system of living things feature recognition in conjunction with conventional lock, wherein this intelligent identifying system is applied to entrance guard management and attendance management by increasing enterprise, as IC-card recognition system, but in actual practicality, the safety and stability of IC-card identification can not well be ensured, such as IC-card is easy to lose or used, and these labile factors all can make system there is certain potential safety hazard.
Summary of the invention
The object of the invention is to overcome the not high defect of existing gate control system safety and stability, a kind of linear alarm voice identification gate control system based on filter amplification circuit is provided.
Object of the present invention is achieved through the following technical solutions: a kind of linear alarm voice identification gate control system based on filter amplification circuit, primarily of central processing unit, the linear drive circuit be connected with central processing unit respectively, display module, storer, A/D change-over circuit and gate inhibition's driving circuit, the gate inhibition be connected with gate inhibition's driving circuit, the alarm module be connected with linear drive circuit, and the sound transducer be connected with A/D change-over circuit forms; In order to better implement the present invention, the present invention is also serially connected with filter amplification circuit between central processing unit and A/D change-over circuit.
Further, described filter amplification circuit is by amplifier P3, amplifier P4, amplifier P5, triode VT5, triode VT6, negative pole is connected with the positive pole of amplifier P3, positive pole then forms the electric capacity C6 of the input end of this filter amplification circuit after resistance R17, positive pole is connected with the base stage of triode VT5 after resistance R18, the electric capacity C7 that negative pole is then connected with the output terminal of amplifier P3, be serially connected in the resistance R21 between the output terminal of amplifier P3 and the positive pole of amplifier P5, be serially connected in the resistance R23 between the positive pole of amplifier P5 and output terminal, be serially connected in the resistance R22 between the output terminal of amplifier P4 and the output terminal of amplifier P5, be serially connected in the resistance R20 between the negative pole of amplifier P4 and the emitter of triode VT6, be serially connected in the resistance R19 between the collector of triode VT5 and the collector of triode VT6, N pole is connected with the collector of triode VT5, the diode D9 of P pole ground connection, and positive pole is connected with the collector of triode VT6, the electric capacity C8 of minus earth forms, the positive pole of described amplifier P4 is connected with the emitter of triode VT5, and its output terminal is then connected with the negative pole of amplifier P3, the base stage of described triode VT6 is connected with the collector of triode VT5, and its emitter is then connected with the negative pole of amplifier P5, the output terminal of described amplifier P5 forms the output terminal of this filter amplification circuit and is connected with central processing unit, the input end of described filter amplification circuit is then connected with the output terminal of A/D change-over circuit.
Described linear drive circuit is by amplifier P1, amplifier P2, field effect transistor MOS3, field effect transistor MOS4, field effect transistor MOS5, N pole is connected with the negative pole of amplifier P2 after resistance R12, P pole then forms the diode D8 of the input end of this linear drive circuit, N pole is connected with the P pole of diode D8 after resistance R10, the voltage stabilizing diode D7 of P pole ground connection, be serially connected in the resistance R11 between the N pole of diode D8 and the drain electrode of field effect transistor MOS3, one end is connected with the positive pole of amplifier P2, the resistance R13 that the other end is then connected with the negative pole of amplifier P1 after resistance R14, positive pole is connected with the negative pole of amplifier P2, the electric capacity C5 that negative pole is then connected with the drain electrode of field effect transistor MOS5, be serially connected in the resistance R16 between the output terminal of amplifier P2 and the grid of field effect transistor MOS5, and the resistance R15 be serially connected between the grid of field effect transistor MOS4 and the output terminal of amplifier P2 forms, the source ground of described field effect transistor MOS3, its drain electrode is then connected with the positive pole of amplifier P1, and its grid is then connected with the output terminal of amplifier P1, ground connection while the source electrode of described field effect transistor MOS5 is connected with the negative pole of amplifier P1, the grounded drain of described field effect transistor MOS4, its source electrode is then connected with the positive pole of amplifier P2, the output terminal of described amplifier P2 then forms the output terminal of this linear drive circuit and is connected with alarm module, the input end of described linear drive circuit is then connected with central processing unit.
Described gate inhibition's driving circuit is by gate driver circuit, and the delay circuit be connected with gate driver circuit forms.
Described gate driver circuit is by triode VT2, triode VT3, field effect transistor MOS1, field effect transistor MOS2, transformer T, negative pole is connected with the base stage of triode VT2 after not gate A2 through not gate A1 in turn, positive pole then forms the electric capacity C1 of the input end of this gate inhibition's driving circuit, resistance R7 between the Same Name of Ends being serially connected in the collector of triode VT2 and the former limit telefault of transformer T, P pole is connected with the drain electrode of field effect transistor MOS1, N pole meets the diode D3 of 12V voltage while being then connected with the Same Name of Ends of the former limit telefault of transformer T, N pole is connected with the non-same polarity of the former limit telefault of transformer T, the diode D4 that P pole is then connected with the source electrode of field effect MOS1, N pole is connected with the non-same polarity of the secondary inductance coil of transformer T, the voltage stabilizing diode D5 that P pole is then connected with the Same Name of Ends of the secondary inductance coil of transformer T, be serially connected in the resistance R9 between the grid of field effect transistor MOS2 and the N pole of voltage stabilizing diode D5, and P pole is connected with the N pole of voltage stabilizing diode D5, the voltage stabilizing diode D6 that N pole then forms the output terminal of this gate inhibition's driving circuit jointly with the source electrode of field effect transistor MOS2 forms, the base stage of described triode VT2 is connected with the base stage of triode VT3, and its emitter is then connected with the emitter of triode VT3, the base stage of described triode VT3 is all connected with delay circuit with collector, and its emitter is then connected with the grid of field effect MOS1, the source ground of described field effect transistor MOS1, the drain electrode of described field effect transistor MOS2 is connected with the P pole of voltage stabilizing diode D5, and its source electrode is then connected with delay circuit, the N pole of described voltage stabilizing diode D6 is also connected with delay circuit.
Described delay circuit by time base chip U1, triode VT1, triode VT4, amplifier P, P pole is connected with the emitter of triode VT1, the diode D1 that N pole is then connected with the base stage of triode VT2 after resistance R1, be serially connected in the resistance R3 between the base stage of triode VT2 and the LX pin of Shi Ji chip U1, be serially connected in the resistance R2 between the base stage of triode VT1 and the NC pin of Shi Ji chip U1, N pole is connected with the negative pole of amplifier P, the diode D2 that P pole is then connected with the collector of triode VT1, positive pole with time base chip U1 DIM pin be connected, the electric capacity C2 that negative pole is then connected with the P pole of diode D2, positive pole with time base chip U1 VSSD pin be connected, the electric capacity C3 that negative pole is then connected with the P pole of diode D2, be serially connected in the resistance R6 between the positive pole of amplifier P and the CSN pin of Shi Ji chip U1, positive pole is connected with the collector of triode VT4, the electric capacity C4 that negative pole is then connected with the output terminal of amplifier P, be serially connected in the resistance R5 between the base stage of triode VT4 and the VIN pin of Shi Ji chip U1, be serially connected in the resistance R4 between the base stage of triode VT4 and the VCC pin of Shi Ji chip U1, and the resistance R8 be serially connected between the emitter of triode VT4 and the N pole of voltage stabilizing diode D6 forms, time described, the DIM pin of base chip U1 is connected with the base stage of triode VT1, and its VSSM pin is connected with the negative pole of amplifier P, the base stage of described triode VT4 is connected with the collector of triode VT3, the described output terminal of amplifier P is connected with the source electrode of field effect transistor MOS2.
Time described, base chip U1 is QX5243 type integrated chip.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) the present invention is by opening gate inhibition to speech recognition, improves the safety and stability of entrance guard management, and meanwhile, the present invention does not need key need be used to open as traditional lockset, uses convenient.
(2) the present invention is provided with linear drive circuit, and what it can be linear drives alarm module, avoids alarm module to occur the existing picture of intermittently reporting to the police.
(3) the present invention is provided with filter amplification circuit, and it can carry out filtering process to the undesired signal in electric signal, and amplifies filtered electric signal, thus improves accuracy of identification of the present invention.
Accompanying drawing explanation
Fig. 1 is one-piece construction block diagram of the present invention.
Fig. 2 is the structural drawing of gate inhibition's driving circuit of the present invention.
Fig. 3 is the structural drawing of linear drive circuit of the present invention.
Fig. 4 is the structural drawing of filter amplification circuit of the present invention.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
As shown in Figure 1, a kind of linear alarm voice identification gate control system based on filter amplification circuit of the present invention, primarily of central processing unit, the linear drive circuit be connected with central processing unit respectively, display module, storer, filter amplification circuit and gate inhibition's driving circuit, the gate inhibition be connected with gate inhibition's driving circuit, the alarm module be connected with linear drive circuit, the A/D change-over circuit be connected with filter amplification circuit, and the sound transducer be connected with A/D change-over circuit forms.
This sound transducer is arranged near gate inhibition, for collected sound signal.A/D change-over circuit is used for that the simulating signal that sound transducer exports is converted to electric signal and exports to filter amplification circuit.This filter amplification circuit can carry out filtering process to the undesired signal in electric signal, and exports to central processing unit after amplifying filtered electric signal.This central processing unit is for controlling the running of whole system, and its SPCE061A single-chip microcomputer preferentially adopting Taiwan Ling Yang company to produce realizes.Storer is then for storing the voice signal that can pass in and out gate inhibition personnel in advance; Linear drive circuit is for driving alarm module work.Alarm modules adopts traditional hummer, for voice signal coupling not pair time sound the alarm.Display module is then for simultaneous display recognition result, and it uses display to realize, gate inhibition's driving circuit opening then for access control.The IOA2 pin of this SPCE061A single-chip microcomputer is connected with the output terminal of filter amplification circuit, its IOA1 pin is then connected with the input end of gate inhibition's driving circuit, its IOA6 pin is then connected with storer, its IOA5 pin is then connected with display module, and its DAC1 pin is then connected with the input end of linear drive circuit.Described A/D change-over circuit and storer all adopt prior art to realize.
As shown in Figure 2, this gate inhibition's driving circuit is by gate driver circuit, and the delay circuit be connected with gate driver circuit forms.
Described gate driver circuit is by triode VT2, and triode VT3, field effect transistor MOS1, field effect transistor MOS2, transformer T, resistance R7, resistance R9, electric capacity C1, not gate A1, not gate A2, diode D3, diode D4, voltage stabilizing diode D5 and voltage stabilizing diode D6 form.
During connection, the forward end of the negative pole Sheffer stroke gate A1 of electric capacity C1 is connected, its positive pole then forms the input end of this gate inhibition's driving circuit and is connected with central processing unit.The forward end of the backward end of described not gate A1 then Sheffer stroke gate A2 is connected.The backward end of described not gate A2 is then connected with the base stage of triode VT2.Resistance R7 is serially connected between the Same Name of Ends of the collector of triode VT2 and the former limit telefault of transformer T.The P pole of diode D3 is connected with the drain electrode of field effect transistor MOS1, its N pole connects 12V voltage while being then connected with the Same Name of Ends of the former limit telefault of transformer T.The N pole of diode D4 is connected with the non-same polarity of the former limit telefault of transformer T, its P pole is then connected with the source electrode of field effect MOS1.The N pole of voltage stabilizing diode D5 is connected with the non-same polarity of the secondary inductance coil of transformer T, its P pole is then connected with the Same Name of Ends of the secondary inductance coil of transformer T.Resistance R9 is serially connected between the grid of field effect transistor MOS2 and the N pole of voltage stabilizing diode D5.The P pole of voltage stabilizing diode D6 is connected with the N pole of voltage stabilizing diode D5, its N pole then jointly forms the output terminal of this gate inhibition's driving circuit with the source electrode of field effect transistor MOS2 and is connected with gate inhibition.
Meanwhile, the base stage of described triode VT2 is connected with the base stage of triode VT3, and its emitter is then connected with the emitter of triode VT3.The base stage of described triode VT3 is all connected with delay circuit with collector, and its emitter is then connected with the grid of field effect MOS1.The source ground of described field effect transistor MOS1.The drain electrode of described field effect transistor MOS2 is connected with the P pole of voltage stabilizing diode D5, and its source electrode is then connected with delay circuit.The N pole of described voltage stabilizing diode D6 is also connected with delay circuit.
In addition, described delay circuit by time base chip U1, triode VT1, triode VT4, amplifier P, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R8, electric capacity C2, electric capacity C3, electric capacity C4, diode D1 and diode D2 form.
During connection, the P pole of diode D1 is connected with the emitter of triode VT1, its N pole is then connected with the base stage of triode VT2 after resistance R1.Resistance R3 is serially connected between the base stage of triode VT2 and the LX pin of Shi Ji chip U1.Resistance R2 is serially connected between the base stage of triode VT1 and the NC pin of Shi Ji chip U1.The N pole of diode D2 is connected with the negative pole of amplifier P, its P pole is then connected with the collector of triode VT1.The positive pole of electric capacity C2 with time base chip U1 DIM pin is connected, its negative pole is then connected with the P pole of diode D2.The positive pole of electric capacity C3 with time base chip U1 VSSD pin is connected, its negative pole is then connected with the P pole of diode D2.Resistance R6 is serially connected between the positive pole of amplifier P and the CSN pin of Shi Ji chip U1.The positive pole of electric capacity C4 is connected with the collector of triode VT4, its negative pole is then connected with the output terminal of amplifier P.Resistance R5 is serially connected between the base stage of triode VT4 and the VIN pin of Shi Ji chip U1.Resistance R4 is serially connected between the base stage of triode VT4 and the VCC pin of Shi Ji chip U1.Resistance R8 is serially connected between the emitter of triode VT4 and the N pole of voltage stabilizing diode D6.
Time described, the DIM pin of base chip U1 is connected with the base stage of triode VT1, and its VSSM pin is connected with the negative pole of amplifier P.The base stage of described triode VT4 is connected with the collector of triode VT3.The described output terminal of amplifier P is connected with the source electrode of field effect transistor MOS2.
When central processing unit exports control signal to gate inhibition's driving circuit, the driving switch circuit turn-on be made up of not gate A1, not gate A2, triode VT2, triode VT3, diode D3 and field effect transistor MOS1, and signal is opened through transformer T rear drive gate inhibition, simultaneously, the collector output voltage of triode VT3 to time base chip U1, electric capacity C4 then charges rapidly.When central processing unit stops outputing signal to gate inhibition's driving circuit, electric capacity C4 starts generating, makes gate inhibition stay open state, so that people can pass through gate inhibition smoothly, when gate inhibition after electric capacity C4 discharge off closes.In order to reach better implementation result, time described, base chip U1 is preferably QX5243 type integrated chip and realizes.
As shown in Figure 3, this linear drive circuit by amplifier P1, amplifier P2, field effect transistor MOS3, field effect transistor MOS4, field effect transistor MOS5, resistance R10, resistance R11, resistance R12, resistance R13, resistance R14, resistance R15, resistance R16, diode D7, diode D8 and electric capacity C5 form.
During connection, the N pole of diode D8 is connected with the negative pole of amplifier P2 after resistance R12, its P pole then forms the input end of this linear drive circuit and is connected with central processing unit.The N pole of voltage stabilizing diode D7 is connected with the P pole of diode D8 after resistance R10, its P pole ground connection.Resistance R11 is serially connected between the N pole of diode D8 and the drain electrode of field effect transistor MOS3.One end of resistance R13 is connected with the positive pole of amplifier P2, its other end is then connected with the negative pole of amplifier P1 after resistance R14.The positive pole of electric capacity C5 is connected with the negative pole of amplifier P2, its negative pole is then connected with the drain electrode of field effect transistor MOS5.Between the output terminal that resistance R16 is serially connected in amplifier P2 and the grid of field effect transistor MOS5.Resistance R15 is serially connected between the grid of field effect transistor MOS4 and the output terminal of amplifier P2.
Meanwhile, the source ground of described field effect transistor MOS3, its drain electrode is then connected with the positive pole of amplifier P1, and its grid is then connected with the output terminal of amplifier P1.Ground connection while the source electrode of described field effect transistor MOS5 is connected with the negative pole of amplifier P1.The grounded drain of described field effect transistor MOS4, its source electrode is then connected with the positive pole of amplifier P2.The output terminal of described amplifier P2 then forms the output terminal of this linear drive circuit and is connected with alarm module.This linear drive circuit can be linear alarm module is driven, avoid alarm module to occur the existing picture of intermittently reporting to the police.
As shown in Figure 4, described filter amplification circuit by amplifier P3, amplifier P4, amplifier P5, triode VT5, triode VT6, resistance R17, resistance R18, resistance R19, resistance R20, resistance R21, resistance R22, resistance R23, diode D9, electric capacity C6, electric capacity C7 and electric capacity C8 form.
During connection, the negative pole of electric capacity C6 is connected with the positive pole of amplifier P3, its positive pole then forms the input end of this filter amplification circuit and is connected with the output terminal of A/D change-over circuit after resistance R17.The positive pole of electric capacity C7 is connected with the base stage of triode VT5 after resistance R18, its negative pole is then connected with the output terminal of amplifier P3.Resistance R21 is serially connected between the output terminal of amplifier P3 and the positive pole of amplifier P5.Between the positive pole that resistance R23 is serially connected in amplifier P5 and output terminal.Resistance R22 is serially connected between the output terminal of amplifier P4 and the output terminal of amplifier P5.Resistance R20 is serially connected between the negative pole of amplifier P4 and the emitter of triode VT6.Resistance R19 is serially connected between the collector of triode VT5 and the collector of triode VT6.The N pole of diode D9 is connected with the collector of triode VT5, its P pole ground connection.The positive pole of electric capacity C8 is connected with the collector of triode VT6, its minus earth.
Meanwhile, the positive pole of described amplifier P4 is connected with the emitter of triode VT5, and its output terminal is then connected with the negative pole of amplifier P3.The base stage of described triode VT6 is connected with the collector of triode VT5, and its emitter is then connected with the negative pole of amplifier P5.The output terminal of described amplifier P5 forms the output terminal of this filter amplification circuit and is connected with central processing unit.This filter amplification circuit can carry out filtering process to the undesired signal in electric signal, and amplifies filtered electric signal, thus improves accuracy of identification of the present invention.
During work, the personnel of turnover are needed to send signal to sound transducer, this sound transducer then gathers voice signal and sends to A/D change-over circuit, this A/D change-over circuit sends to filter amplification circuit after voice analog signal is converted to electric signal, this filter amplification circuit carries out filtering process to the undesired signal in electric signal, and amplifies filtered electric signal and send to central processing unit.This central processing unit mates the signal of input with the signal stored in advance in storer, if it fails to match, central processing unit then sends command signal to linear drive circuit, and this linear drive circuit then drives alarm module that alarm module is reported to the police.If the match is successful, central processing unit then sends command signal to gate inhibition's driving circuit, and this gate inhibition's driving circuit then access control is opened.The matching result of this display module then display simultaneously.
As mentioned above, just well the present invention can be implemented.

Claims (7)

1. the linear alarm voice identification gate control system based on filter amplification circuit, primarily of central processing unit, the linear drive circuit be connected with central processing unit respectively, display module, storer, A/D change-over circuit and gate inhibition's driving circuit, the gate inhibition be connected with gate inhibition's driving circuit, the alarm module be connected with linear drive circuit, and the sound transducer be connected with A/D change-over circuit forms; It is characterized in that, between central processing unit and A/D change-over circuit, be also serially connected with filter amplification circuit.
2. a kind of linear alarm voice identification gate control system based on filter amplification circuit according to claim 1, it is characterized in that: described filter amplification circuit is by amplifier P3, amplifier P4, amplifier P5, triode VT5, triode VT6, negative pole is connected with the positive pole of amplifier P3, positive pole then forms the electric capacity C6 of the input end of this filter amplification circuit after resistance R17, positive pole is connected with the base stage of triode VT5 after resistance R18, the electric capacity C7 that negative pole is then connected with the output terminal of amplifier P3, be serially connected in the resistance R21 between the output terminal of amplifier P3 and the positive pole of amplifier P5, be serially connected in the resistance R23 between the positive pole of amplifier P5 and output terminal, be serially connected in the resistance R22 between the output terminal of amplifier P4 and the output terminal of amplifier P5, be serially connected in the resistance R20 between the negative pole of amplifier P4 and the emitter of triode VT6, be serially connected in the resistance R19 between the collector of triode VT5 and the collector of triode VT6, N pole is connected with the collector of triode VT5, the diode D9 of P pole ground connection, and positive pole is connected with the collector of triode VT6, the electric capacity C8 of minus earth forms, the positive pole of described amplifier P4 is connected with the emitter of triode VT5, and its output terminal is then connected with the negative pole of amplifier P3, the base stage of described triode VT6 is connected with the collector of triode VT5, and its emitter is then connected with the negative pole of amplifier P5, the output terminal of described amplifier P5 forms the output terminal of this filter amplification circuit and is connected with central processing unit, the input end of described filter amplification circuit is then connected with the output terminal of A/D change-over circuit.
3. a kind of linear alarm voice identification gate control system based on filter amplification circuit according to claim 2, it is characterized in that: described linear drive circuit is by amplifier P1, amplifier P2, field effect transistor MOS3, field effect transistor MOS4, field effect transistor MOS5, N pole is connected with the negative pole of amplifier P2 after resistance R12, P pole then forms the diode D8 of the input end of this linear drive circuit, N pole is connected with the P pole of diode D8 after resistance R10, the voltage stabilizing diode D7 of P pole ground connection, be serially connected in the resistance R11 between the N pole of diode D8 and the drain electrode of field effect transistor MOS3, one end is connected with the positive pole of amplifier P2, the resistance R13 that the other end is then connected with the negative pole of amplifier P1 after resistance R14, positive pole is connected with the negative pole of amplifier P2, the electric capacity C5 that negative pole is then connected with the drain electrode of field effect transistor MOS5, be serially connected in the resistance R16 between the output terminal of amplifier P2 and the grid of field effect transistor MOS5, and the resistance R15 be serially connected between the grid of field effect transistor MOS4 and the output terminal of amplifier P2 forms, the source ground of described field effect transistor MOS3, its drain electrode is then connected with the positive pole of amplifier P1, and its grid is then connected with the output terminal of amplifier P1, ground connection while the source electrode of described field effect transistor MOS5 is connected with the negative pole of amplifier P1, the grounded drain of described field effect transistor MOS4, its source electrode is then connected with the positive pole of amplifier P2, the output terminal of described amplifier P2 then forms the output terminal of this linear drive circuit and is connected with alarm module, the input end of described linear drive circuit is then connected with central processing unit.
4. a kind of linear alarm voice identification gate control system based on filter amplification circuit according to claim 3, is characterized in that: described gate inhibition's driving circuit is by gate driver circuit, and the delay circuit be connected with gate driver circuit forms.
5. a kind of linear alarm voice identification gate control system based on filter amplification circuit according to claim 4, it is characterized in that: described gate driver circuit is by triode VT2, triode VT3, field effect transistor MOS1, field effect transistor MOS2, transformer T, negative pole is connected with the base stage of triode VT2 after not gate A2 through not gate A1 in turn, positive pole then forms the electric capacity C1 of the input end of this gate inhibition's driving circuit, resistance R7 between the Same Name of Ends being serially connected in the collector of triode VT2 and the former limit telefault of transformer T, P pole is connected with the drain electrode of field effect transistor MOS1, N pole meets the diode D3 of 12V voltage while being then connected with the Same Name of Ends of the former limit telefault of transformer T, N pole is connected with the non-same polarity of the former limit telefault of transformer T, the diode D4 that P pole is then connected with the source electrode of field effect MOS1, N pole is connected with the non-same polarity of the secondary inductance coil of transformer T, the voltage stabilizing diode D5 that P pole is then connected with the Same Name of Ends of the secondary inductance coil of transformer T, be serially connected in the resistance R9 between the grid of field effect transistor MOS2 and the N pole of voltage stabilizing diode D5, and P pole is connected with the N pole of voltage stabilizing diode D5, the voltage stabilizing diode D6 that N pole then forms the output terminal of this gate inhibition's driving circuit jointly with the source electrode of field effect transistor MOS2 forms, the base stage of described triode VT2 is connected with the base stage of triode VT3, and its emitter is then connected with the emitter of triode VT3, the base stage of described triode VT3 is all connected with delay circuit with collector, and its emitter is then connected with the grid of field effect MOS1, the source ground of described field effect transistor MOS1, the drain electrode of described field effect transistor MOS2 is connected with the P pole of voltage stabilizing diode D5, and its source electrode is then connected with delay circuit, the N pole of described voltage stabilizing diode D6 is also connected with delay circuit.
6. a kind of linear alarm voice identification gate control system based on filter amplification circuit according to claim 5, it is characterized in that: described delay circuit by time base chip U1, triode VT1, triode VT4, amplifier P, P pole is connected with the emitter of triode VT1, the diode D1 that N pole is then connected with the base stage of triode VT2 after resistance R1, be serially connected in the resistance R3 between the base stage of triode VT2 and the LX pin of Shi Ji chip U1, be serially connected in the resistance R2 between the base stage of triode VT1 and the NC pin of Shi Ji chip U1, N pole is connected with the negative pole of amplifier P, the diode D2 that P pole is then connected with the collector of triode VT1, positive pole with time base chip U1 DIM pin be connected, the electric capacity C2 that negative pole is then connected with the P pole of diode D2, positive pole with time base chip U1 VSSD pin be connected, the electric capacity C3 that negative pole is then connected with the P pole of diode D2, be serially connected in the resistance R6 between the positive pole of amplifier P and the CSN pin of Shi Ji chip U1, positive pole is connected with the collector of triode VT4, the electric capacity C4 that negative pole is then connected with the output terminal of amplifier P, be serially connected in the resistance R5 between the base stage of triode VT4 and the VIN pin of Shi Ji chip U1, be serially connected in the resistance R4 between the base stage of triode VT4 and the VCC pin of Shi Ji chip U1, and the resistance R8 be serially connected between the emitter of triode VT4 and the N pole of voltage stabilizing diode D6 forms, time described, the DIM pin of base chip U1 is connected with the base stage of triode VT1, and its VSSM pin is connected with the negative pole of amplifier P, the base stage of described triode VT4 is connected with the collector of triode VT3, the described output terminal of amplifier P is connected with the source electrode of field effect transistor MOS2.
7. a kind of linear alarm voice identification gate control system based on filter amplification circuit according to claim 6, is characterized in that: time described, base chip U1 is QX5243 type integrated chip.
CN201510961543.4A 2015-12-19 2015-12-19 Linear alarm voice recognition access control system based on filtering and amplifying circuit Pending CN105513188A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510961543.4A CN105513188A (en) 2015-12-19 2015-12-19 Linear alarm voice recognition access control system based on filtering and amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510961543.4A CN105513188A (en) 2015-12-19 2015-12-19 Linear alarm voice recognition access control system based on filtering and amplifying circuit

Publications (1)

Publication Number Publication Date
CN105513188A true CN105513188A (en) 2016-04-20

Family

ID=55721139

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510961543.4A Pending CN105513188A (en) 2015-12-19 2015-12-19 Linear alarm voice recognition access control system based on filtering and amplifying circuit

Country Status (1)

Country Link
CN (1) CN105513188A (en)

Similar Documents

Publication Publication Date Title
CN105447944A (en) Speech-recognition entrance guard system based on signal conversion
CN105513188A (en) Linear alarm voice recognition access control system based on filtering and amplifying circuit
CN105631989A (en) Filter amplification circuit based voice recognition door control system
CN105427433A (en) Multi-circuit processing-based fingerprint identification access control system
CN105427427A (en) Energy-saving face identifying access control system based on signal amplification circuit
CN105427436A (en) Audible and visual alarm circuit-based wireless voice recognition access control system
CN105321243A (en) Signal noise reduction circuit based signal amplification type energy-saving face recognition access control system
CN105447945A (en) High-efficiency speech-recognition entrance guard system based on linear driving circuit
CN105447942A (en) High-efficiency speech-recognition entrance guard system based on multi-circuit processing
CN105631992A (en) Linear driving circuit based voice recognition door control system
CN105574972A (en) Stabilized voltage source fingerprinting door control system based on signal preprocessing circuit
CN104899568A (en) Phase-shift face recognition system based on wide pulse trigger
CN105608769A (en) Efficient voice recognition access control system based on filter amplifier circuit
CN105608767A (en) Speech recognition access control system
CN105321242A (en) Energy-saving face identification access control system based on signal de-noising circuit
CN105631994A (en) Triode trigger circuit based high-precision fingerprint identification door control system
CN105447946A (en) Novel fingerprint-identification entrance guard system
CN105846796A (en) Mixed-frequency tuning signal processing system based on signal frequency correcting circuit
CN105427435A (en) Buffer circuit-based high-precision wireless voice recognition access control system
CN105423385A (en) Energy-saving control system based on compound band-pass filtering and amplifying circuit and used for range hood
CN105447943A (en) Novel fingerprint identification entrance guard system based on triode trigger circuit
CN105427438A (en) Novel fingerprint identification access control system based on signal pre-processing circuit
CN105427437A (en) Novel fingerprint identification access control system based on constant voltage source
CN205750814U (en) A kind of face identification system signal processing system based on bandwidth-limited circuit
CN106332353A (en) LED double-control type sampling holding type energy-saving control system

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20160420

WD01 Invention patent application deemed withdrawn after publication