CN105631992A - Linear driving circuit based voice recognition door control system - Google Patents

Linear driving circuit based voice recognition door control system Download PDF

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Publication number
CN105631992A
CN105631992A CN201510963670.8A CN201510963670A CN105631992A CN 105631992 A CN105631992 A CN 105631992A CN 201510963670 A CN201510963670 A CN 201510963670A CN 105631992 A CN105631992 A CN 105631992A
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China
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pole
audion
field effect
amplifier
effect transistor
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汤福琼
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Chengdu Kanuoyuan Technology Co Ltd
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Chengdu Kanuoyuan Technology Co Ltd
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Priority to CN201510963670.8A priority Critical patent/CN105631992A/en
Publication of CN105631992A publication Critical patent/CN105631992A/en
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    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07CTIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C9/00Individual registration on entry or exit
    • G07C9/30Individual registration on entry or exit not involving the use of a pass
    • G07C9/32Individual registration on entry or exit not involving the use of a pass in combination with an identity check
    • G07C9/37Individual registration on entry or exit not involving the use of a pass in combination with an identity check using biometric data, e.g. fingerprints, iris scans or voice recognition

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  • Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a linear driving circuit based voice recognition door control system. The system mainly comprises a central processor, an alarm module, a display module, a memory, an A/D (Analog/Digital) conversion circuit, a door control driving circuit, a door control unit connected with the door control driving circuit, and a sound sensor connected with the A/D conversion circuit, wherein the alarm module, the display module, the memory, the A/D conversion circuit and the door control driving circuit are connected with the central processor respectively. The system is characterized in that a linear driving circuit is further connected in series between the central processor and the alarm module. According to the system, the door control unit is turned on through voice recognition, so that the safety and stability of door control management are improved; and meanwhile, the door control unit does not need to be turned on by a key like a conventional lock, so that the use is more convenient. The system is provided with the linear driving circuit, and the linear driving circuit can linearly drive the alarm module to avoid the phenomenon of discontinuous alarming of the alarm module.

Description

A kind of voice identification gate control system based on linear drive circuit
Technical field
The present invention relates to a kind of gate control system, specifically refer to a kind of voice identification gate control system based on linear drive circuit.
Background technology
Along with developing rapidly of electronic information technology, conventional door lock is constantly to high-tech, intelligent direction development, progressed in the life of people in conjunction with the intelligent identifying system of conventional lock with living things feature recognition, wherein this intelligent identifying system is applied to entrance guard management and attendance management by increasing enterprise, such as IC-card identification system, but in actual practicality, the safety and stability of IC-card identification can not well be ensured, such as IC-card is prone to lose or be borrowed, and these unstable factors all can make system there is certain potential safety hazard.
Summary of the invention
It is an object of the invention to the defect overcoming existing gate control system safety and stability not high, it is provided that a kind of voice identification gate control system based on linear drive circuit.
The purpose of the present invention is achieved through the following technical solutions: a kind of voice identification gate control system based on linear drive circuit, main by central processing unit, alarm module, display module, memorizer, A/D change-over circuit and the gate inhibition's drive circuit being connected with central processing unit respectively, the gate inhibition being connected with gate inhibition's drive circuit, and the sound transducer composition being connected with A/D change-over circuit; In order to better implement the present invention, the present invention is also serially connected with linear drive circuit between central processing unit and alarm module.
Further, described linear drive circuit is by amplifier P1, amplifier P2, field effect transistor MOS3, field effect transistor MOS4, field effect transistor MOS5, N pole is connected with the negative pole of amplifier P2 after resistance R12, P pole then forms the diode D8 of the input of this linear drive circuit, P pole with diode D8 after resistance R10, N pole is connected, the Zener diode D7 of P pole ground connection, it is serially connected in the resistance R11 between N pole and the drain electrode of field effect transistor MOS3 of diode D8, one end is connected with the positive pole of amplifier P2, the resistance R13 that the other end is then connected with the negative pole of amplifier P1 after resistance R14, positive pole is connected with the negative pole of amplifier P2, the electric capacity C5 that negative pole is then connected with the drain electrode of field effect transistor MOS5, it is serially connected in the resistance R16 between outfan and the grid of field effect transistor MOS5 of amplifier P2, and it is serially connected in the resistance R15 composition between the grid of field effect transistor MOS4 and the outfan of amplifier P2, the source ground of described field effect transistor MOS3, its drain electrode is then connected with the positive pole of amplifier P1, and its grid is then connected with the outfan of amplifier P1, the source electrode of described field effect transistor MOS5 be connected with the negative pole of amplifier P1 while ground connection, the grounded drain of described field effect transistor MOS4, its source electrode is then connected with the positive pole of amplifier P2, the outfan of described amplifier P2 then forms the outfan of this linear drive circuit and is connected with alarm module, the input of described linear drive circuit is then connected with central processing unit.
Described gate inhibition's drive circuit is by gate driver circuit, and the delay circuit composition being connected with gate driver circuit.
Described gate driver circuit is by audion VT2, audion VT3, field effect transistor MOS1, field effect transistor MOS2, transformator T, negative pole is sequentially connected with the base stage of audion VT2 after not gate A2 through not gate A1, positive pole then forms the electric capacity C1 of the input of this gate inhibition's drive circuit, it is serially connected in the resistance R7 between the Same Name of Ends of the colelctor electrode of audion VT2 and the former limit inductance coil of transformator T, P pole is connected with the drain electrode of field effect transistor MOS1, N pole meets the diode D3 of 12V voltage with the Same Name of Ends of the former limit inductance coil of transformator T while being then connected, N pole is connected with the non-same polarity of the former limit inductance coil of transformator T, the diode D4 that P pole is then connected with the source electrode of field effect MOS1, N pole is connected with the non-same polarity of the secondary inductance coil of transformator T, the Zener diode D5 that P pole is then connected with the Same Name of Ends of the secondary inductance coil of transformator T, it is serially connected in the resistance R9 between the grid of field effect transistor MOS2 and the N pole of Zener diode D5, and P pole is connected with the N pole of Zener diode D5, N pole is then collectively forming the Zener diode D6 composition of the outfan of this gate inhibition's drive circuit with the source electrode of field effect transistor MOS2, the base stage of described audion VT2 is connected with the base stage of audion VT3, and its emitter stage is then connected with the emitter stage of audion VT3, the base stage of described audion VT3 is all connected with delay circuit with colelctor electrode, and its emitter stage is then connected with the grid of field effect MOS1, the source ground of described field effect transistor MOS1, the drain electrode of described field effect transistor MOS2 is connected with the P pole of Zener diode D5, and its source electrode is then connected with delay circuit, the N pole of described Zener diode D6 is also connected with delay circuit.
Described delay circuit by time base chip U1, audion VT1, audion VT4, amplifier P, P pole is connected with the emitter stage of audion VT1, the diode D1 that N pole is then connected with the base stage of audion VT2 after resistance R1, it is serially connected in the resistance R3 between the base stage of audion VT2 and the LX pin of Shi Ji chip U1, it is serially connected in the resistance R2 between the base stage of audion VT1 and the NC pin of Shi Ji chip U1, N pole is connected with the negative pole of amplifier P, the diode D2 that P pole is then connected with the colelctor electrode of audion VT1, positive pole with time base chip U1 DIM pin be connected, the electric capacity C2 that negative pole is then connected with the P pole of diode D2, positive pole with time base chip U1 VSSD pin be connected, the electric capacity C3 that negative pole is then connected with the P pole of diode D2, it is serially connected in the resistance R6 between the positive pole of amplifier P and the CSN pin of Shi Ji chip U1, positive pole is connected with the colelctor electrode of audion VT4, the electric capacity C4 that negative pole is then connected with the outfan of amplifier P, it is serially connected in the resistance R5 between the base stage of audion VT4 and the VIN pin of Shi Ji chip U1, it is serially connected in the resistance R4 between the base stage of audion VT4 and the VCC pin of Shi Ji chip U1, and it is serially connected in the resistance R8 composition between the emitter stage of audion VT4 and the N pole of Zener diode D6, time described, the DIM pin of base chip U1 is connected with the base stage of audion VT1, and its VSSM pin is connected with the negative pole of amplifier P, the base stage of described audion VT4 is connected with the colelctor electrode of audion VT3, the described outfan of amplifier P is connected with the source electrode of field effect transistor MOS2.
Time described, base chip U1 is QX5243 type integrated chip.
The present invention compared with the prior art, has the following advantages and beneficial effect:
(1) present invention is by opening gate inhibition to speech recognition, improves the safety and stability of entrance guard management, and meanwhile, the present invention need not need to use key to open as traditional lockset, uses convenient.
(2) present invention is provided with linear drive circuit, and what it can be linear is driven alarm module, it is to avoid the existing picture intermittently reported to the police occurs in alarm module.
Accompanying drawing explanation
Fig. 1 is the overall structure block diagram of the present invention.
Fig. 2 is the structure chart of gate inhibition's drive circuit of the present invention.
Fig. 3 is the structure chart of the linear drive circuit of the present invention.
Detailed description of the invention
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
As shown in Figure 1, a kind of voice identification gate control system based on linear drive circuit of the present invention, main by central processing unit, linear drive circuit, display module, memorizer, A/D change-over circuit and the gate inhibition's drive circuit being connected with central processing unit respectively, the gate inhibition being connected with gate inhibition's drive circuit, the sound transducer being connected with A/D change-over circuit, and the alarm module composition being connected with linear drive circuit.
This sound transducer is arranged near gate inhibition, for collected sound signal. A/D change-over circuit exports to central processing unit for the analogue signal of sound transducer output is converted to the signal of telecommunication. This central processing unit is for controlling the running of whole system, and it preferentially adopts the SPCE061A single-chip microcomputer that Taiwan Ling Yang company produces to realize. Memorizer is then for storing the acoustical signal that can pass in and out gate inhibition personnel in advance; Linear drive circuit is used for driving alarm module to work. Alarm modules adopts traditional buzzer, for acoustical signal coupling not pair time sound the alarm. Display module is then for simultaneous display recognition result, and it uses display to realize, and gate inhibition's drive circuit is opening for access control then. The IOA2 pin of this SPCE061A single-chip microcomputer is connected with the outfan of A/D change-over circuit, its IOA1 pin is then connected with the input of gate inhibition's drive circuit, its IOA6 pin is then connected with memorizer, its IOA5 pin is then connected with display module, and its DAC1 pin is then connected with the input of linear drive circuit. Described A/D change-over circuit and memorizer all adopt prior art to realize.
As in figure 2 it is shown, this gate inhibition's drive circuit is by gate driver circuit, and the delay circuit composition being connected with gate driver circuit.
Described gate driver circuit is made up of audion VT2, audion VT3, field effect transistor MOS1, field effect transistor MOS2, transformator T, resistance R7, resistance R9, electric capacity C1, not gate A1, not gate A2, diode D3, diode D4, Zener diode D5 and Zener diode D6.
During connection, the forward end of the negative pole NAND gate A1 of electric capacity C1 is connected, its positive pole then forms the input of this gate inhibition's drive circuit and is connected with central processing unit. The forward end of the backward end then NAND gate A2 of described not gate A1 is connected. The backward end of described not gate A2 is then connected with the base stage of audion VT2. Resistance R7 is serially connected between the Same Name of Ends of the colelctor electrode of audion VT2 and the former limit inductance coil of transformator T. The P pole of diode D3 is connected with the drain electrode of field effect transistor MOS1, its N pole connects 12V voltage while being then connected with the Same Name of Ends of the former limit inductance coil of transformator T. The N pole of diode D4 is connected with the non-same polarity of the former limit inductance coil of transformator T, its P pole is then connected with the source electrode of field effect MOS1. The N pole of Zener diode D5 is connected with the non-same polarity of the secondary inductance coil of transformator T, its P pole is then connected with the Same Name of Ends of the secondary inductance coil of transformator T. Resistance R9 is serially connected between the grid of field effect transistor MOS2 and the N pole of Zener diode D5. The P pole of Zener diode D6 is connected with the N pole of Zener diode D5, its N pole is then collectively forming the outfan of this gate inhibition's drive circuit and is connected with gate inhibition with the source electrode of field effect transistor MOS2.
Meanwhile, the base stage of described audion VT2 is connected with the base stage of audion VT3, and its emitter stage is then connected with the emitter stage of audion VT3. The base stage of described audion VT3 is all connected with delay circuit with colelctor electrode, and its emitter stage is then connected with the grid of field effect MOS1. The source ground of described field effect transistor MOS1. The drain electrode of described field effect transistor MOS2 is connected with the P pole of Zener diode D5, and its source electrode is then connected with delay circuit. The N pole of described Zener diode D6 is also connected with delay circuit.
It addition, described delay circuit by time base chip U1, audion VT1, audion VT4, amplifier P, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R8, electric capacity C2, electric capacity C3, electric capacity C4, diode D1 and diode D2 composition.
During connection, the P pole of diode D1 is connected with the emitter stage of audion VT1, its N pole is then connected with the base stage of audion VT2 after resistance R1. Resistance R3 is serially connected between the base stage of audion VT2 and the LX pin of Shi Ji chip U1. Resistance R2 is serially connected between the base stage of audion VT1 and the NC pin of Shi Ji chip U1. The N pole of diode D2 is connected with the negative pole of amplifier P, its P pole is then connected with the colelctor electrode of audion VT1. The positive pole of electric capacity C2 with time base chip U1 DIM pin be connected, its negative pole is then connected with the P pole of diode D2. The positive pole of electric capacity C3 with time base chip U1 VSSD pin be connected, its negative pole is then connected with the P pole of diode D2. Resistance R6 is serially connected between the positive pole of amplifier P and the CSN pin of Shi Ji chip U1. The positive pole of electric capacity C4 is connected with the colelctor electrode of audion VT4, its negative pole is then connected with the outfan of amplifier P. Resistance R5 is serially connected between the base stage of audion VT4 and the VIN pin of Shi Ji chip U1. Resistance R4 is serially connected between the base stage of audion VT4 and the VCC pin of Shi Ji chip U1. Resistance R8 is serially connected between the emitter stage of audion VT4 and the N pole of Zener diode D6.
Time described, the DIM pin of base chip U1 is connected with the base stage of audion VT1, and its VSSM pin is connected with the negative pole of amplifier P. The base stage of described audion VT4 is connected with the colelctor electrode of audion VT3. The described outfan of amplifier P is connected with the source electrode of field effect transistor MOS2.
When central processing unit exports control signal to gate inhibition's drive circuit, the driving on-off circuit conducting being made up of not gate A1, not gate A2, audion VT2, audion VT3, diode D3 and field effect transistor MOS1, and signal is opened through transformator T rear drive gate inhibition, simultaneously, the colelctor electrode output voltage of audion VT3 to time base chip U1, electric capacity C4 then charges rapidly. When central processing unit stops outputing signal to gate inhibition's drive circuit, electric capacity C4 starts generating, makes gate inhibition remain on, in order to people can pass through gate inhibition, when after electric capacity C4 discharge off, gate inhibition closes. In order to reach better implementation result, time described, base chip U1 is preferably QX5243 type integrated chip and realizes.
As it is shown on figure 3, this linear drive circuit is by amplifier P1, amplifier P2, field effect transistor MOS3, field effect transistor MOS4, field effect transistor MOS5, resistance R10, resistance R11, resistance R12, resistance R13, resistance R14, resistance R15, resistance R16, diode D7, diode D8 and electric capacity C5 form.
During connection, the N pole of diode D8 is connected with the negative pole of amplifier P2 after resistance R12, its P pole then forms the input of this linear drive circuit and is connected with central processing unit. P pole with diode D8 after resistance R10, the N pole of Zener diode D7 is connected, its P pole ground connection. Resistance R11 is serially connected between N pole and the drain electrode of field effect transistor MOS3 of diode D8. One end of resistance R13 is connected with the positive pole of amplifier P2, its other end is then connected with the negative pole of amplifier P1 after resistance R14. The positive pole of electric capacity C5 is connected with the negative pole of amplifier P2, its negative pole is then connected with the drain electrode of field effect transistor MOS5. Resistance R16 is serially connected between outfan and the grid of field effect transistor MOS5 of amplifier P2. Resistance R15 is serially connected between the grid of field effect transistor MOS4 and the outfan of amplifier P2.
Meanwhile, the source ground of described field effect transistor MOS3, its drain electrode is then connected with the positive pole of amplifier P1, and its grid is then connected with the outfan of amplifier P1. The source electrode of described field effect transistor MOS5 be connected with the negative pole of amplifier P1 while ground connection. The grounded drain of described field effect transistor MOS4, its source electrode is then connected with the positive pole of amplifier P2. The outfan of described amplifier P2 then forms the outfan of this linear drive circuit and is connected with alarm module. This linear drive circuit can be linear alarm module is driven, it is to avoid there is the existing picture intermittently reported to the police in alarm module.
During work, the personnel needing turnover send signal to sound transducer, this sound transducer then gathers voice signal and is sent to A/D change-over circuit, this A/D change-over circuit is sent to central processing unit after voice analog signal is converted to the signal of telecommunication, this central processing unit mates the signal of input with the signal stored in advance in memorizer, if it fails to match, central processing unit then sends command signal to linear drive circuit, and this linear drive circuit then drives alarm module to make alarm module report to the police. If the match is successful, central processing unit then sends command signal to gate inhibition's drive circuit, and this gate inhibition's drive circuit then access control is opened. This display module then shows the matching result of signal simultaneously.
As it has been described above, just can well implement the present invention.

Claims (6)

1. the voice identification gate control system based on linear drive circuit, main by central processing unit, alarm module, display module, memorizer, A/D change-over circuit and the gate inhibition's drive circuit being connected with central processing unit respectively, the gate inhibition being connected with gate inhibition's drive circuit, and the sound transducer composition being connected with A/D change-over circuit; It is characterized in that, between central processing unit and alarm module, be also serially connected with linear drive circuit.
2. a kind of voice identification gate control system based on linear drive circuit according to claim 1, it is characterized in that: described linear drive circuit is by amplifier P1, amplifier P2, field effect transistor MOS3, field effect transistor MOS4, field effect transistor MOS5, N pole is connected with the negative pole of amplifier P2 after resistance R12, P pole then forms the diode D8 of the input of this linear drive circuit, P pole with diode D8 after resistance R10, N pole is connected, the Zener diode D7 of P pole ground connection, it is serially connected in the resistance R11 between N pole and the drain electrode of field effect transistor MOS3 of diode D8, one end is connected with the positive pole of amplifier P2, the resistance R13 that the other end is then connected with the negative pole of amplifier P1 after resistance R14, positive pole is connected with the negative pole of amplifier P2, the electric capacity C5 that negative pole is then connected with the drain electrode of field effect transistor MOS5, it is serially connected in the resistance R16 between outfan and the grid of field effect transistor MOS5 of amplifier P2, and it is serially connected in the resistance R15 composition between the grid of field effect transistor MOS4 and the outfan of amplifier P2, the source ground of described field effect transistor MOS3, its drain electrode is then connected with the positive pole of amplifier P1, and its grid is then connected with the outfan of amplifier P1, the source electrode of described field effect transistor MOS5 be connected with the negative pole of amplifier P1 while ground connection, the grounded drain of described field effect transistor MOS4, its source electrode is then connected with the positive pole of amplifier P2, the outfan of described amplifier P2 then forms the outfan of this linear drive circuit and is connected with alarm module, the input of described linear drive circuit is then connected with central processing unit.
3. a kind of voice identification gate control system based on linear drive circuit according to claim 2, it is characterised in that: described gate inhibition's drive circuit is by gate driver circuit, and the delay circuit composition being connected with gate driver circuit.
4. a kind of voice identification gate control system based on linear drive circuit according to claim 3, it is characterized in that: described gate driver circuit is by audion VT2, audion VT3, field effect transistor MOS1, field effect transistor MOS2, transformator T, negative pole is sequentially connected with the base stage of audion VT2 after not gate A2 through not gate A1, positive pole then forms the electric capacity C1 of the input of this gate inhibition's drive circuit, it is serially connected in the resistance R7 between the Same Name of Ends of the colelctor electrode of audion VT2 and the former limit inductance coil of transformator T, P pole is connected with the drain electrode of field effect transistor MOS1, N pole meets the diode D3 of 12V voltage with the Same Name of Ends of the former limit inductance coil of transformator T while being then connected, N pole is connected with the non-same polarity of the former limit inductance coil of transformator T, the diode D4 that P pole is then connected with the source electrode of field effect MOS1, N pole is connected with the non-same polarity of the secondary inductance coil of transformator T, the Zener diode D5 that P pole is then connected with the Same Name of Ends of the secondary inductance coil of transformator T, it is serially connected in the resistance R9 between the grid of field effect transistor MOS2 and the N pole of Zener diode D5, and P pole is connected with the N pole of Zener diode D5, N pole is then collectively forming the Zener diode D6 composition of the outfan of this gate inhibition's drive circuit with the source electrode of field effect transistor MOS2, the base stage of described audion VT2 is connected with the base stage of audion VT3, and its emitter stage is then connected with the emitter stage of audion VT3, the base stage of described audion VT3 is all connected with delay circuit with colelctor electrode, and its emitter stage is then connected with the grid of field effect MOS1, the source ground of described field effect transistor MOS1, the drain electrode of described field effect transistor MOS2 is connected with the P pole of Zener diode D5, and its source electrode is then connected with delay circuit, the N pole of described Zener diode D6 is also connected with delay circuit.
5. a kind of voice identification gate control system based on linear drive circuit according to claim 4, it is characterized in that: described delay circuit by time base chip U1, audion VT1, audion VT4, amplifier P, P pole is connected with the emitter stage of audion VT1, the diode D1 that N pole is then connected with the base stage of audion VT2 after resistance R1, it is serially connected in the resistance R3 between the base stage of audion VT2 and the LX pin of Shi Ji chip U1, it is serially connected in the resistance R2 between the base stage of audion VT1 and the NC pin of Shi Ji chip U1, N pole is connected with the negative pole of amplifier P, the diode D2 that P pole is then connected with the colelctor electrode of audion VT1, positive pole with time base chip U1 DIM pin be connected, the electric capacity C2 that negative pole is then connected with the P pole of diode D2, positive pole with time base chip U1 VSSD pin be connected, the electric capacity C3 that negative pole is then connected with the P pole of diode D2, it is serially connected in the resistance R6 between the positive pole of amplifier P and the CSN pin of Shi Ji chip U1, positive pole is connected with the colelctor electrode of audion VT4, the electric capacity C4 that negative pole is then connected with the outfan of amplifier P, it is serially connected in the resistance R5 between the base stage of audion VT4 and the VIN pin of Shi Ji chip U1, it is serially connected in the resistance R4 between the base stage of audion VT4 and the VCC pin of Shi Ji chip U1, and it is serially connected in the resistance R8 composition between the emitter stage of audion VT4 and the N pole of Zener diode D6, time described, the DIM pin of base chip U1 is connected with the base stage of audion VT1, and its VSSM pin is connected with the negative pole of amplifier P, the base stage of described audion VT4 is connected with the colelctor electrode of audion VT3, the described outfan of amplifier P is connected with the source electrode of field effect transistor MOS2.
6. a kind of voice identification gate control system based on linear drive circuit according to claim 5, it is characterised in that: time described, base chip U1 is QX5243 type integrated chip.
CN201510963670.8A 2015-12-19 2015-12-19 Linear driving circuit based voice recognition door control system Pending CN105631992A (en)

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Application Number Priority Date Filing Date Title
CN201510963670.8A CN105631992A (en) 2015-12-19 2015-12-19 Linear driving circuit based voice recognition door control system

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Application Number Priority Date Filing Date Title
CN201510963670.8A CN105631992A (en) 2015-12-19 2015-12-19 Linear driving circuit based voice recognition door control system

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Publication Number Publication Date
CN105631992A true CN105631992A (en) 2016-06-01

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