CN105511344B - The implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function - Google Patents
The implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function Download PDFInfo
- Publication number
- CN105511344B CN105511344B CN201510865949.2A CN201510865949A CN105511344B CN 105511344 B CN105511344 B CN 105511344B CN 201510865949 A CN201510865949 A CN 201510865949A CN 105511344 B CN105511344 B CN 105511344B
- Authority
- CN
- China
- Prior art keywords
- control device
- measure
- function
- interlock function
- observing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 20
- 230000005540 biological transmission Effects 0.000 title claims abstract description 17
- 230000006870 function Effects 0.000 claims abstract description 59
- 238000013461 design Methods 0.000 claims description 5
- 230000008569 process Effects 0.000 claims description 5
- 238000013507 mapping Methods 0.000 claims description 4
- 230000004927 fusion Effects 0.000 claims description 3
- 230000003993 interaction Effects 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 230000008140 language development Effects 0.000 abstract description 4
- 238000012986 modification Methods 0.000 abstract description 3
- 230000004048 modification Effects 0.000 abstract description 3
- 238000005259 measurement Methods 0.000 abstract description 2
- 230000008859 change Effects 0.000 description 5
- 238000004891 communication Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 238000013480 data collection Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012885 constant function Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000004353 relayed correlation spectroscopy Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0426—Programming the control sequence
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25268—PLD programmable logic device
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Stored Programmes (AREA)
- Programmable Controllers (AREA)
Abstract
The present invention relates to a kind of implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function, belong to technical field of HVDC transmission.The present invention is by the basic observing and controlling function of measure and control device and needs the logical interlock function of quadratic programming to be separated, merging for logical interlock program and observing and controlling base program is realized by way of the system cycle calls, basic observing and controlling function is encapsulated in specific region using conventional C language development scheme and in the form of Firmware, the logical interlock function of quadratic programming is needed to realize application-specific by user on image conversion programming tool ViRule in the form of based on IEC61131 language, relational graph program it is final in a specific way be attached to measure and control device specific region under the form of machine code, complete observing and controlling and interlock function are realized in a manner of the cycle calls.The present invention separates logical interlock function with other measurements with control function, facilitates user and carries out quadratic programming, improves modification of program reliability and operating efficiency.
Description
Technical field
The present invention relates to a kind of implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function, belongs to high
Press technical field of direct current power transmission.
Background technology
In customary DC engineering particularly extra-high voltage direct-current transmission engineering, its Control protection system logging-controlling apparatus used in situ is born
Duty switching devices, breaker, wave filter and the control and data collection task of other equipment and field layer primary equipment are each
The logical interlock and " five is anti-" function of switch and breaker.Because DC transmission engineering system is huge, equipment is complicated, device type
More, reliability requirement is high, controls defencive function complex, and its control defence program of different types of occasion has larger area
, and field layer measure and control device program is not often changed frequently because the change of primary equipment faces, and frequently change with
And amended test can cause measure and control device reliability low, influence the normal operation of DC transmission engineering.
The content of the invention
It is an object of the invention to provide a kind of realization side of D.C. high voltage transmission measure and control device graphic logic interlock function
Method, to solve measure and control device reliability caused by making measure and control device program face frequently modification primary equipment is changed at present
The problem of reduction.
The present invention provides a kind of D.C. high voltage transmission measure and control device graphic logic interlocking to solve above-mentioned technical problem
The implementation method of function, this method comprise the following steps：
1) by the basic observing and controlling function of field layer measure and control device with needing the logical interlock function of quadratic programming to be separated；
2) basic observing and controlling function is programmed and the specific region of measure and control device is encapsulated in the form of Firmware；
3) the logical interlock function of needing quadratic programming is programmed by the way of graphical language, and figure will be obtained
Change program in a particular manner with specific region that measure and control device is attached under the form of machine code；
4) measure and control device realizes the fusion of logical interlock program and observing and controlling base program in a manner of the cycle calls.
Graphic Design language uses CFC or LD form in described step 3), drags corresponding function during editor
Block carries out line operation to corresponding functional block, and the graphical programs of generation are stored with .xrl files to editing interface.
Graphical programs in the step 3) are the text language generated using graphical language, and observing and controlling dress is attached under
When putting, the machine code native code that machine can identify need to be translated into.
The generating process of the machine code native code is as follows：The .xrl files of graphical programs are turned over by language
Device generation is translated with the intermediate code of .txt document forms, then by .txt intermediate codes to pass through based on infineon C167's
Native Code compilers and linker generation are available for the object code of machine recognition and stored with .hex document forms.
Measure and control device shows input and output variable in data interaction in a manner of absolute address maps in the step 4)
Mapping relations.
The beneficial effects of the invention are as follows:Basic observing and controlling function of the invention by measure and control device and the logic mutual for needing quadratic programming
Lock function is separated, and merging for logical interlock program and observing and controlling base program is realized by way of the system cycle calls, substantially
Observing and controlling function using conventional C language development scheme and is encapsulated in specific region in the form of Firmware, needs quadratic programming
Logical interlock function realizes specific answer on image conversion programming tool ViRule in the form of based on IEC61131 language by user
With, relational graph program it is final in a specific way be attached to measure and control device specific region under the form of machine code, adjusted with the cycle
Mode realizes complete observing and controlling and interlock function.The present invention divides logical interlock function and other measurements with control function
From, facilitate user carry out quadratic programming, improve modification of program reliability and operating efficiency.And employ the IEC61131 of standard
Graphic Design language, the simple and reliable property of programming is high, and maintenance cost is cheap, can be widely applied to conventional and extra-high straightening
Power transmission engineering is flowed, realizes the safe and reliable interlock of control system.
Brief description of the drawings
Fig. 1 is typical measure and control device high-level schematic functional block diagram；
Fig. 2 is the principle schematic of graphical language generation text language；
Fig. 3-a are TT＆C system main program flow charts；
Fig. 3-b are RULE interrupt task process charts；
Fig. 3-c are 1ms interrupt task process charts；
Fig. 4-a are chain logic function editor schematic diagrames in the embodiment of the present invention；
Fig. 4-b are chain logic function Rule files compiling generation schematic diagrames in the embodiment of the present invention.
Embodiment
The embodiment of the present invention is described further below in conjunction with the accompanying drawings.
As shown in figure 1, the targeted measure and control device of the present invention mainly realize the data acquisition of field control level, pretreatment and
Data upload, while perform the logical interlock function of control output order and the field layer switch control of master station.It is mainly wrapped
Include with lower module：The power supply of redundant configuration, System self-test module, the light with redundant configuration, electric RROFIBUS communication interfaces, band are dead
Area's time and the switch acquisition and SER sequential times record of filtering time configuration, the output switch parameter function with self-checking function,
High-precision 16 A/D acquisition modules, can quadratic programming logical interlock functional module Rule.Use in the present embodiment and flown with English
The CPU board card that C167 MCU are core is insulted, 100vDC opens outputs module, 16 road AC moulds into module, tape relay operation circuit
The hardware structure that analog quantity acquisition module and PROFIBUS-DP communication modules can be configured freely, each functional module is with firmware and can compile
The form of range code is stored in the specific memory spaces of C167 MCU.
The present invention is by by the basic observing and controlling function of field layer measure and control device and the logical interlock function phase for needing quadratic programming
Separation；Basic observing and controlling function is programmed and the specific region of measure and control device is encapsulated in the form of Firmware；Using figure
The mode of shape language is programmed to the logical interlock function of needing quadratic programming, and will obtain graphical programs with specific side
The specific region of measure and control device is attached under the form of formula and machine code；Measure and control device realizes logical interlock in a manner of the cycle calls
The fusion of program and observing and controlling base program.The specific implementation process of this method is as follows.
By the basic function of field layer measure and control device such as on-off value data acquisition, analog data collection, sequential affair
Record generation, auxiliary and debugging, encapsulate and survey using Firmware forms with modules such as master control equipment profibus-DP communications
Control in device Program Memory.
Measure and control device it is relevant with interlock logic mainly have 3 class data, be On-off signal respectively, output switch parameter, in
Between variable, the brief introduction of internal data is as shown in table 1.
Table 1
| Project | Explain |
| I1-I72 | On-off signal, external signal is gathered by device |
| S1-128 | Intermediate variable, produced according to ViRULE programmed logics |
| O1-O48 | Output switch parameter, produced according to ViRULE programmed logics |
The interlock logic control function that measure and control device provides, the main method using design rule are realized.So-called rule is just
It is using the RELAY plug-in units of digital quantity and internal state variable the control measure and control device of input, realizes programmable interlocked control
Function, regular functional module are as shown in table 2.
Table 2
| Function | Description |
| SET | When programmable condition is true, automatic setting output |
| RESET | When programmable condition is true, automatic reset outputs |
| BLOCK | When programmable condition is true, output is forbidden to change |
| ENABLE | When programmable condition is true, enables output and change |
| AENABLE | When programmable condition is true and main website asks, output (output of other situations is reset) is set |
| ABLOCK | When programmable condition is that false and main website asks, output (output of other situations is reset) is set |
Logical interlock needs the program of quadratic programming to be realized by the cross compile system of host computer-target machine, such as Fig. 2 institutes
Show, its embodiment is：Used using based on the graphical Programming with Pascal Language instrument ViRule of IEC611131 language, the instrument
Microsoft's VS shell technologies, are completed by VS c# language developments, and the logical interlock program that the instrument mainly completes measure and control device is opened
Hair, CFC programs are generated, by the CFC compilers of specific hardware, complete the generation of the device par-ticular processor machine code.Should
Kit contains user program graphic programming interface, and image conversion design language uses CFC or LD form, can drag during editor
Then dynamic functional block carries out line operation, graphical programs are stored with .xrl files, pass through the language built in it to editing interface
Translater, generate and the Native based on infineon C167 is passed through with the intermediate code of .txt document forms .txt intermediate codes
Code compilers and linker generation are available for the object code that MCU is identified, the object code is stored with .hex document forms, with complete
Into the programing work of host computer.
Host computer and goal systems (measure and control device) are by way of based on RS232, using a kind of reliable communications protocol
It will be filled in measure and control device IEC Program Memory absolute address and solidify under .hex files；In goal systems after electricity, its
Internal schedule can go to realize and cycles of Rule codes is called, the constant function of being stored in measure and control device in the form of Firmware with
The quadratic programming such as Rule function realizes calling in a manner of the cycle calls, and data interaction is shown out in a manner of absolute address maps
Enter to output the mapping relations of variable.
Call relation such as Fig. 3-a to Fig. 3 of Rule programmable codes and measure and control device basic function code in the present embodiment-
Shown in c, after system electrification, after self-check program, two interrupt tasks of 1ms and 4ms can be started, as shown in Fig. 3-a, 4ms appoints
Business mainly outputs order, will open and maps to all observing and controlling basic functions such as Rule data map sections, profibus communications into data,
In addition, the calling of Rule programs is also in this task, reads I1-I72 and open into variable and S1-S128 built-in variable data,
Then absolute address calling by way of jump to IEC program memory perform Rule programs, after the completion of will renewal after
S1-S128 and the variable storage such as O1-O48 its mapping table in realize it is split enter logic control, this partial task calls the cycle
It is 4ms, as shown in Fig. 3-b；1ms tasks, which are mainly accomplished that, to be responsible for opening into data acquisition and the record generation of SER sequential times etc.
The function harsh to time requirement, as shown in Fig. 3-c.
For logic SET O1=I1＆I2 | (！I3＆ (I4＆I40)), compiled using interlock logic editing machine ViRule
Volume, as a result as depicted in fig. 4-a, graphical programs are stored as rule.xrl.Click on Build in menu, you can compiling generation Rule
File, as shown in Fig. 4-b；By its built-in language translator, intermediate code rule.txt is generated, then pass through Native Code
Compiler and linker generation object code rule.hex, will be filled to measure and control device, so that it may realize internal under rule.hex files
Interlock logic function.
The present invention is by the basic observing and controlling function of measure and control device and needs the logical interlock function of quadratic programming to be separated, and passes through and is
The mode that the system cycle calls realizes merging for logical interlock program and observing and controlling base program, basic observing and controlling function using routine C
Language development mode and specific region is encapsulated in Firmware reality, need the logical interlock function of quadratic programming with based on
The form of IEC61131 language realizes application-specific on image conversion programming tool ViRule by user, and relational graph program is most
Eventually in a specific way be attached to measure and control device specific region under the form of machine code, by the cycle call in a manner of realize complete survey
Control and interlock function.
Claims (5)
1. the implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function, it is characterised in that this method includes
Following steps：
1）By the basic observing and controlling function of field layer measure and control device and the logical interlock function of quadratic programming is needed to be separated；
2）Basic observing and controlling function is programmed and the specific region of measure and control device is encapsulated in the form of Firmware；
3）The logical interlock function of needing quadratic programming is programmed by the way of graphical language, and graphical journey will be obtained
Sequence in a particular manner with specific region that measure and control device is attached under the form of machine code；
4）Measure and control device realizes the fusion of logical interlock program and observing and controlling base program in a manner of the cycle calls.
2. the implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function according to claim 1, its
It is characterised by, described step 3）Middle Graphic Design language uses CFC or LD form, drags corresponding function during editor
Block carries out line operation to corresponding functional block, and the graphical programs of generation are stored with .xrl files to editing interface.
3. the implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function according to claim 2, its
It is characterised by, the step 3）In graphical programs be using graphical language generate text language, be attached to observing and controlling under
During device, the machine code native code that machine can identify need to be translated into.
4. the implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function according to claim 3, its
It is characterised by, the generating process of the machine code native code is as follows：The .xrl files of graphical programs are turned over by language
Device generation is translated with the intermediate code of .txt document forms, then by .txt intermediate codes to pass through based on infineon C167's
Native Code compilers and linker generation are available for the object code of machine recognition and stored with .hex document forms.
5. the implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function according to claim 3, its
It is characterised by, the step 4）Middle measure and control device shows input and output variable in data interaction in a manner of absolute address maps
Mapping relations.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510865949.2A CN105511344B (en) | 2015-12-01 | 2015-12-01 | The implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510865949.2A CN105511344B (en) | 2015-12-01 | 2015-12-01 | The implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105511344A CN105511344A (en) | 2016-04-20 |
| CN105511344B true CN105511344B (en) | 2017-12-19 |
Family
ID=55719412
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510865949.2A Active CN105511344B (en) | 2015-12-01 | 2015-12-01 | The implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105511344B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108196842B (en) * | 2017-11-16 | 2020-11-13 | 许继电气股份有限公司 | Communication configuration method for process layer of control protection device of converter station |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5590035A (en) * | 1993-12-24 | 1996-12-31 | Mitsubishi Denki Kabushiki Kaisha | Output control circuit |
| US6952618B2 (en) * | 2000-10-05 | 2005-10-04 | Karl A Daulin | Input/output control systems and methods having a plurality of master and slave controllers |
| CN201667535U (en) * | 2010-07-16 | 2010-12-08 | 重庆迅驰电气有限公司 | Electric power system line protection observe and control apparatus |
| CN202014135U (en) * | 2010-12-01 | 2011-10-19 | 南京因泰莱电器股份有限公司 | Interval measure and control device for switch |
| CN103676740A (en) * | 2013-12-09 | 2014-03-26 | 南京康尼电子科技有限公司 | Safety control circuit based on CPLD |
| CN204154338U (en) * | 2014-11-05 | 2015-02-11 | 深圳市爱科赛科技股份有限公司 | Transmission line of electricity on-line monitoring main frame |
-
2015
- 2015-12-01 CN CN201510865949.2A patent/CN105511344B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5590035A (en) * | 1993-12-24 | 1996-12-31 | Mitsubishi Denki Kabushiki Kaisha | Output control circuit |
| US6952618B2 (en) * | 2000-10-05 | 2005-10-04 | Karl A Daulin | Input/output control systems and methods having a plurality of master and slave controllers |
| CN201667535U (en) * | 2010-07-16 | 2010-12-08 | 重庆迅驰电气有限公司 | Electric power system line protection observe and control apparatus |
| CN202014135U (en) * | 2010-12-01 | 2011-10-19 | 南京因泰莱电器股份有限公司 | Interval measure and control device for switch |
| CN103676740A (en) * | 2013-12-09 | 2014-03-26 | 南京康尼电子科技有限公司 | Safety control circuit based on CPLD |
| CN204154338U (en) * | 2014-11-05 | 2015-02-11 | 深圳市爱科赛科技股份有限公司 | Transmission line of electricity on-line monitoring main frame |
Non-Patent Citations (2)
| Title |
|---|
| IEC61131-3的可编程功能在变电站测控保护装置中的实现;黄国方 等;《电力系统自动化》;20070210;第31卷(第3期);第101-104页 * |
| 可编程逻辑控制系统软-硬件综合可靠性分析;万毅 等;《计算机集成制造系统》;20080731;第14卷(第7期);第1399-1402,1416页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105511344A (en) | 2016-04-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101989312B (en) | Graphical intelligent transformer substation model design method based on computer-aided design (CAD) | |
| CN103136406A (en) | Method for automatic generation of function code for simulation through visualization application program | |
| CN101957745B (en) | Method for converting ladder diagram language into structure text language | |
| CN108681444A (en) | A kind of Soft- PLC configuration development approach based on XML technology | |
| CN104932905A (en) | Automatic code generation method from AADL to C language | |
| CN106886411A (en) | A kind of protective relaying device logic figure collocation method based on QT | |
| CN103746882A (en) | Test method for intelligent substation station-control layer | |
| EP0961968A1 (en) | Method and system for generating software code | |
| CN105608258A (en) | Model based system design and information flow visualization simulation system and method | |
| CN104317589A (en) | Automatic code generating method and automatic code generating device for loading dynamic link library | |
| CN104461528A (en) | Method and device for generating signal-oriented application program codes in visualization mode | |
| CN105224753A (en) | The multi-specialized design verification platform of non-active nuclear power plant | |
| CN105447246A (en) | Method and system for generating electrical principle diagram through one key | |
| CN108319744A (en) | Product parametric design development platform and method | |
| CN109753030B (en) | Method and device for configuring intelligent electronic device | |
| CN106709143A (en) | VFTO batch simulation analysis method and system based on ATP automatic modeling | |
| CN110852023A (en) | Automatic generation method and device for primary main wiring diagram of intelligent substation | |
| CN106325647B (en) | A kind of UI method of adjustment, device and mobile terminal | |
| CN103632307A (en) | Method for checking consistency between SCD and virtual loop table of intelligent substation | |
| CN103092747A (en) | Controlling program verifying and testing method and system thereof | |
| CN110147226B (en) | System, method and device for automatically generating program according to functional block diagram | |
| CN105511344B (en) | The implementation method of D.C. high voltage transmission measure and control device graphic logic interlock function | |
| CN103425469A (en) | Method for generating mobile game codes based on MDA technology | |
| CN104036667B (en) | A kind of virtual terminals of intelligent substation connects the implementation method of design training | |
| CN104578387A (en) | Programmable automatic transfer controller and control method for two-way power supply |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |