CN105470159B - The method that scorification silk delivery rate is monitored in chip testing - Google Patents
The method that scorification silk delivery rate is monitored in chip testing Download PDFInfo
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- CN105470159B CN105470159B CN201510790708.6A CN201510790708A CN105470159B CN 105470159 B CN105470159 B CN 105470159B CN 201510790708 A CN201510790708 A CN 201510790708A CN 105470159 B CN105470159 B CN 105470159B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Fuses (AREA)
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- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The present invention provides a kind of method that scorification silk delivery rate is monitored in chip testing, includes the following steps:Step S1 establishes a fuse truth table, and the correspondence of each reference voltage measured value range of chip and the fuse for needing to blow is contained in fuse truth table;Step S2 carries out the test of a chip, the reference voltage measured value of monitoring chip;Step S3, reference voltage measured value falls into a specific reference voltage measured value range, if reference voltage measured value is fallen in a reference voltage target zone where reference voltage standard value, then chip is qualified, if reference voltage measured value is outside reference voltage target zone, the then correspondence according to each reference voltage measured value range in fuse truth table and the fuse for needing to blow blows the corresponding each fuse of chip of the specific reference voltage measured value range;Step S4 carries out scorification silk process again if a scorification silk is unsuccessful.The present invention can trim process to scorification silk in chip testing and be monitored in real time.
Description
Technical field
The present invention is scorification silk delivery rate in a kind of test of monitoring ic, and carry out in processing test process in real time because
Contact resistance is bigger than normal causes fuse scorification silk not exclusively to cause to test low good situation, to improve one kind of scorification silk quality
Method.
Background technology
More stringent requirements are proposed for precision and programmability of the development of integrated circuit to circuit.With to integrated circuit
The requirement of high performance index is higher and higher, integrated circuit face it is high-precision require it is increasingly apparent, the technology of trimming be realize it is high-precision
Spend the necessary means of integrated circuit.Fuse trims in the digital circuit of traditional analog circuit and high-precision requirement, plays
Higher and higher status, has in the integrated circuit (IC) of the types such as AC-DC, DC-DC, LDO (low pressure difference linear voltage regulator)
Extensive use, scorification silk are more than and trim that output voltage is so simple, and depending on depending on design, cardinal principle is blown in IC chip
Resistor network in short-circuit aluminum strip to have the function that change network resistor, the parameter that fuse can trim also depends on certainly
The effect of the resistance in circuit, output voltage, reference voltage are the most commonly seen parameters that trims, in addition such as reference frequency, electricity
Stream etc. also can accomplish very high precision by trimming.
Usually it should be noted that this two indexs of electric current, voltage, electric current, voltage for trimming are all during scorification silk
It cannot be too high.Otherwise test result is then gently influenced, damage IC is resulted even in when serious.It is the introduction of fuse below:
Traditional burning fusing schemes mainly have 3 kinds, blow metal fuse with laser, or blow metal fuse with high current
And polysilicon fuse.In integrated circuit design, fuse is mainly used in adjustment IC as the key part in electronic product
Internal resistance and capacitance characteristic, or among radio circuit.
As shown in Figure 1, common metal fuse, usually by other resistance institute structures such as a rule metallic resistance or film
At.Fuse is typically the wide plain conductor in intermediate narrow both ends, is drawn using probe and connects high current (general control is in 200mA or so) extremely
The point (TPAD in Fig. 1) that trims of fuse fuses, irrecoverable after fusing (due to problem of having an acupuncture treatment, it is understood that there may be burn continuous
It happens).
As shown in Fig. 2, general fuse trims, resistance (or capacitance) will be parallel to using voltage source (current source)
The fuse opening at both ends achievees the purpose that trim.The resistance trimmed using such scheme can only be to the big direction adjustment (electricity of resistance value
Hold to small direction adjustment).The schematic diagram of Fig. 2 is using resistance series network;When A points connect a supply voltage, B points connect
Ground, when blowing any one or more in fuse F0~Fn, the resistance value of concatenated R0~Rn can become larger, so as to adjust resistance Rc
The voltage of right end node rises.Resistance parallel network or series-parallel network can also be used, it is molten in integrated circuit to blow
Silk, the lifting of adjusting reference voltage.
Fusing fuse needs larger immediate current.Electric current needed for specific, according to practical item is wide and thickness and is not quite similar,
It is commonly hundreds of milliamperes.Traditional fuse method for repairing and regulating is usually applied by relay between fuse using power supply or capacitance
Making alive, which generates larger immediate current, makes fuse failure.But in the test event for needing fuse to trim, due to ambient conditions
Variation (such as:Contact resistance of probe becomes larger) cause the fusing rate of fuse is low so that job requirement is not achieved in IC circuit references.
Since the fuse of certain products causes electrical parameter variation to be amphicheirality, can cause if first time fuse burning is not in place can not
Inverse loss.This requires want the moment to pay close attention to the abnormal conditions of yield in test process.Since the board of producing line is numerous, operator
The case where member can not possibly pay close attention to a certain test machine in real time, so may can cause in this course to test product not
Reversible loss.
Invention content
It is an object of the present invention to overcome the shortcomings of the prior art and provide scorification silk is monitored in a kind of chip testing
The method of delivery rate, for needing the test chip kind that fuse trims to can be very good to trim feelings in concern test process
Condition, to pointedly make corresponding adjustment;It can carry out scorification silk process again, and in the continuous fuse feelings that occur needing to reburn
When condition, alarm is sent out in time, is reminded operating personnel to adjust and is burnt fuse operation.The technical solution adopted by the present invention is:
A kind of method that scorification silk delivery rate is monitored in chip testing, includes the following steps:
Step S1 establishes a fuse truth table, and each reference voltage measured value model of chip is contained in fuse truth table
Enclose the correspondence with the fuse for needing to blow;At least two sections or more of the fuse quantity, can after which part fuse opening
Reference voltage is caused to rise, portions of fusing filaments can cause reference voltage to decline after blowing, and a base is corresponded to after each fuse opening
Quasi- voltage variety;Reference voltage standard value is additionally provided in fuse truth table;
The minimum reference value of reference voltage and highest reference value are equipped in fuse truth table;
Step S2 carries out the test of a chip, the reference voltage measured value of monitoring chip;When reference voltage measured value≤
The minimum reference value of reference voltage, or >=reference voltage highest reference value directly judge that current chip is bad piece;When reference voltage most
Low reference value<Reference voltage measured value<Reference voltage highest reference value, then continue subsequent step;
Step S3, reference voltage measured value fall into a specific reference voltage measured value range, if reference voltage is surveyed
Value is fallen in a reference voltage target zone where reference voltage standard value, then chip is qualified, if reference voltage measured value
Outside reference voltage target zone, then according to each reference voltage measured value range in fuse truth table and the fuse that needs to blow
Correspondence, the corresponding each fuse of chip of the specific reference voltage measured value range is blown;
Step S4 measures chip reference voltage measured value, if obtained reference voltage measured value is fallen in reference voltage again
In a reference voltage target zone where standard value, then the success of chip scorification silk, executes the test or other of next chip
The test of project;
Otherwise, judge phase with reference voltage theory variable quantity according to the reference voltage actual change amount for blowing each section of fuse
It answers the fuse of section not blow, is then back to step S3, carry out scorification silk process again.
More preferably, in the method that scorification silk delivery rate is monitored in the chip testing, the fuse number that reburns is set
Counting variable and a fuse number upper limit value of reburning;The fuse counting how many times variable initial value that reburns is 0;
Reburn fuse process when, the fuse counting how many times variable that reburns cumulative one, judgement is reburned fuse number meter
Whether number variable is less than or equal to fuse number upper limit value of reburning, if so, just carrying out current chip scorification silk process next time, if not
Then stop scorification silk.
More preferably, the method that scorification silk delivery rate is monitored in the chip testing, each chip carry out testing successively
Cheng Zhong, statistics are reburned the accumulated value of fuse counting how many times variable, by the accumulated value for the fuse counting how many times variable that reburns and chip
The ratio between sum burns the probability of continuous situation as chip fuse, if this probability higher than alarm if setting value.
The advantage of the invention is that:Process is trimmed to scorification silk in chip testing to be monitored in real time, can be found in time
The abnormal conditions of chip yield avoid the irreversible loss caused by fuse first time fuse burning is not in place.Go out when continuously
An existing scorification silk can not in place situation when can provide alarm in time.
Description of the drawings
Fig. 1 is the fuse-wires structure schematic diagram in chip.
Fig. 2 is that chip Internal fuse trims schematic diagram.
Fig. 3 is the scorification silk electrical schematic diagram of the present invention.
Fig. 4 is the embodiment of the present invention flow chart.
Specific implementation mode
With reference to specific drawings and examples, the invention will be further described.
In the present embodiment, the method that scorification silk delivery rate is monitored in chip testing includes the following steps:
Step S1 establishes a fuse truth table, as shown in the table;
Fuse quantity is four sections in this example, blows the reference voltage variable quantity of chip after certain section of fuse in fuse design process
In be beforehand with relevant regulations, in this example, caused reference voltage variable quantity is respectively after each section of fuse opening:-
12.5mV(T3-GND)、-25mV(T2-GND)、-50mV(T1-GND)、+100mV(T0-GND);T0-GND、T1-GND、T2-
GND, T3-GND represent four sections of fuses;
Reference voltage minimum reference value 500mv and highest reference value 700mv are equipped in fuse truth table;In fuse truth table
It is additionally provided with reference voltage standard value 600mv;In chip testing, if reference voltage measured value Vcs is fallen in reference voltage standard value institute
A reference voltage target zone (600mv~612.5mv) in, then chip is qualified, is trimmed without carrying out scorification silk;
The corresponding pass of each reference voltage measured value range of chip and the fuse for needing to blow is contained in fuse truth table
System;The expression of Digital Logic 1 is needed this section of fuse opening in upper table, and 0 indicates that the fuse of corresponding section is not dealt with;Such as the first row
In 1 (T0-GND) indicate reference voltage measured value Vcs between 500mV~512mV when need the fuse opening of T0-GND
The voltage of Vcs is set to be lifted to reference voltage target zone (600mv~612.5mv).
Fig. 3 is scorification silk electrical schematic diagram inside IC chip;TrimPower is scorification filament voltage;K0~K3 opens for relay
It closes;Before scorification silk, probe is contacted with the point (TPAD) that trims of fuse;Relay switch is closed, then scorification filament voltage is applied to phase
On the fuse answered;If probe and fuse trim point contact it is bad if scorification silk may be caused to fail.
It is as follows that chip testing and scorification silk trim process:
Step S2 carries out the test of a chip, (hereafter simple to monitor the chip reference voltage measured value Vcs measured
Claim Vcs) it falls for 562.5mV-575mV ranges;Need the fuse of fusing T0-GND, T1-GND, T3-GND;
Since Vcs is not below the minimum reference value 500mv of reference voltage, it is also not above reference voltage highest reference value
700mv, therefore the chip will not be determined as bad piece at once, in the case of other possible, if there is Vcs≤reference voltage most
Low reference value or Vcs >=reference voltage highest reference value directly judge that current chip is bad piece;When the minimum reference of reference voltage
Value<Vcs<Reference voltage highest reference value, then continue subsequent step;
Step S3 since Vcs is in a specific reference voltage measured value range 562.5mV-575mV, but does not have
It falls in reference voltage target zone 600mv~612.5mv, because this chip needs progress scorification silk to trim;In other possibility
In the case of, when Vcs is in a reference voltage target zone 600mv~612.5mv where reference voltage standard value, then core
Piece is qualified;If reference voltage measured value Vcs is outside reference voltage target zone, according to each reference voltage in fuse truth table
Measured value range and the correspondence of fuse for needing to blow, the corresponding chip of the specific reference voltage measured value range is each
Fuse is blown;
In this example, reference voltage measured value range 562.5mV-575mV is corresponding need the fuse that blows be T0-GND,
T1-GND、T3-GND;Therefore, closing relay switch K0, K1 and K3, to blow the molten of T0-GND, T1-GND, T3-GND
Silk;
Step S4 after scorification silk, measures chip reference voltage measured value Vcs, if Vcs is in reference voltage standard value again
Then chip scorification silk success, executes the test of next chip in one reference voltage target zone 600mv~612.5mv at place
Or the test of other projects;
If Vcs is not in reference voltage target zone 600mv~612.5mv, then carrying out fuse process of reburning;This
When according to the fuse for blowing the reference voltage actual change amount of each section of fuse with reference voltage theory variable quantity and judging correspondent section
It does not blow, is then back to step S3, carry out scorification silk process again;
For example, if the value of Vcs first times is 570mv, 562.5mV-575mV ranges are in, in requisition for blowing T0-
The fuse of GND, T1-GND, T3-GND, then reference voltage theory variable quantity be 100-50-12.5=37.5mv, if this three
Section fuse is all normally blown, then the value of Vcs can become 570+37.5=607.5mv, be in reference voltage target zone 600mv
In~612.5mv, chip is just qualified by once trimming;
And if T1-GND is not blown, reference voltage actual change amount is exactly 100-12.5v=87.5mv;From base
The difference 50mv of quasi- voltage actual change amount 87.5mv and reference voltage theory variable quantity 37.5mv can from fuse truth table
To judge that T1-GND fuses are not blown, to start fuse process of reburning.
The value of return to step S3, Vcs at this time is 570+87.5=657.5mv, falls into a specific reference voltage actual measurement
It is worth range 650-662.5mv, in requisition for blowing T1-GND fuses.
The above method is written into when implementing in a program, and program code enters endless loop in order to prevent, in Fig. 4
In the real-time monitoring modular of scorification silk of program, reburn fuse counting how many times variable and the fuse that reburns can be set
Number upper limit value (such as 10 times);The fuse counting how many times variable initial value that reburns is 0;Reburn fuse process when, reburn
Whether fuse counting how many times variable cumulative one, judgement reburn fuse counting how many times variable less than or equal to the fuse number upper limit of reburning
Value, if so, current chip scorification silk process next time is just carried out, if otherwise stopping scorification silk.
Each chip carries out in test process successively, counts the accumulated value for the fuse counting how many times variable that reburns, will scorification again
The accumulated value of silk counting how many times variable and the ratio between the sum of chip burn the probability of continuous situation as chip fuse, if this probability is high
In setting value then alarm.Prompt prompt staff confirms probe needle trace and contact resistance and is handled accordingly.
If fruit chip is all a scorification silk success, then the fuse counting how many times variable that reburns can keep 0;If 100
Chip, wherein there is 5 chips to carry out fuse process of once reburning, 2 chips have carried out each 2 times fuse processes of reburning, then
Above-mentioned probability is exactly 9%;The probability setting value of alarm can be scheduled on 10%, and alarm is carried out higher than 10%.
Claims (3)
1. a kind of method for monitoring scorification silk delivery rate in chip testing, includes the following steps:
Step S1 establishes a fuse truth table, contained in fuse truth table each reference voltage measured value range of chip with
Need the correspondence of fuse blown;At least two sections or more of the fuse quantity can cause after which part fuse opening
Reference voltage rises, and portions of fusing filaments can cause reference voltage to decline after blowing, and a benchmark electricity is corresponded to after each fuse opening
Press variable quantity;Reference voltage standard value is additionally provided in fuse truth table;
The minimum reference value of reference voltage and highest reference value are equipped in fuse truth table;
Step S2 carries out the test of a chip, the reference voltage measured value of monitoring chip;When reference voltage measured value≤benchmark
The minimum reference value of voltage, or >=reference voltage highest reference value directly judge that current chip is bad piece;When the minimum ginseng of reference voltage
Examine value<Reference voltage measured value<Reference voltage highest reference value, then continue subsequent step;
Step S3, reference voltage measured value falls into a specific reference voltage measured value range, if reference voltage measured value is fallen
In a reference voltage target zone where reference voltage standard value, then chip is qualified, if reference voltage measured value is in base
Outside quasi- voltage target range, then pair of the fuse blown with needs according to each reference voltage measured value range in fuse truth table
It should be related to, the corresponding each fuse of chip of the specific reference voltage measured value range is blown;
Step S4 measures chip reference voltage measured value, if obtained reference voltage measured value is fallen in reference voltage standard again
In a reference voltage target zone where being worth, then the success of chip scorification silk, executes the test of next chip or other projects
Test;
Otherwise, judge correspondent section with reference voltage theory variable quantity according to the reference voltage actual change amount for blowing each section of fuse
Fuse do not blow, be then back to step S3, carry out scorification silk process again.
2. the method for monitoring scorification silk delivery rate in chip testing as described in claim 1, it is characterised in that:
One reburn fuse counting how many times variable and a fuse number upper limit value of reburning are set;Reburn fuse counting how many times
Variable initial value is 0;
Reburn fuse process when, the fuse counting how many times variable that reburns cumulative one, judgement is reburned the change of fuse counting how many times
Whether amount is less than or equal to fuse number upper limit value of reburning, if so, current chip scorification silk process next time is just carried out, if otherwise stopping
Only scorification silk.
3. the method for monitoring scorification silk delivery rate in chip testing as claimed in claim 2, it is characterised in that:
Each chip carries out in test process successively, counts the accumulated value for the fuse counting how many times variable that reburns, and will reburn fuse
The ratio between the accumulated value of counting number variable and the sum of chip burn the probability of continuous situation as chip fuse, are set if this probability is higher than
Definite value then alarm.
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CN107544010B (en) * | 2016-06-28 | 2020-05-01 | 中芯国际集成电路制造(上海)有限公司 | Test equipment and test method |
CN106093755A (en) * | 2016-08-12 | 2016-11-09 | 上海宝司芯微电子有限公司 | Circuit and power management chip are tested in trimming of a kind of power management chip |
CN106405374A (en) * | 2016-08-30 | 2017-02-15 | 无锡中微腾芯电子有限公司 | Fuse burning method for reducing test error |
CN106370996B (en) * | 2016-08-30 | 2019-01-29 | 无锡中微腾芯电子有限公司 | A method of realizing that fuse trims using iterative method |
CN107785306B (en) * | 2016-08-30 | 2020-03-13 | 无锡华润上华科技有限公司 | Manufacturing method of fuse trimming chip |
CN107276151B (en) * | 2017-06-14 | 2019-09-13 | 南京中感微电子有限公司 | One kind trimming circuit and battery protection chip |
CN109450433B (en) * | 2018-08-02 | 2022-08-05 | 上海芯哲微电子科技股份有限公司 | Double-circuit integrated circuit trimming device |
CN111562806B (en) * | 2020-05-18 | 2024-06-04 | 拓尔微电子股份有限公司 | Reference source circuit for realizing low temperature coefficient voltage and current in CMOS process |
CN114428204B (en) * | 2020-10-29 | 2023-09-01 | 长鑫存储技术有限公司 | Chip output characteristic adjusting method and device |
US12002751B2 (en) | 2020-10-29 | 2024-06-04 | Changxin Memory Technologies, Inc. | Adjustment method and device for chip output characteristics |
CN112630628B (en) * | 2021-03-08 | 2021-05-18 | 上海伟测半导体科技股份有限公司 | Fuse device and method for polysilicon process fuse |
CN113448599A (en) * | 2021-06-16 | 2021-09-28 | 深圳天狼芯半导体有限公司 | Detection method, detection device, electronic equipment and readable storage medium |
CN114002588B (en) * | 2022-01-04 | 2022-04-29 | 苏州贝克微电子股份有限公司 | High-precision semiconductor chip trimming test method |
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