CN105446040A - ESD (Electro-Static discharge) protective unit, array substrate, display panel and display device - Google Patents
ESD (Electro-Static discharge) protective unit, array substrate, display panel and display device Download PDFInfo
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- CN105446040A CN105446040A CN201610006935.XA CN201610006935A CN105446040A CN 105446040 A CN105446040 A CN 105446040A CN 201610006935 A CN201610006935 A CN 201610006935A CN 105446040 A CN105446040 A CN 105446040A
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- 230000001681 protective effect Effects 0.000 title abstract description 11
- 239000000758 substrate Substances 0.000 title abstract description 3
- 239000010409 thin film Substances 0.000 claims abstract description 96
- 230000005611 electricity Effects 0.000 abstract description 7
- 230000003068 static effect Effects 0.000 abstract 6
- 230000015556 catabolic process Effects 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
- H01L27/027—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/04—Display protection
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Nonlinear Science (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention provides an ESD (Electro-Static discharge) protective unit, an array substrate, a display panel and a display device. The ESD protective unit comprises n levels of thin film transistors, wherein n is larger than or equal to 2; the control electrode of each level of thin film transistor is suspended in the air, the source electrode of the first level of thin film transistor is connected with a static electricity generation end, the drain electrodes of the first to (n-1)th levels of thin film transistors are connected with the source electrode of next level of thin film transistor, the drain electrode of the nth level of thin film transistor is connected with a static electricity discharge end. Or, n is larger than or equal to 3; the control electrode of each level of thin film transistor is suspended in the air, the source electrode of the first level of thin film transistor is connected with a first static electricity generation end, the drain electrodes of the first to (n-1)th levels of thin film transistors are connected with the source electrode of next level of thin film transistor, and the drain electrode of the nth level of thin film transistor is connected with a second static electricity generation end. The ESD protective unit can still protect signals in the static electricity generation end from being interfered with when ESD breaks down the thin film transistor adjacent to the static electricity generation end, so as to avoid the failure caused by the ESD.
Description
Technical field
The present invention relates to display technique field, particularly, relate to a kind of ESD protection unit, array base palte, display panel and display device.
Background technology
In panel display apparatus, Thin Film Transistor-LCD (TFT-LCD, ThinFilmTransistorLiquidCrystalDisplay) have that volume is little, low in energy consumption, manufacturing cost is relatively low and the feature such as radiationless, occupy leading position in current flat panel display market.Organic Light Emitting Diode (OLED, OrganicLight-EmittingDiode) display device, its display technique is different from traditional LCD display mode, without the need to backlight, adopt very thin coating of organic material and glass substrate, when have electric current by time, these organic materials will be luminous, therefore possesses the characteristics such as frivolous, power saving.
In the manufacturing process of described panel display apparatus, meeting Accumulating charge; These electric charges are when discharging, i.e. Electro-static Driven Comb (Electro-Staticdischarge, referred to as ESD) can electrostatic breakdown be caused, cause the image element circuit on the array base palte in display device abnormal, can cause the image element circuit short circuit on array base palte time serious, array base palte cannot normally work.Therefore need on array base palte, to form ESD protection unit in order to timely release electrostatic, prevent array base palte generation electrostatic damage.
Summary of the invention
The present invention is intended at least to solve one of technical matters existed in prior art; propose ESD protection unit, array base palte, display panel and display device; it can when the thin film transistor (TFT) that contiguous electrostatic generates end punctures by ESD; the signal still protecting electrostatic to generate in end is not disturbed, avoids causing bad generation because of ESD.
There is provided a kind of ESD protection unit for realizing object of the present invention, it comprises the n level thin film transistor (TFT) of connecting successively, n >=2; The control of every grade of thin film transistor (TFT) is extremely unsettled, source electrode and the electrostatic of the 1st grade of thin film transistor (TFT) generate to hold and are connected, the drain electrode of 1st ~ n-1 level thin film transistor (TFT) is connected with the source electrode of the thin film transistor (TFT) of next stage, and the drain electrode of n-th grade of thin film transistor (TFT) is connected with Electro-static Driven Comb end.
Wherein, described n=2.
Wherein, described electrostatic generation end comprises data line or grid line.
Wherein, described Electro-static Driven Comb end is public electrode.
Above-mentioned ESD protection unit provided by the invention, it comprises at least two-stage thin film transistor (TFT), when ESD causes the 1st grade of thin film transistor (TFT) breakdown, generate between end and Electro-static Driven Comb end at electrostatic and also have intact transistor, make described ESD protection unit still can provide protective action, can not lose efficacy, thus can keep not being connected between electrostatic generation end and Electro-static Driven Comb end, make Electro-static Driven Comb end can not produce interference to the signal that electrostatic generates in end, avoid causing bad generation because of ESD.
As another technical scheme, the present invention also provides another kind of ESD protection unit, and it comprises the n level thin film transistor (TFT) of connecting successively, n >=3; The control of every grade of thin film transistor (TFT) is extremely unsettled, source electrode and first electrostatic of the 1st grade of thin film transistor (TFT) generate to hold and are connected, the drain electrode of 1st ~ n-1 level thin film transistor (TFT) is connected with the source electrode of the thin film transistor (TFT) of next stage, and drain electrode and second electrostatic of n-th grade of thin film transistor (TFT) generate to hold and is connected.
Wherein, described n=3.
Wherein, described first electrostatic generation end and the second electrostatic generation end comprise data line or grid line.
The above-mentioned ESD protection unit that embodiment of the present invention provides, it comprises at least three grades of thin film transistor (TFT)s, the first electrostatic generate end and the second electrostatic generate end occur breakdown while that ESD causing the 1st grade of thin film transistor (TFT) and n-th grade of thin film transistor (TFT) simultaneously time, generate between end and the second electrostatic generation end at the first electrostatic and also have intact transistor, make described ESD protection unit still can provide protective action, can not lose efficacy, thus can keep not being connected between the first electrostatic generation end and the second electrostatic generation end, the signal that first electrostatic is generated in end and the second electrostatic generation end can not produce mutual interference, avoid causing bad generation because of ESD.
As another technical scheme, the present invention also provides a kind of array base palte, and it comprises above-mentioned ESD protection unit.
Array base palte provided by the invention, it adopts above-mentioned ESD protection unit provided by the invention, can when the thin film transistor (TFT) that contiguous electrostatic generates end punctures by ESD, and the signal still protecting electrostatic to generate in end is not disturbed, avoids causing bad generation because of ESD.
As another technical scheme, the present invention also provides a kind of display panel, and it comprises above-mentioned array base palte.
Display panel provided by the invention, it adopts above-mentioned array base palte provided by the invention, can when the thin film transistor (TFT) that contiguous electrostatic generates end punctures by ESD, and the signal still protecting electrostatic to generate in end is not disturbed, avoids causing bad generation because of ESD.
As another technical scheme, the present invention also provides a kind of display device, and it comprises above-mentioned display panel.
Display device provided by the invention, it adopts above-mentioned display panel provided by the invention, can when the thin film transistor (TFT) that contiguous electrostatic generates end punctures by ESD, and the signal still protecting electrostatic to generate in end is not disturbed, avoids causing bad generation because of ESD.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, and forms a part for instructions, is used from explanation the present invention, but is not construed as limiting the invention with embodiment one below.In the accompanying drawings:
Fig. 1 is the schematic diagram of ESD protection unit in embodiment of the present invention;
Fig. 2 is the schematic diagram of ESD protection unit when comprising two-stage thin film transistor (TFT);
Fig. 3 is the schematic diagram of another kind of ESD protection unit in embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in detail.Should be understood that, embodiment described herein, only for instruction and explanation of the present invention, is not limited to the present invention.
The invention provides a kind of embodiment of ESD protection unit.Fig. 1 is the schematic diagram of ESD protection unit in embodiment of the present invention.As shown in Figure 1, in the present embodiment, described ESD protection unit comprises the n level thin film transistor (TFT) of connecting successively, n >=2; The control of every grade of thin film transistor (TFT) is extremely unsettled, source electrode and the electrostatic of the 1st grade of thin film transistor (TFT) generate holds IN to be connected, the drain electrode of 1st ~ n-1 level thin film transistor (TFT) is connected with the source electrode of the thin film transistor (TFT) of next stage, and the drain electrode of n-th grade of thin film transistor (TFT) is connected with Electro-static Driven Comb end OUT.
In the present embodiment, the electric charge release in end IN is generated when electrostatic, namely when ESD occurs, electric charge transmits to Electro-static Driven Comb end OUT, if electric charge is comparatively large, the 1st grade of thin film transistor (TFT) can puncture by it, cause source electrode and the drain electrode short circuit of the 1st grade of thin film transistor (TFT), or grid and drain electrode short circuit, in the process, described electric charge is released.Usually, ESD is after puncturing the 1st grade of thin film transistor (TFT), be not enough to puncture the 2nd grade of thin film transistor (TFT), therefore, for the source electrode of the 1st grade of thin film transistor (TFT) and the short circuit that drains because of ESD, now, electrostatic generates between end IN and Electro-static Driven Comb end OUT also has intact 2nd ~ n level thin film transistor (TFT), is not connected for keeping the two; Like this when the 1st grade of thin film transistor (TFT) is breakdown, ESD protection unit still can ensure that Electro-static Driven Comb end OUT can not produce interference to the signal that electrostatic generates in end IN, avoids causing bad generation because of ESD.
Particularly, described electrostatic generates end IN and comprises data line or grid line equisignal line, and described Electro-static Driven Comb end OUT is public electrode.In practice, described ESD protection unit, by the Electro-static Driven Comb in data line or grid line, ensures the stable of signal in data line or grid line.
In the present embodiment, the value of described n can be 2, and namely ESD protection unit comprises two-stage thin film transistor (TFT).Particularly, as shown in Figure 2, described ESD protection unit comprises the first transistor M1 and transistor seconds M2, all unsettled setting (floating) in control pole (i.e. grid) of described the first transistor M1 and transistor seconds M2; Source electrode and the electrostatic of the first transistor M1 generate holds IN to be connected, and drain electrode is connected with the source electrode of transistor seconds M2; And the drain electrode of transistor seconds M2 is connected with Electro-static Driven Comb end OUT.In reality, because general ESD can not puncture continuous print two-stage thin film transistor (TFT), arrange like this and while certain ESD protective action is provided, the structure of ESD protection unit can be made as much as possible more simple, be conducive to reducing costs.
ESD protection unit provided by the invention, it comprises at least two-stage thin film transistor (TFT), when ESD causes the 1st grade of thin film transistor (TFT) breakdown, generate between end IN and Electro-static Driven Comb end OUT at electrostatic and also have intact transistor, make described ESD protection unit still can provide protective action, can not lose efficacy, thus can keep not being connected between electrostatic generation end IN and Electro-static Driven Comb end OUT, make Electro-static Driven Comb end OUT can not produce interference to the signal that electrostatic generates in end IN, avoid causing bad generation because of ESD.
Figure 2 shows that the situation of the minimum number of thin film transistor (TFT) in ESD protection unit, even if but in the case, usually, when the first transistor M1 is breakdown, such as, when its source electrode and drain electrode short circuit, still having transistor seconds M2 makes electrostatic generation end IN not be connected with Electro-static Driven Comb end OUT, makes described ESD protection unit still can provide protection, and can not lose efficacy.And, when n > 2, electrostatic generates between end IN and Electro-static Driven Comb end OUT in order to keep the quantity of the thin film transistor (TFT) connected both it also can be more, thus, even if when two-stage or more level (mostly being n-1 level most) thin film transistor (TFT) punctures by ESD, also electrostatic can be kept to generate between end IN and Electro-static Driven Comb end OUT be not connected, described ESD protection unit can not be lost efficacy.
The present invention also provides the embodiment of another kind of ESD protection unit.Fig. 3 is the schematic diagram of another kind of ESD protection unit in embodiment of the present invention.As shown in Figure 3, in the present embodiment, described ESD protection unit comprises the n level thin film transistor (TFT) of connecting successively, n >=3; The control of every grade of thin film transistor (TFT) is extremely unsettled, source electrode and first electrostatic of the 1st grade of thin film transistor (TFT) generate holds IN1 to be connected, the drain electrode of 1st ~ n-1 level thin film transistor (TFT) is connected with the source electrode of the thin film transistor (TFT) of next stage, and drain electrode and second electrostatic of n-th grade of thin film transistor (TFT) generate holds IN2 to be connected.Particularly, described first electrostatic generates and holds IN1 and the second electrostatic generation end IN2 to comprise data line or grid line equisignal line.
In the present embodiment, the electric charge release in end IN1 is generated when the first electrostatic, namely when ESD occurs, electric charge generates end IN2 to the second electricity and transmits, if electric charge is comparatively large, the 1st grade of thin film transistor (TFT) can puncture by it, cause source electrode and the drain electrode short circuit of the 1st grade of thin film transistor (TFT), or grid and drain electrode short circuit, in the process, described electric charge is released.Similarly, when generating the electric charge release in end IN2 when the second electrostatic, if electric charge is larger, n-th grade of thin film transistor (TFT) can be punctured, cause source electrode and the drain electrode short circuit of n-th grade of thin film transistor (TFT), or grid and drain electrode short circuit, in the process, described electric charge is released.Usually, ESD is after puncturing one-level thin film transistor (TFT), be not enough to puncture next stage thin film transistor (TFT), therefore, for the source electrode of the 1st grade of thin film transistor (TFT) and n-th grade of thin film transistor (TFT) and the drain electrode short circuit because of ESD simultaneously, now, the first electrostatic generates end IN1 and the second electrostatic generates 2nd ~ n-1 level thin film transistor (TFT) intact in addition between end IN2, is not connected for keeping the two; And when n is its minimum value 3, the quantity that first electrostatic generates thin film transistor (TFT) intact between end IN1 and the second electrostatic generation end IN2 yet has one-level, i.e. the 2nd grade of thin film transistor (TFT), like this when the 1st grade of thin film transistor (TFT) and n-th grade of thin film transistor (TFT) breakdown, ESD protection unit still can improve protective action, can not lose efficacy, and ensure that the first electrostatic generates end IN1 and the second electrostatic generates the mutual interference that can not produce signal between end IN2, avoid causing bad generation because of ESD.And when the value of n is larger, the quantity of thin film transistor (TFT) intact between the first electrostatic generation end IN1 and the second electrostatic generation end IN2 also can be more, even if thus when first electrostatic generate end IN1 and the second electrostatic generate end IN2 occur ESD two-stage or more level (mostly being n-1 level most) thin film transistor (TFT) is punctured, also the first electrostatic can be kept to generate between end IN1 and the second electrostatic generation end IN2 be not connected, described ESD protection unit can not be lost efficacy.
Preferably, described n=3, namely ESD protection unit comprises three grades of thin film transistor (TFT)s.In reality, because general ESD can not puncture continuous print two-stage thin film transistor (TFT), arrange like this and while certain ESD protective action is provided, the structure of ESD protection unit can be made as much as possible more simple, be conducive to reducing costs.
This another kind of ESD protection unit that embodiment of the present invention provides, it comprises at least three grades of thin film transistor (TFT)s, the first electrostatic generate end IN1 and the second electrostatic generate end IN2 occur simultaneously ESD cause the 1st grade of thin film transistor (TFT) and n-th grade of thin film transistor (TFT) simultaneously breakdown time, generate between end IN1 and the second electrostatic generation end IN2 at the first electrostatic and also have intact transistor, make described ESD protection unit still can provide protective action, can not lose efficacy, thus can keep not being connected between the first electrostatic generation end IN1 and the second electrostatic generation end IN2, the signal that first electrostatic is generated in end IN1 and the second electrostatic generation end IN2 can not produce mutual interference, avoid causing bad generation because of ESD.
The present invention also provides a kind of embodiment of array base palte.In the present embodiment, described array base palte comprises the first ESD protection unit above-mentioned or the second ESD protection unit.
The array base palte that embodiment of the present invention provides; its ESD protection unit adopting the above-mentioned embodiment of the present invention to provide; can when the thin film transistor (TFT) that contiguous electrostatic generates end puncture by ESD, the signal still protecting electrostatic to generate in end is not disturbed, avoids causing bad generation because of ESD.
The present invention also provides a kind of embodiment of display panel.In the present embodiment, described display panel comprises above-mentioned array base palte.
The display panel that embodiment of the present invention provides; its array base palte adopting the above-mentioned embodiment of the present invention to provide; can when the thin film transistor (TFT) that contiguous electrostatic generates end puncture by ESD, the signal still protecting electrostatic to generate in end is not disturbed, avoids causing bad generation because of ESD.
The present invention also provides a kind of embodiment of display device.In the present embodiment, described display device comprises above-mentioned display panel.
The display device that embodiment of the present invention provides; its display panel adopting the above-mentioned embodiment of the present invention to provide; can when the thin film transistor (TFT) that contiguous electrostatic generates end puncture by ESD, the signal still protecting electrostatic to generate in end is not disturbed, avoids causing bad generation because of ESD.
Be understandable that, the illustrative embodiments that above embodiment is only used to principle of the present invention is described and adopts, but the present invention is not limited thereto.For those skilled in the art, without departing from the spirit and substance in the present invention, can make various modification and improvement, these modification and improvement are also considered as protection scope of the present invention.
Claims (10)
1. an ESD protection unit, is characterized in that, comprises the n level thin film transistor (TFT) of connecting successively, n >=2; The control of every grade of thin film transistor (TFT) is extremely unsettled, source electrode and the electrostatic of the 1st grade of thin film transistor (TFT) generate to hold and are connected, the drain electrode of 1st ~ n-1 level thin film transistor (TFT) is connected with the source electrode of the thin film transistor (TFT) of next stage, and the drain electrode of n-th grade of thin film transistor (TFT) is connected with Electro-static Driven Comb end.
2. ESD protection unit according to claim 1, is characterized in that, described n=2.
3. ESD protection unit according to claim 1, is characterized in that, described electrostatic generates end and comprises data line or grid line.
4. ESD protection unit according to claim 1, is characterized in that, described Electro-static Driven Comb end is public electrode.
5. an ESD protection unit, is characterized in that, comprises the n level thin film transistor (TFT) of connecting successively, n >=3; The control of every grade of thin film transistor (TFT) is extremely unsettled, source electrode and first electrostatic of the 1st grade of thin film transistor (TFT) generate to hold and are connected, the drain electrode of 1st ~ n-1 level thin film transistor (TFT) is connected with the source electrode of the thin film transistor (TFT) of next stage, and drain electrode and second electrostatic of n-th grade of thin film transistor (TFT) generate to hold and is connected.
6. ESD protection unit according to claim 5, is characterized in that, described n=3.
7. ESD protection unit according to claim 5, is characterized in that, described first electrostatic generates end and the second electrostatic generation end comprises data line or grid line.
8. an array base palte, is characterized in that, comprises the ESD protection unit described in Claims 1 to 4 any one, or comprises the ESD protection unit described in claim 5 ~ 7 any one.
9. a display panel, is characterized in that, comprises array base palte according to claim 8.
10. a display device, is characterized in that, comprises display panel according to claim 9.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610006935.XA CN105446040A (en) | 2016-01-05 | 2016-01-05 | ESD (Electro-Static discharge) protective unit, array substrate, display panel and display device |
| US15/216,744 US20170193886A1 (en) | 2016-01-05 | 2016-07-22 | Electro-static Discharge Protection Unit, Array Substrate, Display Panel and Display Device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201610006935.XA CN105446040A (en) | 2016-01-05 | 2016-01-05 | ESD (Electro-Static discharge) protective unit, array substrate, display panel and display device |
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| CN105446040A true CN105446040A (en) | 2016-03-30 |
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| CN201610006935.XA Pending CN105446040A (en) | 2016-01-05 | 2016-01-05 | ESD (Electro-Static discharge) protective unit, array substrate, display panel and display device |
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| US (1) | US20170193886A1 (en) |
| CN (1) | CN105446040A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106019115A (en) * | 2016-07-13 | 2016-10-12 | 武汉华星光电技术有限公司 | Test circuit |
| CN107290908A (en) * | 2017-06-23 | 2017-10-24 | 武汉华星光电技术有限公司 | Electrostatic discharge protective circuit and liquid crystal display panel |
| CN107833883A (en) * | 2017-10-18 | 2018-03-23 | 深圳市华星光电半导体显示技术有限公司 | A kind of electrostatic discharge protection circuit structure, display panel and display device |
| CN108254982A (en) * | 2016-12-28 | 2018-07-06 | 乐金显示有限公司 | Display device |
| CN108732839A (en) * | 2018-05-30 | 2018-11-02 | 南京中电熊猫平板显示科技有限公司 | Electrostatic discharge protection circuit, electrostatic protection module and liquid crystal display device |
| CN108803167A (en) * | 2018-05-30 | 2018-11-13 | 南京中电熊猫平板显示科技有限公司 | Electrostatic discharge protection circuit, electrostatic protection module and liquid crystal display device |
| CN109599439A (en) * | 2017-12-28 | 2019-04-09 | 新唐科技股份有限公司 | Transverse diffusion metal oxide semiconductor field effect transistor |
| WO2020253397A1 (en) * | 2019-06-19 | 2020-12-24 | 京东方科技集团股份有限公司 | Array substrate, display panel, and display device |
| CN115633526A (en) * | 2022-12-21 | 2023-01-20 | 固安翌光科技有限公司 | Light emitting device and method for manufacturing light emitting device |
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| CN106019115B (en) * | 2016-07-13 | 2018-09-04 | 武汉华星光电技术有限公司 | test circuit |
| CN106019115A (en) * | 2016-07-13 | 2016-10-12 | 武汉华星光电技术有限公司 | Test circuit |
| CN108254982B (en) * | 2016-12-28 | 2021-02-26 | 乐金显示有限公司 | Display device |
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| CN107290908A (en) * | 2017-06-23 | 2017-10-24 | 武汉华星光电技术有限公司 | Electrostatic discharge protective circuit and liquid crystal display panel |
| CN107833883A (en) * | 2017-10-18 | 2018-03-23 | 深圳市华星光电半导体显示技术有限公司 | A kind of electrostatic discharge protection circuit structure, display panel and display device |
| CN109599439A (en) * | 2017-12-28 | 2019-04-09 | 新唐科技股份有限公司 | Transverse diffusion metal oxide semiconductor field effect transistor |
| CN109599439B (en) * | 2017-12-28 | 2021-11-16 | 新唐科技股份有限公司 | Lateral diffusion metal oxide semiconductor field effect transistor |
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| WO2020253397A1 (en) * | 2019-06-19 | 2020-12-24 | 京东方科技集团股份有限公司 | Array substrate, display panel, and display device |
| CN115633526A (en) * | 2022-12-21 | 2023-01-20 | 固安翌光科技有限公司 | Light emitting device and method for manufacturing light emitting device |
| CN115633526B (en) * | 2022-12-21 | 2023-04-07 | 固安翌光科技有限公司 | Light emitting device and method for manufacturing light emitting device |
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| US20170193886A1 (en) | 2017-07-06 |
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Application publication date: 20160330 |