CN1766722A - Thin film transistor array substrate, liquid crystal display panel and electrostatic protection method thereof - Google Patents
Thin film transistor array substrate, liquid crystal display panel and electrostatic protection method thereof Download PDFInfo
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- CN1766722A CN1766722A CN 200410086203 CN200410086203A CN1766722A CN 1766722 A CN1766722 A CN 1766722A CN 200410086203 CN200410086203 CN 200410086203 CN 200410086203 A CN200410086203 A CN 200410086203A CN 1766722 A CN1766722 A CN 1766722A
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Abstract
The invention relates to a thin film transistor array base plate and liquid crystal display plane and antistatic method. The thin film transistor array base plate comprises a base plate, a plurality of image element structures, a plurality of switch units, a plurality of lead wires and a plurality of electrostatic discharge preserving circuits. The plate has display area and around circuit area; the image element structures are positioned inside the display area; the switch units are positioned inside the around circuit area. The lead wires are positioned on the base plate and coupled between the image element structures and the switch units; the electrostatic discharge preserving circuits are positioned inside the around circuit area and each electrostatic discharge preserving circuit is coupled with a switch unit.
Description
Technical field
The invention relates to a kind of component array baseplate, display panel and electrostatic protection method thereof, and particularly about the invention of a kind of thin-film transistor array base-plate, display panels and electrostatic protection method thereof.
Background technology
Along with the high development of multimedia technology, the transmission of image information at present transfers digital transmission to by simulation mostly, and in order to cooperate modern life pattern, it is frivolous that the volume of video or image device also day by day is tending towards.Traditional cathode-ray tube (CRT) (Cathode RayTube, CRT) though display has advantages such as excellent display quality and low cost, but because the structure in its internal electron chamber, make display can't meet the demand of slimming, lightweight and low consumpting power, and the user also exist when watching radiant rays to hinder problems such as eye.In recent years, because the maturation of photoelectric technology and semiconductor fabrication, also drive the flourish of flat-panel screens (Flat Panel Display), LCD (Liquid Crystal Display wherein, LCD) based on advantage such as its low voltage operating, radiationless line scattering, in light weight and volume be little, replace traditional cathode-ray tube display more gradually, and become the main flow of display product.
LCD mainly comprises display panels (liquid crystalpanel) and backlight module (backlight module), wherein display panels is by colored optical filtering substrates (Color Filter, C/F), thin-film transistor array base-plate (thin film transistor array) and the liquid crystal layer that is arranged between this two substrates constitute, and backlight module is in order to provide this display panels required area source, so that LCD reaches the effect of demonstration.In addition, thin-film transistor array base-plate can be divided into viewing area (display region) and periphery circuit region (peripheral circuit region), wherein be provided with a plurality of dot structures in the viewing area, comprise a plurality of with the thin film transistor (TFT) of arrayed and the pixel electrode (pixelelectrode) of corresponding setting with thin film transistor (TFT), and be provided with many gate wirings (gateline) and source electrode distribution (source line) in the periphery circuit region, be coupled to the thin film transistor (TFT) in the viewing area, reverse in order to the liquid crystal that drives the pixel electrode top.
In the manufacturing process of thin-film transistor array base-plate, can carry out electro-detection to the dot structure on the substrate usually, could normal operation to judge dot structure, and bad element (as thin film transistor (TFT), pixel electrode etc.) or circuit repaired.The mode of known detection can be divided into contact and contactless two kinds, wherein the detection mode of contact directly contacts the external contact of gate wirings and source electrode distribution with probe (probe), and by test machine (tester) input test signal, successively each thin film transistor (TFT) is carried out electro-detection.In addition, contactless detection mode utilizes many test circuits to be connected in series the gate wirings of odd number bar, the gate wirings of even number bar, the source electrode distribution of odd number bar and the source electrode distribution of even number bar respectively, and input end input test signal by test circuit, be used as signal receiving end with contactless optical module again, to judge whether normal operation of thin film transistor (TFT).
In addition, display panels usually can be because external factor, for example artificial carrying or environmental change etc., and in panel, produce the phenomenon of buildup of static electricity.Thus, just possible because of static discharge after electric charge is accumulate to some, and cause circuit or thin film transistor (TFT) on the thin-film transistor array base-plate to wreck.As is generally known; for avoiding the problem of electrostatic breakdown; usually outside antistatic ring (outer short ring) can be set in the periphery circuit region of thin-film transistor array base-plate; by a plurality of on-off element serial connection gate wirings and source electrode distribution; when the static on distribution or the thin film transistor (TFT) overloads; just can open on-off element and electrostatic charge is dispersed on the outside antistatic ring, to reach the function of electrostatic defending.
Yet, as is generally known, if desire the non-contact detection and the antistatic protection function that reach above-mentioned, must be in the periphery circuit region of thin-film transistor array base-plate manufacturing test circuit and outside antistatic ring simultaneously.Thus, make that not only the layout of peripheral circuit is more complicated, also may produce the problem of wiring space deficiency, the simplification that therefore is unfavorable for manufacturing process relatively with the raising of production efficiency.
Summary of the invention
In view of this, the purpose of this invention is to provide a kind of thin-film transistor array base-plate, this substrate provides the function of electrostatic defending by original test circuit, to simplify circuit layout, shortens manufacturing process time.
Another object of the present invention provides a kind of display panels, and this substrate provides the function of electrostatic defending by the original test circuit on the thin-film transistor array base-plate, to reach the simplification circuit layout, shortens the purpose of manufacturing process time.
A further object of the present invention provides a kind of electrostatic protection method, and this method provides the function of electrostatic defending by the original test circuit on the thin-film transistor array base-plate, simplifying circuit layout, and then enhances productivity.
Based on above-mentioned or other purpose, the present invention proposes a kind of thin-film transistor array base-plate, for example comprises substrate, a plurality of dot structure, a plurality of on-off element, a plurality of leads and many ESD protection circuits.Wherein, substrate for example has viewing area and periphery circuit region, and dot structure is arranged in the viewing area, and on-off element is arranged in the periphery circuit region.In addition, lead-in wire is arranged on the substrate, and correspondence is coupled between dot structure and the on-off element, and ESD protection circuit is arranged in the periphery circuit region, and each ESD protection circuit is coupled to the on-off element of part.
Based on above-mentioned or other purpose, the present invention also proposes a kind of display panels, comprise colored optical filtering substrates, thin-film transistor array base-plate and be arranged at colored optical filtering substrates and thin-film transistor array base-plate between liquid crystal layer.Thin-film transistor array base-plate for example comprises substrate, a plurality of dot structure, a plurality of on-off element, a plurality of leads and many ESD protection circuits; wherein substrate for example has viewing area and periphery circuit region; and dot structure is arranged in the viewing area, and on-off element is arranged in the periphery circuit region.In addition, lead-in wire is arranged on the substrate, and correspondence is coupled between dot structure and the on-off element, and ESD protection circuit is arranged in the periphery circuit region, and each ESD protection circuit system is coupled to the on-off element of part.
Based on above-mentioned or other purpose; the present invention proposes another kind of thin-film transistor array base-plate again, for example comprises substrate, many gate wirings, many source electrode distributions, a plurality of thin film transistor (TFT), a plurality of pixel electrode, a plurality of on-off element, first ESD protection circuit, second ESD protection circuit, the 3rd ESD protection circuit and the 4th ESD protection circuits.Wherein, substrate for example has viewing area and periphery circuit region, and gate wirings and source electrode distribution are arranged on the substrate, and marks off a plurality of pixel regions in the viewing area.In addition, each thin film transistor (TFT) one of is arranged in the pixel region in the zone, and thin film transistor (TFT) drives by gate wirings and source electrode distribution, and each pixel electrode is arranged in one of pixel region zone, with corresponding thin film transistor (TFT) in one of be electrically connected.On-off element is arranged in the periphery circuit region, and wherein the on-off element correspondence is coupled to gate wirings and source electrode distribution.In addition; first ESD protection circuit; second ESD protection circuit; the 3rd ESD protection circuit and the 4th ESD protection circuit are arranged in the periphery circuit region; wherein first ESD protection circuit is coupled to the gate wirings of odd number bar by the part on-off element; second ESD protection circuit system is coupled to the gate wirings of even number bar by the part on-off element; the 3rd ESD protection circuit is the source electrode distribution that is coupled to the odd number bar by the part on-off element, and the 4th ESD protection circuit system is coupled to the source electrode distribution of even number bar by the part on-off element.
Based on above-mentioned or other purpose, the present invention proposes a kind of electrostatic protection method, is applicable to thin-film transistor array base-plate and display panels that the present invention is above-mentioned.Wherein, when lead-in wire was gone up the accumulation excessive charge, the thin film transistor (TFT) of its correspondence was opening, so that electric charge is dispersed to the ESD protection circuit of correspondence.
Based on above-mentioned explanation, the present invention's thin-film transistor array base-plate, display panels with and electrostatic protection method adopt the test circuit that originally was used for electrical testing, be used as the ESD protection circuit of electrostatic defending.Thus, not only can provide the effect of electrostatic defending, and not need additionally to make electrostatic discharge protection circuit, thereby help to simplify circuit layout, shorten manufacturing process time.
State with other purpose, feature and advantage and can become apparent on the present invention for allowing, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 is the synoptic diagram of a kind of display panels of the present invention's preferred embodiment.
Fig. 2 is provided with synoptic diagram for the circuit of the thin-film transistor array base-plate of Fig. 1.
Fig. 3 A～3D is respectively in the present invention's the thin-film transistor array base-plate, plants the synoptic diagram of different set-up modes more than the on-off element.
The main element description of symbols
100: display panels
110: colored optical filtering substrates
112: light filter film
120: liquid crystal layer
122: fluid sealant
130: thin-film transistor array base-plate
130a: viewing area
130b: periphery circuit region
132: dot structure
134: lead-in wire
136: gate wirings
138: the source electrode distribution
150: substrate
152: pixel region
162: thin film transistor (TFT)
164: pixel electrode
172: the first ESD protection circuits
174: the second ESD protection circuits
176: the three ESD protection circuits
178: the four ESD protection circuits
180: on-off element
300: distribution
310: ESD protection circuit
320: thin film transistor (TFT)
Embodiment
Please refer to Fig. 1, Fig. 1 is the synoptic diagram of a kind of display panels of the present invention's preferred embodiment, and wherein for asking the simplification accompanying drawing, Fig. 1 only represents to illustrate required member.Display panels 100 for example comprises colored optical filtering substrates 110, liquid crystal layer 120 and thin-film transistor array base-plate 130, wherein, colored optical filtering substrates 110 is bonded with each other by fluid sealant 122 with thin-film transistor array base-plate 130, and liquid crystal layer 120 is arranged in colored optical filtering substrates 110, thin-film transistor array base-plate 130 and the fluid sealant 122 formed enclosure spaces.In addition, for example be provided with a plurality of light filter films 112 on the colored optical filtering substrates 110, and thin-film transistor array base-plate 130 for example can be divided into viewing area 130a and periphery circuit region 130b.Wherein, for example be provided with a plurality of dot structures 132 in the 130a of viewing area corresponding to light filter film 112, and be provided with a plurality of leads 134 in the periphery circuit region 130b, for example be gate wirings 136 or source electrode distribution 138 (being shown in Fig. 2), with usefulness as display panels 100 drivings.
Please refer to Fig. 2, Fig. 2 is the synoptic diagram that the circuit of the thin-film transistor array base-plate of presentation graphs 1 is provided with.For example be provided with many gate wirings 136 and many source electrode distributions 138 on the substrate 150 (being shown in Fig. 1) of thin-film transistor array base-plate 130, wherein gate wirings 136 marks off a plurality of pixel regions 152 with source electrode distribution 138 in the 130a of viewing area, and for example be provided with thin film transistor (TFT) 162 in each pixel region 152, be coupled to gate wirings 136 and source electrode distribution 138, to drive by gate wirings 136 and source electrode distribution 138.In addition, also have pixel electrode 164 in each pixel region 152, be coupled to the thin film transistor (TFT) 162 in the same pixel region 152, to constitute dot structure 132.When thin film transistor (TFT) 162 was write drive signal, the interior liquid crystal molecule of liquid crystal layer 120 (being shown in Fig. 1) that pixel electrode 164 can drive the top reversed, to reach the purpose of demonstration.
Refer again to Fig. 2; be provided with many ESD protection circuits in the periphery circuit region 130b of thin-film transistor array base-plate 130; it for example comprises first ESD protection circuit 172; second ESD protection circuit 174; the 3rd ESD protection circuit 176 and the 4th ESD protection circuit 178; and first ESD protection circuit 172; second ESD protection circuit 174; the 3rd ESD protection circuit 176 and the 4th ESD protection circuit 178 for example pass through on-off element 180 respectively, and are coupled to the gate wirings 136 of odd number bar; the gate wirings 136 of even number bar; the source electrode distribution 138 of odd number bar and the source electrode distribution 138 of even number bar.Wherein, on-off element 180 for example is thin film transistor (TFT) or other semiconductor element.
Accept above-mentioned; the present invention can pass through first ESD protection circuit 172, second ESD protection circuit 174, the 3rd ESD protection circuit 176 and the 4th ESD protection circuit 178; and in the manufacturing process of thin-film transistor array base-plate, carry out known contactless electro-detection; the ordinary skill that right its detection mode should be technical field that the present invention belongs to is known, this no longer superfluous stating.
What deserves to be mentioned is that the present invention also can provide the function of electrostatic defending simultaneously by above-mentioned first ESD protection circuit 172, second ESD protection circuit 174, the 3rd ESD protection circuit 176 and the 4th ESD protection circuit 178.Please refer to the electrostatic charge of representing with arrow among Fig. 2 and disperse the path; for example; when display panels 100 (being shown in Fig. 1) is carried or other external factor because of artificial; and when on a certain dot structure 132 of thin-film transistor array base-plate 110, producing excessive buildup of static electricity; on-off element 180 on a certain odd number bar gate wirings 136 that couples of dot structure 132 just presents the state of unlatching therewith, and makes the electrostatic charge that accumulates on dot structure 132 and gate wirings 136 be dispersed in first ESD protection circuit 172.Afterwards, also for example can the electrostatic charge conduction be dispersed on other element, to reach better electrostatic protection effect by first ESD protection circuit 172.Certainly, in other preferred embodiment, the electric charge that the buildup of static electricity of diverse location can have difference disperses the path, no longer repeats to give unnecessary details at this.
It should be noted that the represented thin-film transistor array base-plate of the foregoing description only is usefulness for example, it is not in order to limit the present invention.In other embodiment of the present invention, when can the number and the set-up mode of ESD protection circuit being changed, and the design of the more visual electro-detection of connected mode of ESD protection circuit and gate wirings or source electrode distribution or circuit layout and different.
In addition, the form or the number of the on-off element 180 (as shown in Figure 2) that is connected in series on each gate wirings of the present invention or each the source electrode distribution also can change with actual demand.Please refer to Fig. 3 A～3D, these accompanying drawings are to represent respectively in the present invention's the thin-film transistor array base-plate, plant the synoptic diagram of different set-up modes more than the on-off element.As shown in Figure 3A, for example can be connected in series single thin film transistor (TFT) 320 between each distribution 300 (as gate wirings or source electrode distribution) and the ESD protection circuit 310, with as on-off element.In addition, shown in Fig. 3 B, at least two thin film transistor (TFT)s 320 of for example can connecting between each distribution 300 and the ESD protection circuit 310.In addition, shown in Fig. 3 C, for example also can at least two thin film transistor (TFT)s 320 in parallel between each distribution 300 and the ESD protection circuit 310.Moreover, shown in Fig. 3 D, for example also can connect and a plurality of thin film transistor (TFT) 320 in parallel between each distribution 300 and the ESD protection circuit 310.Above-mentioned combination with multiple thin film transistor (TFT) with the advantage of the design that constitutes each on-off element is, when a film crystal tube failure wherein, still has other thin film transistor (TFT) can normal operation.
In sum, the present invention's thin-film transistor array base-plate, display panels with and electrostatic protection method adopt the test circuit that originally was used for electrical testing, be used as the ESD protection circuit of electrostatic defending.Wherein, whether the output by the on-off element may command electrostatic charge on the ESD protection circuit, so that excessive electric charge is dispersed on the ESD protection circuit.In other words, the present invention's ESD protection circuit not only can more can provide the effect of electrostatic defending simultaneously as contactless testing circuit in manufacturing process.Therefore, the present invention's thin-film transistor array base-plate, display panels with and electrostatic protection method can not need additionally to make electrostatic discharge protection circuit, so help to simplify the circuit layout of the periphery circuit region of thin-film transistor array base-plate, and then shorten manufacturing process time, enhance productivity.
Though the present invention with preferred embodiment openly as above; right its is not in order to limit the present invention; the ordinary skill of any technical field that the present invention belongs to; in thought that does not break away from the present invention and scope; when can doing a little change and improvement, so the present invention's protection domain is as the criterion when looking claims person of defining.
Claims (22)
1. thin-film transistor array base-plate is characterized in that comprising:
Substrate has viewing area and periphery circuit region;
A plurality of dot structures are arranged in this viewing area;
A plurality of on-off elements are arranged in this periphery circuit region;
A plurality of leads is arranged on this substrate, and these lead-in wire correspondences are coupled between these dot structures and these on-off elements; And
Many ESD protection circuits are arranged in this periphery circuit region, and each these ESD protection circuit is coupled to these corresponding on-off elements.
2. the thin-film transistor array base-plate according to claim 1 is characterized in that these lead-in wires comprise many gate wirings and many source electrode distributions.
3. the thin-film transistor array base-plate according to claim 2 is characterized in that these ESD protection circuits comprise:
First ESD protection circuit is coupled to these gate wirings of odd number bar;
Second ESD protection circuit is coupled to these gate wirings of even number bar;
The 3rd ESD protection circuit is coupled to these source electrode distributions of odd number bar; And
The 4th ESD protection circuit is coupled to these source electrode distributions of even number bar.
4. the thin-film transistor array base-plate according to claim 1 is characterized in that these on-off elements comprise thin film transistor (TFT).
5. the thin-film transistor array base-plate according to claim 1 is characterized in that each these on-off element is made of at least two thin film transistor (TFT) series connection.
6. the thin-film transistor array base-plate according to claim 1 is characterized in that each these on-off element is made of at least two thin film transistor (TFT)s institute in parallel.
7. the thin-film transistor array base-plate according to claim 1 is characterized in that each these on-off element is made of a plurality of thin film transistor (TFT)s parallel connections and series connection institute.
8. display panels is characterized in that comprising:
Colored optical filtering substrates;
Thin-film transistor array base-plate has viewing area and periphery circuit region, comprising:
A plurality of dot structures are arranged in this viewing area;
A plurality of on-off elements are arranged in this periphery circuit region;
A plurality of leads is arranged on this substrate, and these lead-in wire correspondences are coupled between these dot structures and these on-off elements;
Many ESD protection circuits are arranged in this periphery circuit region, and each these ESD protection circuit is coupled to these on-off elements of part; And
Liquid crystal layer is arranged between this colored optical filtering substrates and this thin-film transistor array base-plate.
9. described according to Claim 8 display panels is characterized in that these lead-in wires comprise many gate wirings and many source electrode distributions.
10. the display panels according to claim 9 is characterized in that these ESD protection circuits comprise:
First ESD protection circuit is coupled to these gate wirings of odd number bar;
Second ESD protection circuit is coupled to these gate wirings of even number bar;
The 3rd ESD protection circuit is coupled to these source electrode distributions of odd number bar; And
The 4th ESD protection circuit is coupled to these source electrode distributions of even number bar.
11. described according to Claim 8 display panels is characterized in that these on-off elements comprise thin film transistor (TFT).
12. described according to Claim 8 display panels is characterized in that each these on-off element is made of at least two thin film transistor (TFT) series connection.
13. described according to Claim 8 display panels is characterized in that each these on-off element is made of at least two thin film transistor (TFT)s institute in parallel.
14. described according to Claim 8 display panels is characterized in that each these on-off element is made of a plurality of thin film transistor (TFT)s parallel connections and series connection institute.
15. a thin-film transistor array base-plate is characterized in that comprising:
Substrate has viewing area and periphery circuit region;
Many gate wirings are arranged on this substrate;
Many source electrode distributions are arranged on this substrate, and wherein these gate wirings and these source electrode distributions mark off a plurality of pixel regions in this viewing area;
A plurality of thin film transistor (TFT)s, each these thin film transistor (TFT) one of are arranged in these pixel regions in the zone, and these thin film transistor (TFT)s drive by these gate wirings and these source electrode distributions;
A plurality of pixel electrodes, each these pixel electrode are arranged in one of these pixel regions zone, with corresponding these thin film transistor (TFT)s in one of be electrically connected;
A plurality of on-off elements are arranged in this periphery circuit region, and wherein each these on-off element is coupled to a kind of in these gate wirings and these source electrode distributions;
First ESD protection circuit is arranged in this periphery circuit region, and wherein this first ESD protection circuit is coupled to these gate wirings of odd number bar by these on-off elements of part;
Second ESD protection circuit is arranged in this periphery circuit region, and wherein this second ESD protection circuit is coupled to these gate wirings of even number bar by these on-off elements of part;
The 3rd ESD protection circuit is arranged in this periphery circuit region, and wherein the 3rd ESD protection circuit is coupled to these source electrode distributions of odd number bar by these on-off elements of part; And
The 4th ESD protection circuit is arranged in this periphery circuit region, and wherein the 4th ESD protection circuit is coupled to these source electrode distributions of even number bar by these on-off elements of part.
16. the thin-film transistor array base-plate according to claim 15 is characterized in that these on-off elements comprise thin film transistor (TFT).
17. the thin-film transistor array base-plate according to claim 15 is characterized in that each these on-off element is made of at least two thin film transistor (TFT) series connection.
18., it is characterized in that each these on-off element is made of at least two thin film transistor (TFT)s institute in parallel according to claim 15 a described thin-film transistor array base-plate.
19. the thin-film transistor array base-plate according to claim 15 is characterized in that each these on-off element is made of a plurality of thin film transistor (TFT)s parallel connections and series connection institute.
20. an electrostatic protection method is applicable to the thin-film transistor array base-plate that claim 1 is described, it is characterized in that this electrostatic protection method comprises:
When bar lead-in wire one of in these lead-in wires was gone up the accumulation excessive charge, this on-off element of its correspondence was opening, so that these electric charges one of are dispersed in these ESD protection circuits of correspondence is individual.
21. an electrostatic protection method is applicable to the display panels that claim 8 is described, it is characterized in that this electrostatic protection method comprises:
When bar lead-in wire one of in these lead-in wires was gone up the accumulation excessive charge, this on-off element of its correspondence was opening, and one of them is individual so that electric charge is dispersed to these ESD protection circuits of correspondence.
22. an electrostatic protection method is applicable to the thin-film transistor array base-plate that claim 15 is described, it is characterized in that this electrostatic protection method comprises:
When accumulating excessive charge on this gate wirings, this on-off element of its correspondence is opening, so that electric charge is dispersed to this first or second ESD protection circuit of correspondence; And
When accumulating excessive charge on this source electrode utmost point distribution, this on-off element of its correspondence is opening, so that electric charge is dispersed to the 3rd or the 4th ESD protection circuit of correspondence.
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| CN 200410086203 CN1766722A (en) | 2004-10-28 | 2004-10-28 | Thin film transistor array substrate, liquid crystal display panel and electrostatic protection method thereof |
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|---|---|---|---|
| CN 200410086203 CN1766722A (en) | 2004-10-28 | 2004-10-28 | Thin film transistor array substrate, liquid crystal display panel and electrostatic protection method thereof |
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| CN1766722A true CN1766722A (en) | 2006-05-03 |
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| CN 200410086203 Pending CN1766722A (en) | 2004-10-28 | 2004-10-28 | Thin film transistor array substrate, liquid crystal display panel and electrostatic protection method thereof |
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| US7768585B2 (en) | 2006-05-23 | 2010-08-03 | Casio Computer Co., Ltd. | Display device with static electricity protecting circuit |
| US7773164B2 (en) | 2007-08-14 | 2010-08-10 | Chunghwa Picture Tubes, Ltd. | Active device array substrate |
| CN101192379B (en) * | 2006-11-23 | 2011-01-19 | 中华映管股份有限公司 | Active member array substrate with electro-static discharge protective ability |
| CN101089685B (en) * | 2006-06-15 | 2011-08-10 | 乐金显示有限公司 | Array substrate for liquid crystal display device |
| CN101556387B (en) * | 2008-04-11 | 2011-08-31 | 群康科技(深圳)有限公司 | Liquid crystal display panel |
| CN102629008A (en) * | 2011-03-30 | 2012-08-08 | 京东方科技集团股份有限公司 | Thin film transistor liquid crystal display panel and manufacturing method thereof |
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| CN105446040A (en) * | 2016-01-05 | 2016-03-30 | 京东方科技集团股份有限公司 | ESD (Electro-Static discharge) protective unit, array substrate, display panel and display device |
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| CN110071105A (en) * | 2018-04-18 | 2019-07-30 | 友达光电股份有限公司 | ESD protection circuit, display panel and electrostatic discharge protection structure |
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| US7768585B2 (en) | 2006-05-23 | 2010-08-03 | Casio Computer Co., Ltd. | Display device with static electricity protecting circuit |
| CN101089685B (en) * | 2006-06-15 | 2011-08-10 | 乐金显示有限公司 | Array substrate for liquid crystal display device |
| CN101192379B (en) * | 2006-11-23 | 2011-01-19 | 中华映管股份有限公司 | Active member array substrate with electro-static discharge protective ability |
| US7773164B2 (en) | 2007-08-14 | 2010-08-10 | Chunghwa Picture Tubes, Ltd. | Active device array substrate |
| CN101556387B (en) * | 2008-04-11 | 2011-08-31 | 群康科技(深圳)有限公司 | Liquid crystal display panel |
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