CN105390397A - Varied doping device manufacturing method and varied doping device - Google Patents
Varied doping device manufacturing method and varied doping device Download PDFInfo
- Publication number
- CN105390397A CN105390397A CN201410449573.2A CN201410449573A CN105390397A CN 105390397 A CN105390397 A CN 105390397A CN 201410449573 A CN201410449573 A CN 201410449573A CN 105390397 A CN105390397 A CN 105390397A
- Authority
- CN
- China
- Prior art keywords
- semiconductor substrate
- layer
- oxide layer
- doping device
- impurity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
The invention provides a varied doping device manufacturing method, and the method comprises the steps: S3, directly forming a photoetching layer on a semiconductor substrate, and enabling a to-be-doped foreign matter to be injected into the semiconductor substrate; S4, removing the photoetching layer; S5, pushing a trap; S6, removing an oxidation layer. A varied doping device manufactured through the method is flat in surface, thereby eliminating a negative effect, caused by the surface roughness, of an electric field.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly relate to a kind of varying doping device manufacture method and varying doping device.
Background technology
Power device is closely bound up with our daily life, from automotive electronics to Switching Power Supply, and the figure of the power device that grows on trees.In DMOS field, there is a kind of structure varying doping device, this structure fabrication product out because ring district area is little gradually teacher of being designed adopt, the ring district of traditional varying doping device is pushing away in trap process and can produce oxide layer in subregion, the surface, ring district of whole key will be caused like this in lumpy pattern, the uneven of electric field can be caused like this.
As shown in Figure 1, for making the technological process of varying doping device in prior art:
Step 101, original, sheet (Rawwafer) grows Oxide (silicon dioxide), and grow SIN (silicon nitride) on the Oxide formed.After step 101 processes, the varying doping device of formation as shown in Figure 1a.
Step 102, SIN forms lithography layer, and carries out Pring etching and injection; After step 102 processes, the varying doping device of formation as shown in Figure 1 b.
Step 103, removes photoresist, pushes away trap;
After step 103 processes, the varying doping device of formation as illustrated in figure 1 c.
Step 104, removes SIN, removes Oxide.
After step 104 processes, the varying doping device of formation as shown in Figure 1 d.
Composition graphs 1d can find out, because degree oxidized is in step s 103 different, after taking out Oxide, the surface of varying doping device is smooth not.
Summary of the invention
The object of this invention is to provide and a kind ofly can make the method that made doping device surface is smooth.
In order to achieve the above object, the invention provides a kind of varying doping device manufacture method, comprising:
Step S3, directly forms lithography layer on a semiconductor substrate, is injected in Semiconductor substrate by needing the impurity of doping;
Step S4, removes lithography layer;
Step S5, pushes away trap;
Step S6, removes oxide layer.
Preferably, described step S3 can be replaced:
Step S3 ', grows oxide layer on a semiconductor substrate, and directly forms lithography layer in the oxide layer generated, and is injected into needing the impurity of doping in Semiconductor substrate.
Preferably, described step S5 specifically comprises:
Step S51, pushes away trap 200 ± 10mins at the nitrogen atmospheres of 1100 ± 50 DEG C.
Step S52, pushes away trap the oxygen atmosphere of 1000 ± 50 DEG C and grows oxide layer 50 ± 5mins, and growth thickness is the oxide layer of 5000 dusts;
Preferably, in step S3 ', the thickness of the oxide layer of growth is 300 ± 20 dusts.
Preferably, before described step S3 or step S3 ', described method also comprises:
Step S1, forms lithography layer on a semiconductor substrate, carries out zero layer photoetching and etching, forms location notch;
Step S2, removes lithography layer.
Preferably, the location notch formed in step S1 is in dicing lane.
Preferably, described Semiconductor substrate is N-type, and the impurity of described needs doping is p type impurity.
Preferably, described Semiconductor substrate is specially the thick N-type substrate epitaxial wafer of 75 ± 5um, and resistivity is 23 ± 2ohm.cm.
Preferably, the described impurity of doping that needs is specially boron, and Implantation Energy is 160* (1 ± 10%) Kev, and dosage is 6.0E12* (1 ± 10%).
Present invention also offers a kind of varying doping device adopting the method for above-mentioned any one to make.
In varying doping device manufacture method provided by the invention; owing to directly forming lithography layer on a semiconductor substrate; or the oxide layer formed on a semiconductor substrate forms lithography layer; then carry out pushing away in the process of trap at removal lithography layer; the various piece of Semiconductor substrate all can not be protected; the degree so just making the various piece of Semiconductor substrate oxidized is identical, and the varying doping device surface obtained after removing oxide layer is more smooth.Utilize the varying doping device made by varying doping device manufacture method provided by the invention, can well negative effect be improved, on the other hand, can be good at preventing from being plagiarized.
Accompanying drawing explanation
Fig. 1 a-Fig. 1 d is the technological process making varying doping device in prior art;
The schematic flow sheet of a kind of varying doping device manufacture method that Fig. 2 provides for the embodiment of the present invention one;
Fig. 3 is a kind of flow chart preferred embodiment of the step S205 in the embodiment of the present invention one;
The schematic flow sheet of a kind of varying doping device manufacture method that Fig. 4 a-Fig. 4 d provides for the embodiment of the present invention two.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is further described.Following examples only for technical scheme of the present invention is clearly described, and can not limit the scope of the invention with this.
Embodiment one
The embodiment of the present invention one provides a kind of varying doping device manufacture method, and as shown in Figure 2, the method comprises:
Step 203, directly forms lithography layer on a semiconductor substrate, is injected in Semiconductor substrate by needing the impurity of doping;
Step 204, removes lithography layer;
Step 205, pushes away trap;
Step 206, removes oxide layer.
It should be noted that, in the embodiment of the present invention, form the detailed process of lithography layer, and the impurity of doping is injected into the detailed process in Semiconductor substrate, the technique that the detailed process removing lithography layer and the detailed process pushing away trap can be corresponding to prior art is consistent.
In the varying doping device manufacture method that the embodiment of the present invention one provides; owing to directly forming lithography layer on a semiconductor substrate; then carry out pushing away in the process of trap at removal lithography layer; the various piece of Semiconductor substrate all can not be protected; the degree so just making the various piece of Semiconductor substrate oxidized is identical, and the varying doping device surface obtained after removing oxide layer is more smooth.
Preferably, as shown in Figure 3, above-mentioned step 205 can specifically comprise:
Step S2051, pushes away trap 200 ± 10mins at the nitrogen atmospheres of 1100 ± 50 DEG C.
Step S2052, pushes away trap the oxygen atmosphere of 1000 ± 50 DEG C and grows oxide layer 50 ± 5mins, and growth thickness is the oxide layer of 5000 dusts.
In the preferred embodiment of the invention, push away trap technique by twice and impurity can be made better to spread in Semiconductor substrate, improve the performance of varying doping device.
Preferably, before step 203, described method can also comprise:
Step 201, forms lithography layer on a semiconductor substrate, carries out zero layer photoetching and etching, forms location notch.
In the specific implementation, oxide layer and the 3000 dust substrates of 300 dusts can be etched away.
Step 202, removes lithography layer.
Owing to defining location notch in zero layer, thus provide aligning for follow-up photoetching process.
Preferably, in step sl, the location notch of formation is in dicing lane.In this way, can avoid having an impact to the normal production of chip.
Preferably, above-mentioned Semiconductor substrate is N-type, and the impurity of above-mentioned needs doping is p type impurity.
Preferably, above-mentioned Semiconductor substrate is specially the thick N-type substrate epitaxial wafer of 75 ± 5um, and its resistivity is 23 ± 2ohm.cm.
Preferably, need the impurity adulterated to be specially boron in step S3, Implantation Energy is 160* (1 ± 10%) Kev, and dosage is 6.0E12* (1 ± 10%).More specifically, here N type semiconductor lining body be specially silicon.
Embodiment two
The present embodiment part different from embodiment one is, not directly form lithography layer on a semiconductor substrate, but grow oxide layer on a semiconductor substrate, and directly lithography layer is formed in the oxide layer generated, will the impurity of doping be needed to be injected in Semiconductor substrate afterwards.The benefit done like this is to reduce the impact to Semiconductor substrate when impurity injects, and reduces the damage of Semiconductor substrate.Same; carry out pushing away in the process of trap at removal lithography layer; the various piece of Semiconductor substrate also all can not be protected, and the degree so just making the various piece of Semiconductor substrate oxidized is identical, and the varying doping device surface obtained after removing oxide layer is more smooth
Preferably, the operation now etching location notch can also be carried out before being injected in Semiconductor substrate by the impurity of needs doping, can reduce like this in etching process the impact that Semiconductor substrate produces.
What provide embodiment two below in conjunction with Fig. 4 is preferred embodiment further detailed.
Step 401, grows oxide layer on a semiconductor substrate.
Concrete, in step S401, the thickness of the oxide layer of generation can be 300 ± 20 dusts, and the temperature of growth oxide layer can be 900 DEG C.
Step 402, oxide layer forms lithography layer, carries out zero layer photoetching and etching, forms location notch.
The varying doping device formed after step 402 as shown in fig. 4 a.
It is pointed out that if do not generate oxide layer in varying doping device manufacturing process, then directly can form lithography layer on a semiconductor substrate, carry out zero layer photoetching and etching, form location notch.
Step 403, removes lithography layer.
Step 404, oxide layer forms lithography layer, is injected into needing the impurity of doping in Semiconductor substrate.
The varying doping device formed after step 404 processes as shown in Figure 4 b.
Step 405, removes lithography layer.
Step 406, pushes away trap.
The varying doping device formed after step 406 processes as illustrated in fig. 4 c.
Step 407, removes oxide layer.
The varying doping device formed after step 407 processes as shown in figure 4d.
Composition graphs 4d can find out, adopts varying doping device manufacture method provided by the invention, the varying doping device surface that makes can be made smooth, thus eliminate the negative effect of the electric field caused due to air spots.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the prerequisite not departing from the technology of the present invention principle; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (10)
1. a varying doping device manufacture method, is characterized in that, comprising:
Step S3, directly forms lithography layer on a semiconductor substrate, is injected in Semiconductor substrate by needing the impurity of doping;
Step S4, removes lithography layer;
Step S5, pushes away trap;
Step S6, removes oxide layer.
2. the method for claim 1, is characterized in that, described step S3 can be replaced:
Step S3 ', grows oxide layer on a semiconductor substrate, and directly forms lithography layer in the oxide layer generated, and is injected into needing the impurity of doping in Semiconductor substrate.
3. method as claimed in claim 1 or 2, it is characterized in that, described step S5 specifically comprises:
Step S51, pushes away trap 200 ± 10mins at the nitrogen atmospheres of 1100 ± 50 DEG C;
Step S52, pushes away trap the oxygen atmosphere of 1000 ± 50 DEG C and grows oxide layer 50 ± 5mins, and growth thickness is the oxide layer of 5000 dusts.
4. method as claimed in claim 3, is characterized in that, in step S3 ', the thickness of the oxide layer of growth is 300 ± 20 dusts.
5. the method as described in any one of claim 1 or 2, is characterized in that, before described step S3 or step S3 ', described method also comprises:
Step S1, forms lithography layer on a semiconductor substrate, carries out zero layer photoetching and etching, forms location notch;
Step S2, removes lithography layer.
6. method as claimed in claim 5, it is characterized in that, the location notch formed in step S1 is in dicing lane.
7. method as claimed in claim 1 or 2, it is characterized in that, described Semiconductor substrate is N-type, and the impurity of described needs doping is p type impurity.
8. method as claimed in claim 7, it is characterized in that, described Semiconductor substrate is specially the thick N-type substrate epitaxial wafer of 75 ± 5um, and resistivity is 23 ± 2ohm.cm.
9. method as claimed in claim 8, is characterized in that, the described impurity of doping that needs is specially boron, and Implantation Energy is 160* (1 ± 10%) Kev, and dosage is 6.0E12* (1 ± 10%).
10. the varying doping device adopting the method as any one of claim 1-9 to make.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410449573.2A CN105390397A (en) | 2014-09-04 | 2014-09-04 | Varied doping device manufacturing method and varied doping device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410449573.2A CN105390397A (en) | 2014-09-04 | 2014-09-04 | Varied doping device manufacturing method and varied doping device |
Publications (1)
Publication Number | Publication Date |
---|---|
CN105390397A true CN105390397A (en) | 2016-03-09 |
Family
ID=55422546
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410449573.2A Pending CN105390397A (en) | 2014-09-04 | 2014-09-04 | Varied doping device manufacturing method and varied doping device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN105390397A (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100044825A1 (en) * | 2008-08-19 | 2010-02-25 | Infineon Technologies Austria Ag | Semiconductor device and method for the production of a semiconductor device |
US20110233714A1 (en) * | 2010-03-24 | 2011-09-29 | Fuji Electric Systems Co. Ltd. | Semiconductor device |
CN103219364A (en) * | 2012-01-24 | 2013-07-24 | 三菱电机株式会社 | Semiconductor device and method for manufacturing the same |
-
2014
- 2014-09-04 CN CN201410449573.2A patent/CN105390397A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100044825A1 (en) * | 2008-08-19 | 2010-02-25 | Infineon Technologies Austria Ag | Semiconductor device and method for the production of a semiconductor device |
US20110233714A1 (en) * | 2010-03-24 | 2011-09-29 | Fuji Electric Systems Co. Ltd. | Semiconductor device |
CN103219364A (en) * | 2012-01-24 | 2013-07-24 | 三菱电机株式会社 | Semiconductor device and method for manufacturing the same |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20150332921A1 (en) | Carrier channel with element concentration gradient distribution and fabrication method thereof | |
NZ597036A (en) | Methods of making vertical junction field effect transistors and bipolar junction transistors without ion implantation and devices made therewith | |
CN102683209B (en) | Semiconductor device and manufacturing method thereof | |
CN102097476B (en) | Integrated circuit structure and formation method thereof | |
TW200709333A (en) | Method for fabricating semiconductor device | |
US9117667B2 (en) | Carbon layer and method of manufacture | |
JP2012004173A (en) | Method of manufacturing superjunction semiconductor device | |
CN105552125A (en) | Semiconductor structure and manufacturing method thereof | |
JP2006332603A5 (en) | ||
WO2008084519A1 (en) | Method for manufacturing silicon epitaxial wafer | |
JP2009266981A (en) | Trench gate type semiconductor device and manufacturing method thereof | |
CN105390397A (en) | Varied doping device manufacturing method and varied doping device | |
CN102446857B (en) | Silicide mask etching method for enhancing performances of semiconductor device | |
CN107564968A (en) | Diode, power device, power electronic equipment and diode manufacturing method | |
CN106356304A (en) | Semiconductor production process | |
CN103035520A (en) | Manufacture method for insulated gate bipolar transistor (IGBT) device | |
CN108074870A (en) | Transistor and forming method thereof | |
CN207303113U (en) | Diode, power device and power electronic equipment | |
JP2014514757A5 (en) | ||
CN106033726B (en) | The production method of field effect transistor | |
CN104319255B (en) | The manufacture method of low-temperature coefficient polysilicon resistance | |
CN104810363A (en) | Power integrated device and manufacture method thereof | |
CN104282572A (en) | VDMOS device manufacturing method | |
US8785277B2 (en) | Method of manufacturing the trench power semiconductor structure | |
CN103515317B (en) | A kind of cmos device and forming method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160309 |
|
RJ01 | Rejection of invention patent application after publication |