CN105378651B - 具有可编程优化的存储器-网络处理器 - Google Patents

具有可编程优化的存储器-网络处理器 Download PDF

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Publication number
CN105378651B
CN105378651B CN201480039082.9A CN201480039082A CN105378651B CN 105378651 B CN105378651 B CN 105378651B CN 201480039082 A CN201480039082 A CN 201480039082A CN 105378651 B CN105378651 B CN 105378651B
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unit
instruction
address
instructions
data
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CN105378651A (zh
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M·B·多尔
C·S·多比斯
M·B·索尔卡
M·R·乔希诺
K·R·福克纳
K·M·宾德罗斯
S·阿雅
J·M·比尔兹利
D·A·吉布森
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Coherent Logix Inc
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Coherent Logix Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30083—Power or thermal control instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
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    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
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    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Devices For Executing Special Programs (AREA)
  • Executing Machine-Instructions (AREA)
  • Multi Processors (AREA)
  • Microcomputers (AREA)
  • Power Sources (AREA)
CN201480039082.9A 2013-05-24 2014-05-23 具有可编程优化的存储器-网络处理器 Active CN105378651B (zh)

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US201361827117P 2013-05-24 2013-05-24
US61/827,117 2013-05-24
PCT/US2014/039345 WO2014190263A2 (en) 2013-05-24 2014-05-23 Memory-network processor with programmable optimizations

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11709793B2 (en) 2019-03-15 2023-07-25 Intel Corporation Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format
US11720355B2 (en) 2017-04-28 2023-08-08 Intel Corporation Instructions and logic to perform floating point and integer operations for machine learning
US12493137B1 (en) 2024-06-11 2025-12-09 Saudi Arabian Oil Company Building natural fractures model using 3D stacked geological models

Families Citing this family (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10157060B2 (en) 2011-12-29 2018-12-18 Intel Corporation Method, device and system for control signaling in a data path module of a data stream processing engine
US9965287B1 (en) * 2012-01-27 2018-05-08 Open Invention Network Llc Virtualized multicore systems with extended instruction heterogeneity
US9582321B2 (en) * 2013-11-08 2017-02-28 Swarm64 As System and method of data processing
US9971601B2 (en) * 2015-02-13 2018-05-15 International Business Machines Corporation Dynamic assignment across dispatch pipes of source ports to be used to obtain indication of physical registers
US9747108B2 (en) * 2015-03-27 2017-08-29 Intel Corporation User-level fork and join processors, methods, systems, and instructions
WO2017074377A1 (en) * 2015-10-29 2017-05-04 Intel Corporation Boosting local memory performance in processor graphics
JP6933648B2 (ja) 2015-12-28 2021-09-08 コーヒレント・ロジックス・インコーポレーテッド Ｆｅｃの符号化および復号を加速するプロセッサ命令
US10067809B2 (en) 2016-04-20 2018-09-04 International Business Machines Corporation System and method for batch transport using hardware accelerators
US10970133B2 (en) 2016-04-20 2021-04-06 International Business Machines Corporation System and method for hardware acceleration for operator parallelization with streams
GB2558220B (en) * 2016-12-22 2019-05-15 Advanced Risc Mach Ltd Vector generating instruction
JP6854473B2 (ja) * 2017-04-17 2021-04-07 セレブラス システムズ インク． 加速化ディープラーニングのデータフロー・トリガー・タスク
US10409614B2 (en) 2017-04-24 2019-09-10 Intel Corporation Instructions having support for floating point and integer data types in the same register
US10726514B2 (en) * 2017-04-28 2020-07-28 Intel Corporation Compute optimizations for low precision machine learning operations
CN107608784B (zh) * 2017-06-28 2020-06-09 西安微电子技术研究所 一种在多核dsp下的海量数据流多模态调度方法
WO2019039113A1 (ja) * 2017-08-24 2019-02-28 ソニーセミコンダクタソリューションズ株式会社 プロセッサおよび情報処理システム
US11086816B2 (en) 2017-09-28 2021-08-10 Intel Corporation Processors, methods, and systems for debugging a configurable spatial accelerator
US20190101952A1 (en) * 2017-09-30 2019-04-04 Intel Corporation Processors and methods for configurable clock gating in a spatial array
US10014390B1 (en) 2017-10-10 2018-07-03 Globalfoundries Inc. Inner spacer formation for nanosheet field-effect transistors with tall suspensions
WO2019089918A1 (en) 2017-11-03 2019-05-09 Coherent Logix, Inc. Programming flow for multi-processor system
CN111527485B (zh) * 2017-11-03 2023-09-12 相干逻辑公司 存储器网络处理器
KR102424962B1 (ko) 2017-11-15 2022-07-25 삼성전자주식회사 병렬 연산 처리를 수행하는 메모리 장치 및 이를 포함하는 메모리 모듈
CN108198124B (zh) * 2017-12-27 2023-04-25 上海联影医疗科技股份有限公司 医学图像处理方法、装置、计算机设备和存储介质
US11614941B2 (en) * 2018-03-30 2023-03-28 Qualcomm Incorporated System and method for decoupling operations to accelerate processing of loop structures
US10664287B2 (en) * 2018-03-30 2020-05-26 Intel Corporation Systems and methods for implementing chained tile operations
US11307873B2 (en) 2018-04-03 2022-04-19 Intel Corporation Apparatus, methods, and systems for unstructured data flow in a configurable spatial accelerator with predicate propagation and merging
US10891240B2 (en) 2018-06-30 2021-01-12 Intel Corporation Apparatus, methods, and systems for low latency communication in a configurable spatial accelerator
US11200186B2 (en) 2018-06-30 2021-12-14 Intel Corporation Apparatuses, methods, and systems for operations in a configurable spatial accelerator
US10983583B2 (en) * 2018-08-23 2021-04-20 Apple Inc. Electronic display reduced blanking duration systems and methods
KR102755883B1 (ko) * 2018-12-12 2025-01-21 인터랙틱 홀딩스, 엘엘씨 프로세서 코어 간의 개선된 데이터 전달을 위한 방법 및 장치
CN109523019B (zh) * 2018-12-29 2024-05-21 百度在线网络技术（北京）有限公司 加速器、基于fpga的加速系统及控制方法、cnn网络系统
CN109917704A (zh) * 2019-02-25 2019-06-21 湖南长高思瑞自动化有限公司 基于stm32l433低功耗控制器的故障指示器采集单元及控制方法
CN109976707B (zh) * 2019-03-21 2023-05-05 西南交通大学 一种可变位宽乘法器自动化生成方法
US11169957B2 (en) * 2019-03-31 2021-11-09 Intel Corporation Systems and methods for reconfigurable systolic arrays
KR102728641B1 (ko) * 2019-04-01 2024-11-12 주식회사 사피온코리아 버퍼 메모리, 이를 이용하는 연산 장치 및 시스템
CN110187958B (zh) * 2019-06-04 2020-05-05 上海燧原智能科技有限公司 一种任务处理方法、装置、系统、设备及存储介质
US11037050B2 (en) 2019-06-29 2021-06-15 Intel Corporation Apparatuses, methods, and systems for memory interface circuit arbitration in a configurable spatial accelerator
US11132198B2 (en) * 2019-08-29 2021-09-28 International Business Machines Corporation Instruction handling for accumulation of register results in a microprocessor
CN110673854B (zh) * 2019-09-24 2025-01-24 深圳前海微众银行股份有限公司 Sas语言编译方法、装置、设备及可读存储介质
US11163706B2 (en) 2019-10-22 2021-11-02 International Business Machines Corporation High bandwidth SDRAM controller
US11789896B2 (en) * 2019-12-30 2023-10-17 Star Ally International Limited Processor for configurable parallel computations
CN113407238B (zh) * 2020-03-16 2024-09-24 北京灵汐科技有限公司 一种具有异构处理器的众核架构及其数据处理方法
US11500858B2 (en) * 2020-04-08 2022-11-15 International Business Machines Corporation Generating three-dimensional spikes using low-power computing hardware
US11269526B2 (en) 2020-04-23 2022-03-08 Next Silicon Ltd Interconnected memory grid with bypassable units
US12511122B2 (en) * 2020-05-15 2025-12-30 Altera Corporation Hazard mitigation for lightweight processor cores
EP4211567A4 (en) * 2020-09-09 2024-10-09 Ascenium, Inc. SHALLOW PIPELINED HIGHLY PARALLEL PROCESSING ARCHITECTURE
US12578991B2 (en) 2020-09-09 2026-03-17 Ascenium, Inc. Parallel processing architecture with distributed register files
US12504958B2 (en) 2020-09-09 2025-12-23 Ascenium, Inc. Compute element processing using control word templates
US12493554B2 (en) 2020-09-09 2025-12-09 Ascenium, Inc. Parallel processing using hazard detection and mitigation
US12086080B2 (en) 2020-09-26 2024-09-10 Intel Corporation Apparatuses, methods, and systems for a configurable accelerator having dataflow execution circuits
CN113268269B (zh) * 2021-06-07 2022-10-14 中科计算技术西部研究院 一种针对动态规划算法的加速方法、系统及装置
CN114283045B (zh) * 2021-11-12 2024-07-26 马上消费金融股份有限公司 数据处理方法、装置、电子设备以及存储介质
US20230205605A1 (en) * 2021-12-23 2023-06-29 Intel Corporation Dynamic asymmetric resources
US12530296B2 (en) * 2022-03-31 2026-01-20 Intel Corporation Systems, apparatus, articles of manufacture, and methods for improved data transfer for heterogeneous programs
US12079119B1 (en) 2023-03-16 2024-09-03 Bank Of America Corporation Systems, methods, and apparatuses for auto-scaling volatile memory allocation in an electronic network
CN116700790B (zh) * 2023-05-09 2025-07-08 上海壁仞科技股份有限公司 数据处理装置、寄存器的管理方法和机器可读存储介质
EP4564185A1 (en) * 2023-11-29 2025-06-04 Commissariat à l'Energie Atomique et aux Energies Alternatives Coarse-grained reconfigurable array architecture and associated method
US12585467B2 (en) * 2023-12-26 2026-03-24 Joshua Huang High level graph computing system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6453405B1 (en) * 2000-02-18 2002-09-17 Texas Instruments Incorporated Microprocessor with non-aligned circular addressing
US20040030859A1 (en) * 2002-06-26 2004-02-12 Doerr Michael B. Processing system with interspersed processors and communication elements
CN102804165A (zh) * 2009-02-11 2012-11-28 四次方有限公司 具有可扩展数据路径的前端处理器

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4295193A (en) * 1979-06-29 1981-10-13 International Business Machines Corporation Machine for multiple instruction execution
AU553416B2 (en) * 1984-02-24 1986-07-17 Fujitsu Limited Pipeline processing
US5983340A (en) * 1995-12-07 1999-11-09 Conexant Systems, Inc. Microprocessor system with flexible instruction controlled by prior instruction
JP3658072B2 (ja) * 1996-02-07 2005-06-08 株式会社ルネサステクノロジ データ処理装置およびデータ処理方法
JPH11143710A (ja) * 1997-11-04 1999-05-28 Matsushita Electric Ind Co Ltd 処理対象値入力装置及びプログラム変換装置
US6539467B1 (en) * 1999-11-15 2003-03-25 Texas Instruments Incorporated Microprocessor with non-aligned memory access
ATE366958T1 (de) 2000-01-14 2007-08-15 Texas Instruments France Mikroprozessor mit ermässigtem stromverbrauch
US6658551B1 (en) * 2000-03-30 2003-12-02 Agere Systems Inc. Method and apparatus for identifying splittable packets in a multithreaded VLIW processor
US6629234B1 (en) * 2000-03-30 2003-09-30 Ip. First, L.L.C. Speculative generation at address generation stage of previous instruction result stored in forward cache for use by succeeding address dependent instruction
US7127588B2 (en) * 2000-12-05 2006-10-24 Mindspeed Technologies, Inc. Apparatus and method for an improved performance VLIW processor
US7100060B2 (en) * 2002-06-26 2006-08-29 Intel Corporation Techniques for utilization of asymmetric secondary processing resources
US6993668B2 (en) 2002-06-27 2006-01-31 International Business Machines Corporation Method and system for reducing power consumption in a computing device when the computing device executes instructions in a tight loop
US6963988B2 (en) 2002-06-27 2005-11-08 International Business Machines Corporation Fixed point unit power reduction mechanism for superscalar loop execution
US7013383B2 (en) * 2003-06-24 2006-03-14 Via-Cyrix, Inc. Apparatus and method for managing a processor pipeline in response to exceptions
JP4283131B2 (ja) * 2004-02-12 2009-06-24 パナソニック株式会社 プロセッサ及びコンパイル方法
KR20070055487A (ko) 2004-07-13 2007-05-30 쓰리플러스원 테크놀러지, 인크 프로그램가능한 프로세서 아키텍처
US7299342B2 (en) * 2005-05-24 2007-11-20 Coresonic Ab Complex vector executing clustered SIMD micro-architecture DSP with accelerator coupled complex ALU paths each further including short multiplier/accumulator using two's complement
US7873820B2 (en) * 2005-11-15 2011-01-18 Mips Technologies, Inc. Processor utilizing a loop buffer to reduce power consumption
JP4771079B2 (ja) * 2006-07-03 2011-09-14 日本電気株式会社 Ｖｌｉｗ型プロセッサ
JP4829038B2 (ja) * 2006-08-17 2011-11-30 富士通株式会社 マルチプロセッサシステム
US20080177980A1 (en) * 2007-01-24 2008-07-24 Daniel Citron Instruction set architecture with overlapping fields
JP5043560B2 (ja) * 2007-08-24 2012-10-10 パナソニック株式会社 プログラム実行制御装置
US8990543B2 (en) * 2008-03-11 2015-03-24 Qualcomm Incorporated System and method for generating and using predicates within a single instruction packet
CN101286922B (zh) * 2008-05-05 2011-02-09 华为技术有限公司 一种信令控制的方法、系统及设备
JP2012059195A (ja) * 2010-09-13 2012-03-22 Renesas Electronics Corp マルチスレッドプロセッサ
US9323551B2 (en) * 2011-01-07 2016-04-26 International Business Machines Corporation Modifying code sequence with replacement parts of which non-beginning parts trigger exception when jumped to
US8843730B2 (en) * 2011-09-09 2014-09-23 Qualcomm Incorporated Executing instruction packet with multiple instructions with same destination by performing logical operation on results of instructions and storing the result to the destination
US9557999B2 (en) * 2012-06-15 2017-01-31 Apple Inc. Loop buffer learning
US8856769B2 (en) * 2012-10-23 2014-10-07 Yong-Kyu Jung Adaptive instruction prefetching and fetching memory system apparatus and method for microprocessor system
US9715392B2 (en) * 2014-08-29 2017-07-25 Qualcomm Incorporated Multiple clustered very long instruction word processing core

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6453405B1 (en) * 2000-02-18 2002-09-17 Texas Instruments Incorporated Microprocessor with non-aligned circular addressing
US20040030859A1 (en) * 2002-06-26 2004-02-12 Doerr Michael B. Processing system with interspersed processors and communication elements
CN102804165A (zh) * 2009-02-11 2012-11-28 四次方有限公司 具有可扩展数据路径的前端处理器

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11720355B2 (en) 2017-04-28 2023-08-08 Intel Corporation Instructions and logic to perform floating point and integer operations for machine learning
US12039331B2 (en) 2017-04-28 2024-07-16 Intel Corporation Instructions and logic to perform floating point and integer operations for machine learning
US11709793B2 (en) 2019-03-15 2023-07-25 Intel Corporation Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format
US11954063B2 (en) 2019-03-15 2024-04-09 Intel Corporation Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format
US12493137B1 (en) 2024-06-11 2025-12-09 Saudi Arabian Oil Company Building natural fractures model using 3D stacked geological models

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