CN105373458A - Internal signal detection method for UVM verification platform and application - Google Patents
Internal signal detection method for UVM verification platform and application Download PDFInfo
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- CN105373458A CN105373458A CN201410440055.4A CN201410440055A CN105373458A CN 105373458 A CN105373458 A CN 105373458A CN 201410440055 A CN201410440055 A CN 201410440055A CN 105373458 A CN105373458 A CN 105373458A
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Abstract
The invention discloses an internal signal detection method for a UVM verification platform and an application. The method comprises: step 1, declaring an interface in a top layer, and defining the type of an interface signal to be the same as that of an internal signal required to be detected; step 2, defining the interface of the interface signal type, declared in the step 1, in a class requiring signal detection, and obtaining the interface by using a uvm_config_db::get function; step 3, assigning the internal signal required to be detected to an instantiated interface signal in the step 2; step 4, putting the interface into a corresponding layer of a UVM environment through a uvm_config_db::set function; and step 5, detecting the internal signal by observing the interface signal in the step 4 in a waveform. According to the method, the internal signal of the verification platform can be visually viewed, so that the verification efficiency is improved.
Description
Technical field
The invention belongs to the functional verification field of chip, particularly relate to internal signal detection method and the application of a kind of UVM (verification methodology) verification platform.
Background technology
Along with the continuous expansion of the scale of integrated circuit, checking faces great challenge.UVM have employed SystemVerilog (hardware verification language) language, introduce assert, abstract, robotization and reuse mechanism, the reusable Layered Verification Platform based on affairs can be built, reduce the complexity of test case, improve verification efficiency.But this verification platform based on abstract affairs, when platform testing (debug), the method that abstract affairs have not had can be followed the trail of intuitively and check, present waveform scan tool well can not extract for the signal of this platform interior and check, makes the debugging of verification platform be mostly to rely on printing to check that Log (daily record) information realizes.This mode efficiency comparison is low.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of internal signal detection method and application of UVM verification platform, intuitively can check the signal of platform interior, improves verification efficiency.
For solving the problems of the technologies described above, the internal signal detection method of UVM verification platform of the present invention, comprises the steps:
Step 1, states an interface (interface) at top layer, and interface signal type definition is consistent with the internal signal needing to detect;
Step 2, defines the interface of the interface signal type of statement in a step 1, and uses uvm_config_db::get (UVM grammer: obtain configuration information) function to obtain this interface in the class (class) needing input;
Step 3, will need the internal signal assignment detected to the interface signal of instantiation in step 2;
Step 4, is put into UVM environment facies by uvm_config_db::set function by described interface and answers in level;
Step 5, by observing the interface signal in step 4 in waveform, namely realizes the detection of internal signal.
Said method, the application of the data in the abstract transaction packet of UVM verification platform inside.
Said method, by macro definition and encapsulation, is integrated in the base class of UVM verification platform, all based on the application in the checking of UVM verification platform framework.
The present invention passes through internal signal assignment on interface signal, interface signal can be checked at waveform instrument very intuitively, comprise the data in transaction packet, convenient debugging, can trace signals saltus step easily, and verification platform inside can be integrated in easily, specializing of the inner abstract affairs of UVM verification platform can be realized; Greatly improve verification efficiency.
Accompanying drawing explanation
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Accompanying drawing is the internal signal detection method realization flow figure of described UVM verification platform;
Embodiment
The internal signal detection method of described UVM verification platform is as follows: state an interface at top layer, interface signal type definition is consistent with the internal signal needing to detect, the interface of the interface type of this statement is defined in the class needing input, and use uvm_config_db::get function to obtain this interface, to the internal signal assignment detected be needed to the interface signal of instantiation, by uvm_config_db::set this interface signal is put in environment and goes in corresponding level, by observing the interface signal of this level in waveform, namely the internal signal realizing UVM verification platform detects.
Can use grand come defining interface, with facilitate need use class in call.
Can use grand come assignment interface signal, to facilitate the interpolation of signal needing to detect.
Described assignment, when forever (Hardware description language calls the turn key word: Infinite loop) can be used to wait for described interface signal saltus step, is assigned to this interface signal to realize Real-Time Monitoring by internal signal value.
For the interpolation of the signal that platform interior detects, need the signal type of the interface expanding described statement, and add the assignment of corresponding signal.
Shown in accompanying drawing, here be one for the tracking of the signal of the inside of class and the example checked, be used for detail of the present invention is described.
As above describe, in the verification, need the data of the class l1 followed the trail of in class myunit: i.e. myunit.l1.data.According to step of the present invention, first state an interface, as follows:
interfacedbg_if(inputlogicclock);
logic[31:0]dbg_data;
endinterface
The signal type defined in this interface is consistent with needing the type of the signal followed the trail of, and is all Int type.
After defining interface, obtain this interface with uvm_config_db::get function, conveniently integrated in class, employ macro definition.
Assignment is carried out to needing the signal detected.In order to improve extensibility, employ macro definition.
For the assignment of detection signal, employ forever@, when each detected signal saltus step, all by its assignment to interface signal, like this, just achieve the Real-Time Monitoring of signal.
Use defined above grand in myunit, obtain this interface signal.Code is as follows:
By uvm_config_db::set this interface is put in UVM platform environment in the environment and goes in corresponding level.
By above step, the value of myunit.l1.data namely can be observed by waveform scan tool DVE on top.dif interface signal dbg_data.
If need to detect the value of myunit.l2.data, because interface has been integrated in environment, only need to add myunit.l2.data signal of the same type in interface statement, and by classmyunit directly interpolation macro definition carry out assignment and can realize.Specific code is as follows:
The foregoing is only the specific embodiment of the present invention, scope is not limited thereto.
Claims (7)
1. be applied to an internal signal detection method for UVM verification platform, it is characterized in that:
Step 1, states an interface at top layer, and interface signal type definition is consistent with the internal signal needing to detect;
Step 2, defines the interface of the interface signal type of statement in a step 1, and uses uvm_config_db::get function to obtain this interface in the class needing input;
Step 3, will need the internal signal assignment detected to the interface signal of instantiation in step 2;
Step 4, is put into UVM environment facies by uvm_config_db::set function by described interface and answers in level;
Step 5, by observing the interface signal in step 4 in waveform, namely realizes the detection of internal signal.
2. the method for claim 1, is characterized in that: step 2 use grand come defining interface, with facilitate need use class in call.
3. the method for claim 1, is characterized in that: step 3 use grand come assignment interface signal, to facilitate the interpolation of signal needing to detect.
4. the method for claim 1, is characterized in that: the assignment in step 3, when using Infinite loop to wait for described interface signal saltus step, internal signal value is assigned to this interface signal to realize Real-Time Monitoring.
5. the method for claim 1, is characterized in that: for the interpolation of the signal that platform interior detects, need the signal type of the interface of statement in spread step 1, and add the corresponding signal assignment in step 3.
6. the arbitrary described method of claim 1 to 5, the application of the data in the abstract transaction packet of UVM verification platform inside.
7. the arbitrary described method of claim 1 to 5, by macro definition and encapsulation, is integrated in the base class of UVM verification platform, all based on the application in the checking of UVM verification platform framework.
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CN1725189A (en) * | 2004-07-20 | 2006-01-25 | 华为技术有限公司 | Detection method for failure of chip |
US20060168483A1 (en) * | 2005-01-24 | 2006-07-27 | Sherlock Derek A | On-chip circuitry for bus validation |
CN103530211A (en) * | 2013-10-12 | 2014-01-22 | 江苏华丽网络工程有限公司 | PCIE loop back self-test method based on UVM platform |
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2014
- 2014-09-01 CN CN201410440055.4A patent/CN105373458A/en active Pending
Patent Citations (3)
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CN1725189A (en) * | 2004-07-20 | 2006-01-25 | 华为技术有限公司 | Detection method for failure of chip |
US20060168483A1 (en) * | 2005-01-24 | 2006-07-27 | Sherlock Derek A | On-chip circuitry for bus validation |
CN103530211A (en) * | 2013-10-12 | 2014-01-22 | 江苏华丽网络工程有限公司 | PCIE loop back self-test method based on UVM platform |
Non-Patent Citations (1)
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读书频道>软件开发>其他综合> UVM实战: "《*2.2.4加入virtual interfac》", 《读书频道,HTTP://BOOK.2CTO.COM/201408/46004.HTML》 * |
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