CN105373181A - High-precision over-temperature protection circuit - Google Patents
High-precision over-temperature protection circuit Download PDFInfo
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- CN105373181A CN105373181A CN201510902198.7A CN201510902198A CN105373181A CN 105373181 A CN105373181 A CN 105373181A CN 201510902198 A CN201510902198 A CN 201510902198A CN 105373181 A CN105373181 A CN 105373181A
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Abstract
The invention provides a high-precision over-temperature protection circuit. The high-precision over-temperature protection circuit is characterized by comprising a PTAT reference current generation circuit, an over-temperature comparison voltage generation circuit, a reference voltage generation circuit and an over-temperature comparator, the over-temperature comparison voltage generation circuit and the PTAT reference current generation circuit serve as current mirror images of each other, the output end of the over-temperature comparison voltage generation circuit and the output end of the reference voltage generation circuit are connected with the negative phase input end and the positive phase input end of the over-temperature comparator respectively, and the output end of the over-temperature comparator serves as output of the over-temperature protection circuit. Whether temperature exceeds the over-temperature protection threshold value is judged by comparing the over-temperature comparison voltage and the constant reference voltage, so that when the product temperature is too high, an over-temperature protection signal is output, and a product is controlled to enter the temperature protection state. The circuit is simple in structure, the over-temperature protection trigger point is not influenced by the manufacturing process, and the high-precision over-temperature protection circuit is accurate, high in batch consistency and high in accuracy, can be used as an over-temperature protection module in products such as integrated circuit chips, MCU modules and switch power supplies, and has good market development value.
Description
Technical field
The invention belongs to SIC (semiconductor integrated circuit) technical field, be specifically related to a kind of high precision thermal-shutdown circuit.
Background technology
Some integrated circuit (IC) products, as power supply, driving element etc., often will to face working temperature too high, and thermal value is excessive, causes the even permanent problem of burning of circuit cisco unity malfunction, and this just needs thermal-shutdown circuit to be integrated in circuit.The effect of thermal-shutdown circuit is: monitor circuit operating temperature, after integrated circuit operation temperature reaches setting value, action occurs, and completes the function such as breaking circuit, powered-down, plays the object of protection circuit.
Traditional thermal-shutdown circuit as shown in Figure 1; threshold values is adopted to be the triode of negative temperature coefficient; its principle of work is: the positive terminal voltage of comparer depends on the threshold voltage of triode; its negative terminal voltage is definite value; along with temperature raises, comparer anode input voltage reduces, when temperature constantly rises to the positive terminal voltage of comparer lower than negative terminal voltage; comparer overturns, out signal saltus step thus can go the module such as driving controlling to turn off chip.Due to the deviation of production technology, cause the threshold values of triode can fluctuate (shown in simulation waveform figure as shown in Figure 2), thus causing the threshold values of warm spot to be difficult to control: the temperature meeting on the low side that overheat protector triggers causes false triggering, the scope of the normal work of impact; The temperature drift that overheat protector triggers can cause overheat protector function inoperative, finally causes the temperature triggered of overheat protector point precision low, uses the product yield of this thermal-shutdown circuit low.
Summary of the invention
For solving the problems of the technologies described above, the invention provides a kind ofly not affect by production technology, overheat protector trigger point accurately high, thermal-shutdown circuit that consistance is good, the overheat protector as integrated circuit (IC) products can improve the yield of product.
For achieving the above object, technical scheme of the present invention is as follows: a kind of high precision thermal-shutdown circuit, it is characterized in that: comprise PTAT reference current generating circuit, excess temperature comparative voltage produces circuit, generating circuit from reference voltage, excess temperature comparer, described excess temperature comparative voltage produces circuit and PTAT reference current generating circuit current mirror each other, described excess temperature comparative voltage produces the output terminal of circuit, the output terminal of generating circuit from reference voltage connects negative-phase input and the normal phase input end of excess temperature comparer respectively, the output terminal of described excess temperature comparer forms the output (Out) of thermal-shutdown circuit.
In a preferred embodiment of the present invention, comprise described excess temperature comparative voltage generation circuit further and comprise the first PMOS, the second PMOS, the first resistance, the source electrode of described first PMOS connects power end VDD, the source electrode of its drain electrode connection second PMOS, the drain electrode of described second PMOS connects ground connection after the first resistance.
In a preferred embodiment of the present invention, comprise described PTAT reference current generating circuit further and comprise the 3rd PMOS, 4th PMOS, first bipolar transistor, second bipolar transistor, operational amplifier, second resistance, described 3rd PMOS, the source electrode of the 4th both PMOS is all connected with power end VDD, both grids are all connected with the grid of the first PMOS, the drain electrode of described 3rd PMOS connects the second resistance, and both tie points form node A, the other end of described second resistance connects ground connection after the first bipolar transistor, the drain electrode of described 4th PMOS connects ground connection after the second bipolar transistor, the tie point of the 4th PMOS and the second bipolar transistor forms Node B, node A, the normal phase input end of Node B difference concatenation operation amplifier and negative-phase input, the output terminal of described operational amplifier connects the grid of the 3rd PMOS.
In a preferred embodiment of the present invention, comprise described PTAT reference current generating circuit further and also comprise the 5th PMOS, 6th PMOS, described 5th PMOS, the grid of the 6th both PMOS is all connected with the grid of the second PMOS, described 5th PMOS is connected between the 3rd PMOS and the second resistance, its source electrode connects the drain electrode of the 3rd PMOS, its drain electrode connection second resistance, described 6th PMOS is connected between the 4th PMOS and the second bipolar transistor, its source electrode connects the drain electrode of the 4th PMOS, its drain electrode connection second bipolar transistor.
In a preferred embodiment of the present invention, comprise described first bipolar transistor further and the second bipolar transistor is bipolar npn transistor npn npn, the base stage of described first bipolar transistor is connected with its collector, connect after be connected with the second resistance, its grounded emitter, the base stage of described second bipolar transistor is connected with its collector, connect after be connected with the drain electrode of the 6th PMOS, its grounded emitter.
In a preferred embodiment of the present invention, comprise described first bipolar transistor further and the second bipolar transistor is positive-negative-positive bipolar transistor, the base stage of described first bipolar transistor is connected rear ground connection with its collector, its emitter connects the second resistance, the base stage of described second bipolar transistor is connected rear ground connection with its collector, its emitter connects the drain electrode of the 6th PMOS.
In a preferred embodiment of the present invention, comprise described PTAT reference current generating circuit further and comprise the 7th PMOS, 8th PMOS, first NMOS tube, second NMOS tube, 3rd bipolar transistor, 4th bipolar transistor, 3rd resistance, described 7th PMOS, the source electrode of the 8th both PMOS all connects power end VDD, both grids all connect the grid of the first PMOS, described first NMOS tube, the grid of both the second NMOS tube connects, the grid of the first NMOS tube is connected with its drain electrode, the drain electrode of described 7th PMOS connects the drain electrode of the first NMOS tube, the source electrode of described first NMOS tube connects the 3rd resistance, ground connection after other end connection the 3rd bipolar transistor of described 3rd resistance, the drain electrode of described 8th PMOS connects the drain electrode of the second NMOS tube, ground connection after source electrode connection the 4th bipolar transistor of described second NMOS tube.
In a preferred embodiment of the present invention, comprise described PTAT reference current generating circuit further and also comprise the 9th PMOS, the tenth PMOS, both grids all connect the grid of the second PMOS, described 9th PMOS is connected between the 7th PMOS and the first NMOS tube, the source electrode of the 9th PMOS is connected the drain electrode of the 7th PMOS and the drain electrode of the first NMOS tube respectively with drain electrode, tenth PMOS is connected between the 8th PMOS and the second NMOS tube, and the source electrode of the tenth PMOS is connected the drain electrode of the 8th PMOS and the drain electrode of the second NMOS tube respectively with drain electrode.
In a preferred embodiment of the present invention, comprise described 3rd bipolar transistor further and the 4th bipolar transistor is bipolar npn transistor npn npn, the base stage of described 3rd bipolar transistor is connected with its collector, connect after be connected with the 3rd resistance, its grounded emitter, the base stage of described 4th bipolar transistor is connected with its collector, connect after be connected with the source electrode of the second NMOS tube, its grounded emitter.
In a preferred embodiment of the present invention, comprise described 3rd bipolar transistor further and the 4th bipolar transistor is positive-negative-positive bipolar transistor, the base stage of described 3rd bipolar transistor is connected with its collector, connect rear ground connection, its emitter connects the 3rd resistance, the base stage of described 4th bipolar transistor is connected with its collector, connect rear ground connection, and its emitter connects the source electrode of the second NMOS tube.
The invention has the beneficial effects as follows: compared with prior art, thermal-shutdown circuit of the present invention is obtained by PTAT reference current generating circuit and raises and the reference current of rising with temperature, produce circuit with the excess temperature comparative voltage of PTAT reference current generating circuit current mirror each other reference current to be become not by technogenic influence and the voltage excess temperature comparative voltage voltage that raises with temperature and raise, judge whether temperature exceedes the threshold values of temperature protection by excess temperature comparative voltage and constant reference voltage, to realize when product temperature is too high, export overheat protector signal, control product introduction temperature protection state.Circuit structure of the present invention is simple; overheat protector trigger point is not by the impact of manufacture craft; accurately, batch consistance is good, precision is high, can be used as overheat protector module in the products such as various integrated circuit (IC) chip, MCM module, Switching Power Supply, has the good market development and is worth.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in embodiment of the present invention technology, be briefly described to the accompanying drawing used required in the description of embodiment technology below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the schematic diagram of the thermal-shutdown circuit of prior art;
Fig. 2 is the simulation waveform figure of the thermal-shutdown circuit of prior art;
Fig. 3 is the circuit theory diagrams of the preferred embodiment of the present invention;
Fig. 4 is the circuit theory diagrams of second embodiment of the invention;
Fig. 5 is the circuit theory diagrams of third embodiment of the invention;
Fig. 6 is the circuit theory diagrams of fourth embodiment of the invention;
Fig. 7 is the simulation waveform figure of the preferred embodiment of the present invention.
Wherein, 10-PTAT reference current generating circuit, 20-excess temperature comparative voltage produces circuit, 30-generating circuit from reference voltage.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Embodiment one
As shown in Figure 3, a kind of high precision thermal-shutdown circuit is disclosed in the present embodiment, comprise PTAT reference current generating circuit 10, excess temperature comparative voltage produces circuit 20, generating circuit from reference voltage 30, excess temperature comparer U1, described excess temperature comparative voltage produces circuit 20 and PTAT reference current generating circuit 10 current mirror each other, described excess temperature comparative voltage produces the output terminal of circuit 20, the output terminal of generating circuit from reference voltage 30 connects negative-phase input (-) and the normal phase input end (+) of excess temperature comparer U1 respectively, the output terminal of described excess temperature comparer U1 forms the output Out of thermal-shutdown circuit.PTAT reference current generating circuit 10 of the present invention does not affect by manufacture craft for obtaining, raise and the reference current of rising with temperature, excess temperature comparative voltage produces circuit 20 for the reference current of acquisition is changed into excess temperature comparative voltage, generating circuit from reference voltage 30 is for obtaining reference voltage Vref accurately, by the size comparing excess temperature comparative voltage and reference voltage Vref, excess temperature comparer U1 judges whether temperature exceedes the threshold values of temperature protection, when exceeding temperature protection threshold values, the output terminal Out of excess temperature comparer U1 exports overheat protector signal, control product introduction temperature protection state.
Concrete, described excess temperature comparative voltage produces circuit 20 and comprises the first PMOS PM1, the second PMOS PM2, the first resistance R1, the source electrode of described first PMOS PM1 connects power end VDD, the source electrode of its drain electrode connection second PMOS PM2, the drain electrode of described second PMOS PM2 connects ground connection after the first resistance R1.
As the preferred embodiments of the present invention, described PTAT reference current generating circuit 10 comprises the 3rd PMOS PM3, 4th PMOS PM4, 5th PMOS PM5, 6th PMOS PM6, first bipolar transistor Q1, second bipolar transistor Q2, operational amplifier U2, second resistance R2, described 3rd PMOS PM3, the source electrode of the 4th both PMOS PM4 is all connected with power end VDD, both grids are all connected with the grid of the first PMOS PM1, described 5th PMOS PM5, the grid of the 6th both PMOS PM6 is all connected with the grid of the second PMOS PM2, the drain electrode of described 3rd PMOS PM3 connects the source electrode of the 5th PMOS PM5, the drain electrode of the 5th PMOS PM5 connects the second resistance R2, tie point forms node A, the other end of the second resistance R2 connects ground connection after the first bipolar transistor Q1, the drain electrode of the 4th PMOS PM4 connects the source electrode of the 6th PMOS PM6, the drain electrode that tie point forms Node B the 6th PMOS PM6 connects ground connection after the second bipolar transistor Q2, node A, the normal phase input end of Node B difference concatenation operation amplifier U2 and negative-phase input, the output terminal of described operational amplifier U2 connects the grid of the 3rd PMOS PM3.
Concrete, described first bipolar transistor Q1 and the second bipolar transistor Q2 is bipolar npn transistor npn npn, the base stage of described first bipolar transistor Q1 is connected with its collector, connect after be connected with the second resistance R2, its grounded emitter, the base stage of described second bipolar transistor Q2 is connected with its collector, connect after be connected with the drain electrode of the 6th PMOS PM6, its grounded emitter.
In order to mate, obtain better performance, the first bipolar transistor Q1 adopts the coupled in parallel of M same size, and Q2 adopts the transistor of a same size.
In order to mate, resistance R1 and resistance R2 adopts identical resistance type, and domain adopts the coupling technique of painting.
Based on foregoing circuit structure, its circuit theory is as follows: be current mirror based on PTAT reference current generating circuit 10, node A is identical with the voltage in Node B 2, pressure drop on second resistance R2 equals the difference of the BE knot on the second bipolar transistor Q2 and the first bipolar transistor Q1 two transistors, i.e. V
r2=V
bE2-V
bE1,
According to the volt-ampere characteristic formula I of PN junction
d=I
s(e
v/VT-1) V is released
bE1=VT*ln (I1/MI
s), V
bE2=VT*ln (I2/I
s), wherein M is the number of the first bipolar transistor Q1 parallel transistor,
V
R2＝V
BE2-V
BE1
＝VT*ln(I2/I
S)-VT*ln(I1/M·I
S)
＝VT*lnM，
Electric current on second resistance R2
I
R2＝V
R2/R2
=(VT*lnM)/R2, VT=KT/q, T is absolute temperature, and q is electron charge, and k is Boltzmann constant, and q, k, M are not by the constant of transistor fabrication process influence of fluctuations, therefore, and I
r2for not being subject to transistor fabrication process influence of fluctuations and the variable increased along with the rising of temperature.
Circuit 20 and PTAT reference current generating circuit 10 current mirror is each other produced, the electric current I therefore on the first resistance R1 based on excess temperature comparative voltage
r1with the electric current I on the second resistance R2
r2, i.e. I
r1=I
r2=(VT*lnM)/R2, the voltage on the first resistance R1
V
R1＝I
R1*R1
=[R1* (VT*lnM)]/R2, the first resistance R1 and the second resistance R2 is of the same type, and matching is good, so V
r1for not being subject to transistor fabrication process influence of fluctuations and the variable increased with the rising of temperature, the voltage V on the first resistance R1
r1be the voltage of excess temperature comparer U1 negative phase end; The voltage of excess temperature comparer U1 positive terminal is the reference voltage Vref that generating circuit from reference voltage 30 exports simultaneously, and reference voltage Vref is voltage reference signal common in chip, zero temp shift, very accurate, precision, within ± 1%, is not subject to the impact of temperature and technological fluctuation, makes V when temperature raises
r1during >Vref, excess temperature comparer U1 output switching activity, triggers overheat protector.The voltage of input end is compared not by the impact of transistor fabrication process fluctuation owing to forming excess temperature comparer U1 two, the control signal that excess temperature comparer U1 is exported is not by the impact of transistor fabrication process fluctuation, the precision of excess temperature trigger point is high, batch consistance is good, is illustrated in figure 7 the simulation waveform figure of the preferred embodiment of the present invention.
Separately, form the first PMOS PM1 and the second PMOS PM2 that excess temperature comparative voltage produces circuit 20 current mirror, when not considering Power Supply Rejection Ratio, only the first PMOS PM1 just can realize principle of work of the present invention, the increase of the second PMOS PM2 can improve Power Supply Rejection Ratio, and the fluctuation reducing power end Vdd brings impact to circuit.
Separately, form two current mirror loops of PTAT reference current generating circuit 10, namely the first current mirror loop be made up of the 3rd PMOS PM3, the 5th PMOS PM5, the the second current mirror loop be made up of the 4th PMOS PM4, the 6th PMOS PM6, when not considering Power Supply Rejection Ratio, in first current mirror loop, only the 3rd PMOS PM3 just can realize principle of work of the present invention, the increase of the 5th PMOS PM5 can improve Power Supply Rejection Ratio, and the fluctuation reducing power end Vdd brings impact to circuit; When not considering Power Supply Rejection Ratio, in the second current mirror loop, only the 4th PMOS PM4 just can realize principle of work of the present invention, and the increase of the 6th PMOS PM6 can improve Power Supply Rejection Ratio, and the fluctuation reducing power end Vdd brings impact to circuit.
Embodiment two
Embodiment two as shown in Figure 4 is only from the difference of embodiment one: the type selecting of two bipolar transistors (Q1, Q2) is different, be positive-negative-positive bipolar transistor, wherein, the base stage of described first bipolar transistor Q1 is connected rear ground connection with its collector, its emitter connects the second resistance R2, the base stage of described second bipolar transistor Q2 is connected rear ground connection with its collector, its emitter connects the drain electrode of the 6th PMOS PM6.Principle of work is with embodiment one, and the excess temperature achieving overheat protector equally gets an electric shock point not by the impact of transistor fabrication process fluctuation, and excess temperature trigger point precision is high, batch consistance is good.
Embodiment three
Embodiment three is as shown in Figure 5 from the difference of embodiment one: the structure of PTAT reference current generating circuit 10 is different: described PTAT reference current generating circuit 10 comprises the 7th PMOS PM7, 8th PMOS PM8, 9th PMOS PM9, tenth PMOS PM10, first NMOS tube NM1, second NMOS tube NM2, 3rd bipolar transistor Q3, 4th bipolar transistor Q4, 3rd resistance R3, described 7th PMOS PM7, the source electrode of the 8th both PMOS PM8 all connects power end VDD, and both grids all connect the grid of the first PMOS PM1, described 9th PMOS PM9, the grid of the tenth both PMOS PM10 all connects the grid of the second PMOS PM2, described first NMOS tube NM1, the grid of both the second NMOS tube NM2 connects, and the grid of the first NMOS tube NM1 is connected with its drain electrode, the 7th PMOS PM7, the drain electrode of the 8th both PMOS PM8 connects the 9th PMOS PM9 respectively, the source electrode of the tenth PMOS PM10, described 9th PMOS PM9, the drain electrode of the tenth PMOS PM10 connects the first NMOS tube NM1 respectively, the drain electrode of the second NMOS tube NM2, the source electrode of described first NMOS tube NM1 connects the 3rd resistance R3, ground connection after other end connection the 3rd bipolar transistor Q3 of described 3rd resistance R3, ground connection after source electrode connection the 4th bipolar transistor Q4 of described second NMOS tube NM2.Wherein, the source electrode of the first NMOS tube NM1 and the tie point of the 3rd resistance R3 form node A, and the source electrode of the second NMOS tube NM2 and the tie point of the 4th bipolar transistor Q4 form Node B.
Concrete, described 3rd bipolar transistor Q3 and the 4th bipolar transistor Q4 is bipolar npn transistor npn npn, the base stage of described 3rd bipolar transistor Q3 is connected with its collector, connect after be connected with the 3rd resistance R3, its grounded emitter, the base stage of described 4th bipolar transistor Q4 is connected with its collector, connect after be connected with the source electrode of the second NMOS tube NM2, its grounded emitter.
In order to mate, obtain better performance, the 3rd bipolar transistor Q3 can adopt the coupled in parallel of M same model.
Based on foregoing circuit structure, its circuit theory is as follows: be current mirror based on PTAT reference current generating circuit 10, node A is identical with the voltage in Node B 2, pressure drop on 3rd resistance R3 equals the difference of the BE knot on the 4th bipolar transistor Q4 and the 3rd bipolar transistor Q3 two transistors, i.e. V
r3=V
bE4-V
bE3,
According to the volt-ampere characteristic formula I of PN junction
d=I
s(e
v/VT-1) V is released
bE3=VT*ln (I3/MI
s), V
bE4=VT*ln (I4/I
s), wherein M is the number of the first bipolar transistor Q1 parallel transistor,
V
R3＝V
BE4-V
BE3
＝VT*ln(I4/I
S)-VT*ln(I3/M·I
S)
＝VT*lnM，
Electric current on 3rd resistance R3
I
R3＝V
R3/R3
=(VT*lnM)/R3, VT=KT/q, T is absolute temperature, and q is electron charge, and k is Boltzmann constant, and q, k, M are not by the constant of transistor fabrication process influence of fluctuations, therefore, and I
r2for not being subject to transistor fabrication process influence of fluctuations and the variable increased along with the rising of temperature.
Produce circuit 20 and PTAT reference current generating circuit 10 current mirror each other based on excess temperature comparative voltage, the first resistance R1 and the 3rd resistance R3 is of the same type, and matching is good, the electric current I therefore on the first resistance R1
r1with the electric current I on the 3rd resistance R3
r3, i.e. I
r1=I
r3=(VT*lnM)/R3, the voltage on the first resistance R1
V
R1＝I
R1*R1
=[R1* (VT*lnM)]/R3, for not being subject to transistor fabrication process influence of fluctuations and the variable increased with the rising of temperature, the voltage V on the first resistance R1
r1be the voltage of excess temperature comparer U1 negative phase end; The voltage of excess temperature comparer U1 positive terminal is the reference voltage Vref that generating circuit from reference voltage 30 exports simultaneously, and reference voltage Vref is voltage reference signal common in chip, zero temp shift, very accurate, precision+-1% within, not by the impact of temperature and technological fluctuation, make V when temperature raises
r1during >Vref, excess temperature comparer U1 output switching activity, triggers overheat protector.The voltage of input end is compared not by the impact of transistor fabrication process fluctuation owing to forming excess temperature comparer U1 two, the control signal that excess temperature comparer U1 is exported is not by the impact of transistor fabrication process fluctuation, the precision of excess temperature trigger point is high, and batch consistance is good.
Separately, form two current mirror loops of PTAT reference current generating circuit 10, namely the first current mirror loop be made up of the 7th PMOS PM7, the 9th PMOS PM9, the the second current mirror loop be made up of the 8th PMOS PM8, the tenth PMOS PM10, when not considering Power Supply Rejection Ratio, in first current mirror loop, only the 7th PMOS PM7 just can realize principle of work of the present invention, the increase of the 9th PMOS PM9 can improve Power Supply Rejection Ratio, and the fluctuation reducing power end Vdd brings impact to circuit; When not considering Power Supply Rejection Ratio, in the second current mirror loop, only the 8th PMOS PM8 just can realize principle of work of the present invention, and the increase of the tenth PMOS PM10 can improve Power Supply Rejection Ratio, and the fluctuation reducing power end Vdd brings impact to circuit.
Embodiment four
Embodiment four as shown in Figure 6 is only from the difference of embodiment three: the type selecting of two bipolar transistors (Q3, Q4) is different, be positive-negative-positive bipolar transistor, wherein, described 3rd bipolar transistor Q3 and the 4th bipolar transistor Q4 is positive-negative-positive bipolar transistor, the base stage of described 3rd bipolar transistor Q3 is connected with its collector, connect rear ground connection, its emitter connects the 3rd resistance R3, the base stage of described 4th bipolar transistor Q4 is connected with its collector, connect rear ground connection, and its emitter connects the source electrode of the second NMOS tube NM2.Principle of work is with embodiment one, and the excess temperature achieving overheat protector equally gets an electric shock point not by the impact of transistor fabrication process fluctuation, and excess temperature trigger point precision is high, batch consistance is good.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (10)
1. a high precision thermal-shutdown circuit; it is characterized in that: comprise PTAT reference current generating circuit, excess temperature comparative voltage produces circuit, generating circuit from reference voltage, excess temperature comparer; described excess temperature comparative voltage produces circuit and PTAT reference current generating circuit current mirror each other; described excess temperature comparative voltage produces the output terminal of circuit, the output terminal of generating circuit from reference voltage connects excess temperature comparer respectively negative-phase input and normal phase input end, the output terminal of described excess temperature comparer forms the output (Out) of thermal-shutdown circuit.
2. a kind of high precision thermal-shutdown circuit according to claim 1; it is characterized in that: described excess temperature comparative voltage produces circuit and comprises the first PMOS, the second PMOS, the first resistance; the source electrode of described first PMOS connects power end VDD; the source electrode of its drain electrode connection second PMOS, the drain electrode of described second PMOS connects ground connection after the first resistance.
3. a kind of high precision thermal-shutdown circuit according to claim 2, it is characterized in that: described PTAT reference current generating circuit comprises the 3rd PMOS, 4th PMOS, first bipolar transistor, second bipolar transistor, operational amplifier, second resistance, described 3rd PMOS, the source electrode of the 4th both PMOS is all connected with power end VDD, both grids are all connected with the grid of the first PMOS, the drain electrode of described 3rd PMOS connects the second resistance, and both tie points form node A, the other end of described second resistance connects ground connection after the first bipolar transistor, the drain electrode of described 4th PMOS connects ground connection after the second bipolar transistor, the tie point of the 4th PMOS and the second bipolar transistor forms Node B, node A, the normal phase input end of Node B difference concatenation operation amplifier and negative-phase input, the output terminal of described operational amplifier connects the grid of the 3rd PMOS.
4. a kind of high precision thermal-shutdown circuit according to claim 3, it is characterized in that: described PTAT reference current generating circuit also comprises the 5th PMOS, 6th PMOS, described 5th PMOS, the grid of the 6th both PMOS is all connected with the grid of the second PMOS, described 5th PMOS is connected between the 3rd PMOS and the second resistance, its source electrode connects the drain electrode of the 3rd PMOS, its drain electrode connection second resistance, described 6th PMOS is connected between the 4th PMOS and the second bipolar transistor, its source electrode connects the drain electrode of the 4th PMOS, its drain electrode connection second bipolar transistor.
5. a kind of high precision thermal-shutdown circuit according to claim 4; it is characterized in that: described first bipolar transistor and the second bipolar transistor are bipolar npn transistor npn npn; the base stage of described first bipolar transistor is connected with its collector, connect after be connected with the second resistance; its grounded emitter; the base stage of described second bipolar transistor is connected with its collector, connect after be connected with the drain electrode of the 6th PMOS, its grounded emitter.
6. a kind of high precision thermal-shutdown circuit according to claim 4; it is characterized in that: described first bipolar transistor and the second bipolar transistor are positive-negative-positive bipolar transistor; the base stage of described first bipolar transistor is connected rear ground connection with its collector; its emitter connects the second resistance; the base stage of described second bipolar transistor is connected rear ground connection with its collector, its emitter connects the drain electrode of the 6th PMOS.
7. a kind of high precision thermal-shutdown circuit according to claim 2, it is characterized in that: described PTAT reference current generating circuit comprises the 7th PMOS, 8th PMOS, first NMOS tube, second NMOS tube, 3rd bipolar transistor, 4th bipolar transistor, 3rd resistance, described 7th PMOS, the source electrode of the 8th both PMOS all connects power end VDD, both grids all connect the grid of the first PMOS, described first NMOS tube, the grid of both the second NMOS tube connects, the grid of the first NMOS tube is connected with its drain electrode, the drain electrode of described 7th PMOS connects the drain electrode of the first NMOS tube, the source electrode of described first NMOS tube connects the 3rd resistance, ground connection after other end connection the 3rd bipolar transistor of described 3rd resistance, the drain electrode of described 8th PMOS connects the drain electrode of the second NMOS tube, ground connection after source electrode connection the 4th bipolar transistor of described second NMOS tube.
8. a kind of high precision thermal-shutdown circuit according to claim 6, it is characterized in that: described PTAT reference current generating circuit also comprises the 9th PMOS, tenth PMOS, both grids all connect the grid of the second PMOS, described 9th PMOS is connected between the 7th PMOS and the first NMOS tube, the source electrode of the 9th PMOS is connected the drain electrode of the 7th PMOS and the drain electrode of the first NMOS tube respectively with drain electrode, tenth PMOS is connected between the 8th PMOS and the second NMOS tube, the source electrode of the tenth PMOS is connected the drain electrode of the 8th PMOS and the drain electrode of the second NMOS tube respectively with drain electrode.
9. a kind of high precision thermal-shutdown circuit according to claim 8; it is characterized in that: described 3rd bipolar transistor and the 4th bipolar transistor are bipolar npn transistor npn npn; the base stage of described 3rd bipolar transistor is connected with its collector, connect after be connected with the 3rd resistance; its grounded emitter; the base stage of described 4th bipolar transistor is connected with its collector, connect after be connected with the source electrode of the second NMOS tube, its grounded emitter.
10. a kind of high precision thermal-shutdown circuit according to claim 8; it is characterized in that: described 3rd bipolar transistor and the 4th bipolar transistor are positive-negative-positive bipolar transistor; the base stage of described 3rd bipolar transistor is connected with its collector, connect rear ground connection; its emitter connects the 3rd resistance; the base stage of described 4th bipolar transistor is connected with its collector, connect rear ground connection, and its emitter connects the source electrode of the second NMOS tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510902198.7A CN105373181A (en) | 2015-12-09 | 2015-12-09 | High-precision over-temperature protection circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510902198.7A CN105373181A (en) | 2015-12-09 | 2015-12-09 | High-precision over-temperature protection circuit |
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| Publication Number | Publication Date |
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| CN105373181A true CN105373181A (en) | 2016-03-02 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201510902198.7A Pending CN105373181A (en) | 2015-12-09 | 2015-12-09 | High-precision over-temperature protection circuit |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105676939A (en) * | 2016-03-25 | 2016-06-15 | 厦门新页微电子技术有限公司 | Adjustable precise over-temperature protection circuit applied to wireless charging control chip |
| CN106094961A (en) * | 2016-08-08 | 2016-11-09 | 江苏芯力特电子科技有限公司 | A kind of have heat stagnation and return the thermal-shutdown circuit of function |
| CN111580437A (en) * | 2020-05-28 | 2020-08-25 | 上海艾为电子技术股份有限公司 | Enabling control circuit and electronic equipment |
| WO2021073663A3 (en) * | 2020-06-24 | 2021-06-10 | 华源智信半导体(深圳)有限公司 | Pin multiplexing-based temperature protection method and circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6188270B1 (en) * | 1998-09-04 | 2001-02-13 | International Business Machines Corporation | Low-voltage reference circuit |
| US6351111B1 (en) * | 2001-04-13 | 2002-02-26 | Ami Semiconductor, Inc. | Circuits and methods for providing a current reference with a controlled temperature coefficient using a series composite resistor |
| CN101931211A (en) * | 2009-06-17 | 2010-12-29 | 精工电子有限公司 | Overheating protection circuit and power supply integrated circuit |
| CN103840430A (en) * | 2012-11-22 | 2014-06-04 | 三星电机株式会社 | Overheating protection circuit |
| CN104679092A (en) * | 2015-01-29 | 2015-06-03 | 电子科技大学 | Over-temperature delay protection circuit with wide power voltage range |
-
2015
- 2015-12-09 CN CN201510902198.7A patent/CN105373181A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6188270B1 (en) * | 1998-09-04 | 2001-02-13 | International Business Machines Corporation | Low-voltage reference circuit |
| US6351111B1 (en) * | 2001-04-13 | 2002-02-26 | Ami Semiconductor, Inc. | Circuits and methods for providing a current reference with a controlled temperature coefficient using a series composite resistor |
| CN101931211A (en) * | 2009-06-17 | 2010-12-29 | 精工电子有限公司 | Overheating protection circuit and power supply integrated circuit |
| CN103840430A (en) * | 2012-11-22 | 2014-06-04 | 三星电机株式会社 | Overheating protection circuit |
| CN104679092A (en) * | 2015-01-29 | 2015-06-03 | 电子科技大学 | Over-temperature delay protection circuit with wide power voltage range |
Non-Patent Citations (1)
| Title |
|---|
| 张科等: "一种低压低功耗共源共栅带隙基准电压源的实现", 《微计算机信息》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105676939A (en) * | 2016-03-25 | 2016-06-15 | 厦门新页微电子技术有限公司 | Adjustable precise over-temperature protection circuit applied to wireless charging control chip |
| CN106094961A (en) * | 2016-08-08 | 2016-11-09 | 江苏芯力特电子科技有限公司 | A kind of have heat stagnation and return the thermal-shutdown circuit of function |
| CN111580437A (en) * | 2020-05-28 | 2020-08-25 | 上海艾为电子技术股份有限公司 | Enabling control circuit and electronic equipment |
| CN111580437B (en) * | 2020-05-28 | 2021-07-20 | 上海艾为电子技术股份有限公司 | Enabling control circuit and electronic equipment |
| WO2021073663A3 (en) * | 2020-06-24 | 2021-06-10 | 华源智信半导体(深圳)有限公司 | Pin multiplexing-based temperature protection method and circuit |
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