CN105357461A - OpenVPX-based ultra-high-definition video recording platform for unmanned aerial vehicle - Google Patents
OpenVPX-based ultra-high-definition video recording platform for unmanned aerial vehicle Download PDFInfo
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- CN105357461A CN105357461A CN201510661836.0A CN201510661836A CN105357461A CN 105357461 A CN105357461 A CN 105357461A CN 201510661836 A CN201510661836 A CN 201510661836A CN 105357461 A CN105357461 A CN 105357461A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
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Abstract
The invention discloses an OpenVPX-based ultra-high-definition video recording platform for an unmanned aerial vehicle. The OpenVPX-based ultra-high-definition video recording platform comprises a back plate, a main control switch plate, a power supply plate, a storage plate, a processing plate and an I/O plate; signal connection between the back plate and the I/O plate is realized by adopting four XMCs and one FMC; and all external interfaces of the platform are realized through the I/O plate. Aiming at the problems of not high enough bandwidth, poor high-density computing capability, not flexible enough expandability and the like in the existing video recording platform, a switch network structure and a high-speed serial protocol are adopted based on an OpenVPX architecture; therefore, the bandwidth and the computing capability of the whole platform are increased; and the expandability and the maintainability of the platform are improved.
Description
Technical field
The present invention relates to signal transacting field, be specifically related to a kind of unmanned plane ultra high-definition videograph platform based on OpenVPX, can be applicable to the videograph platform of unmanned plane.
Background technology
Domestic there is no meets VITA65 (OPENVPX) standard and the high-performance ultra high-definition videograph platform supporting PCIE interconnected at present, and existing platform exists, and available bandwidth is not high enough, high density computing capability is poor and the problem such as extensibility underaction, along with video resolution constantly increase, data volume sharply increases and requirements at the higher level to real-time processing speed, existing platform cannot satisfy the demands.
Summary of the invention
For the deficiencies in the prior art, the present invention aims to provide a kind of unmanned plane ultra high-definition videograph platform based on OpenVPX, solves that the available bandwidth of platform that existing platform exists is not high enough, high density computing capability is poor and the problem such as extensibility underaction.
To achieve these goals, the present invention adopts following technical scheme:
Based on the unmanned plane ultra high-definition videograph platform of OpenVPX, the interconnected backboard of the signal between comprising for each plate, to control for completion system level and data exchanging function main control switchboard, for settling signal processing capacity disposable plates, store and the memory plane of buffer tasks, I/O plate and the power panel for completing the function of supplying power to whole platform for completing data; Described backboard is the backboard based on OpenVPX equipment, and each plate adopts high speed serialization agreement to carry out data communication by being connected with backboard; In addition, the external interface that platform is all is all realized by described I/O plate.
It should be noted that, described backboard mainly adopts PCIE, GE and SATA3 interface as data path agreement.
It should be noted that, adopt and concentrate switch type topological structure as bus topolopy, and by arranging one to carry out each functional unit centralized control and management for the unit module of bus switch, the data interaction between all unit completes by this unit module.
It should be noted that, described main control switchboard, memory plane, disposable plates are used for the high speed connector that is connected with backboard and select the VPXRT2 differential connector of Tyco company of the U.S. to realize, and I/O plate is connected with the signal between backboard and adopts at least 4 XMC to add at least 1 FMC connector to realize.
It should be noted that, described I/O plate is provided with power interface, debugging interface, external interface, support differential signal, and be configured with FPGA support plate for interface process, for the corresponding interface conversion of various Interface realization.
It should be noted that, main control switchboard and power panel are positioned at the two ends of backboard, and main control switchboard and the side of power panel reserve the connector position that I/O plate is connected with backboard respectively.The two ends that main control switchboard and power panel are positioned at backboard can be beneficial to dispel the heat, and its space taken can fully be used for main control switchboard and power panel heat radiation while the interface signal quantity adopting the mode of both sides connector can provide larger, thus improve overall stability further.
It should be noted that, described main control switchboard selects the 1.5GHz processor of Freescale as main process chip, by its PCIeX8 interface and PCIe exchange chip interconnected; In addition, the plug-in DDRSDRAM of described main control switchboard as the external equipment in platform processes process, and by the plug-in kilomega network PHY chip of the special purpose interface of main process chip and backboard GE signal interconnection; In addition, the SATA signal of SATA chip and backboard is turned by special PCIe interconnected.
It should be noted that, described memory plane selects SATA3.0 interface as interface and supporting industry level NandFLASH, adopts plate to carry industrial SSD hard disk as main storage device in addition; Described memory plane is interconnected with main control switchboard on backboard, can support that whole processing platform is to the high speed storage requirements of data by the data exchanging function of main control switchboard.
It should be noted that, described disposable plates adopts the FPGA possessing high-speed parallel estimated performance as Main Processor Unit, by the buffering area of plug-in high speed DDRRAM as signal transacting, by LVDS and external interface transmit high-speed signals, carry out data communication by PCIeX4 and main control switchboard.Described disposable plates meets the real-time process of platform to high speed signal.
It should be noted that, on each plate, equal laying temperature transducer detects self working temperature, and testing result is collected by main control switchboard; Each temperature sensor all arranges alarm threshold, produces alarm when exceeding alarm temperature; In addition, each plate is arranged IPMC and be responsible for the monitoring temperature of veneer corresponding to it, voltage monitoring and electric control.
Beneficial effect of the present invention is:
1, the present invention is based on OpenVPX, each plate adopts high speed serialization agreement to carry out data communication by being connected with the backboard of OpenVPX equipment, and this modular design enhances maintainability and the extensibility of platform;
2, by adopting master control commutative Topology structure and using PCIE high speed serialization agreement, for whole platform improves higher bandwidth sum high density computing capability.
Accompanying drawing explanation
Fig. 1 is structural schematic block diagram of the present invention;
The platform network topology diagram that Fig. 2 provides for the embodiment of the present invention;
The main control switchboard plate bit port definition figure that Fig. 3 provides for the embodiment of the present invention;
The memory plane plate bit port definition figure that Fig. 4 provides for the embodiment of the present invention;
The disposable plates plate bit port definition figure that Fig. 5 provides for the embodiment of the present invention.
Embodiment
Below with reference to accompanying drawing, the invention will be further described, it should be noted that, the present embodiment, premised on the technical program, give detailed execution mode and concrete operating process, but protection scope of the present invention is not limited to the present embodiment.
As shown in Figure 1, the unmanned plane ultra high-definition videograph platform based on OpenVPX comprises backboard, main control switchboard, power panel, memory plane, disposable plates, I/O plate.The master control borad that power consumption is maximum and power panel lay respectively at two ends, and reserve the connector of I/O plate in side, and described connector adopts 4 XMC to add 1 FMC connector.Adopt both sides connector, larger interface signal quantity can be provided, simultaneously because the space of connector waste can fully be used for dispelling the heat to master control borad and power panel, thus improve overall stability.
Further, back board structure as shown in Figure 2, it should be noted that, in figure, VPX slot connects in the differential lines of backboard I/O interface because affecting by connector, the speed of differential signal is divided into high speed, middling speed and low speed three class, wherein " at a high speed " represent differential rate and reach 3.125Gb/s, " middling speed " represents differential rate and reaches 2Gb/s, and " low speed " represents differential rate and reaches 100MB/s.On backboard, backboard is connected employing 4 XMC and adds 1 FMC connector and realize with the signal of I/O plate, the high spacing of joining of I/O plate and backboard is 10mm.Platform external interface is all realized by I/O plate.
Further, backboard and main control switchboard topological structure and port definition are self-defined, wherein have 2 memory plane plate positions, can insert the standard storage plate of OpenVPX protocol definition, other 3 disposable plates plate positions can the Payload plate of supported protocol standard and Peripheral plate.Backboard high-speed data communication bus comprises: 6 road X4PCIe, 2 road GE circuit interfaces and 4 road SATA3.
The high speed connector that described main control switchboard, memory plane, disposable plates are used for being connected with backboard can specifically select the VPXRT2 differential connector of Tyco company of the U.S. to realize.
Main control switchboard is as the core veneer of platform, and its position is positioned at the leftmost side of platform, is conducive to the heat radiation of veneer.Main control switchboard slot port definition distributes as shown in Figure 3.Main control switchboard position externally presents the PCIe interface of 6 road X4, and PCIe adopts transmitting-receiving asynchronous clock pattern, and every road PCIe interface is totally 8 pairs of differential lines, do not have differential clocks in signal definition.P1 interface provides 32 pairs of differential signals altogether, can support 4 road PCIe, and two-way PCIe is in front 16 pairs of differential positions definition of P2 interface in addition.Wherein last road PCIe connects I/O plate, uses for Interface Expanding.In P2 interface, also define 4 road SATA interface signals, adopt 4 road SATA signals can support maximum 4 fast solid state memory discs at device interior.Master control borad externally draws 2 road GE circuit mouths, and for equipment commissioning and network service, two-way GE interface defines at last 4 row of P2 socket.8 extra single-ended signals define 2 RS232 interfaces and 4 general purpose I/O.
Outer platform except master control borad position also has 5 plate positions, and wherein VPX5 and VPX6 can support the 3U memory plane that specifies in OpenVPX agreement.StorageSlotProfileSLT3-STO-2U-14.5.1 specification supported by this memory plane.Its port definition distributes as shown in Figure 4.
Disposable plates VPX2, VPX3, VPX4 plate plate position place, provide high-speed channel interconnected between two between them, as the high-speed traffic interface of collaborative work between plate.Interface interconnected between two adopts the differential lines interface of X4, and each interface provides 4,4 differential signals received, and platform and backboard do not limit interconnecting channels and adopt which kind of DIFFERENTIAL PROTOCOL, and veneer oneself definition is between two consistent.Its port definition distributes as Fig. 5, and based on the definition of this plate bit port, the relevant criterion plate that can support has PeripheralSlotProfileSLT3-PER-1F-14.3.2, PeripheralSlotProfileSLT3-PER-1U-14.3.3.
Power panel have employed high performance TRACODC-DC module, and efficiency is up to 90%.
Main control switchboard adopt FreescleMPC8536, operating frequency 1.5GHz, by a PCIeX8 interface and PCIe exchange chip interconnected.Peripheral employing 5 DDR2SDRAM chip MT47H128M16RT expand to 1GB capacity internal memory (wherein a slice realizes ECC function).NORFLASH capacity is 64MB.NANDFLASH capacity is 1GB.In addition, this plate has 2 temperature sensors, is I2C interface, a connection handling device, and one connects BMC single-chip microcomputer.There is an I2C interface RTC connection handling device.Backboard external interface has: 6 road X4PCI-E, 2 road 1GbitEthernet, 4 road SATA, 2 road RS232,7 GPIO.
3U memory plane mainly completes the stored record function to video data, and this plate can support that the data-interface of 2 road SATA3.0 is read and write.Memory plane veneer FLASH heap(ed) capacity is 1GB.Supporting industry level NandFLASH.
For a person skilled in the art, according to above technical scheme and design, various corresponding change and distortion can be made, and all these change and distortion all should be included within the protection range of the claims in the present invention.
Claims (10)
1. based on the unmanned plane ultra high-definition videograph platform of OpenVPX, it is characterized in that, the interconnected backboard of the signal between comprising for each plate, to control for completion system level and data exchanging function main control switchboard, for settling signal processing capacity disposable plates, store and the memory plane of buffer tasks, I/O plate and the power panel for completing the function of supplying power to whole platform for completing data; Described backboard is the backboard based on OpenVPX equipment, and each plate adopts high speed serialization agreement to carry out data communication by being connected with backboard; In addition, the external interface that platform is all is all realized by described I/O plate.
2. the unmanned plane ultra high-definition videograph platform based on OpenVPX according to claim 1, it is characterized in that, adopt and concentrate switch type topological structure as bus topolopy, and by arranging one to carry out each functional unit centralized control and management for the unit module of bus switch, the data interaction between all unit completes by this unit module.
3. the unmanned plane ultra high-definition videograph platform based on OpenVPX according to claim 1, it is characterized in that, described backboard mainly adopts PCIE, GE and SATA3 interface as data path agreement.
4. the unmanned plane ultra high-definition videograph platform based on OpenVPX according to claim 1, it is characterized in that, described main control switchboard, memory plane, disposable plates are used for the high speed connector that is connected with backboard and select the VPXRT2 differential connector of Tyco company of the U.S. to realize, and I/O plate is connected with the signal between backboard and adopts at least 4 XMC to add at least 1 FMC connector to realize.
5. the unmanned plane ultra high-definition videograph platform based on OpenVPX according to claim 1, it is characterized in that, described I/O plate is provided with power interface, debugging interface and external interface, support differential signal, and be configured with FPGA support plate for interface process, for the corresponding interface conversion of various Interface realization.
6. the unmanned plane ultra high-definition videograph platform based on OpenVPX according to claim 1, it is characterized in that, main control switchboard and power panel are positioned at the two ends of backboard, and main control switchboard and the side of power panel remain for the connector position that I/O plate is connected with backboard respectively in advance.
7. the unmanned plane ultra high-definition videograph platform based on OpenVPX according to claim 1, it is characterized in that, described main control switchboard selects the 1.5GHz processor of Freescale as main process chip, by its PCIeX8 interface and PCIe exchange chip interconnected; In addition, the plug-in DDRSDRAM of described main control switchboard as the external equipment in platform processes process, and by the plug-in kilomega network PHY chip of the special purpose interface of main process chip and backboard GE signal interconnection; In addition, the SATA signal of SATA chip and backboard is turned by special PCIe interconnected.
8. the unmanned plane ultra high-definition videograph platform based on OpenVPX according to claim 1, it is characterized in that, described memory plane selects SATA3.0 interface as interface and supporting industry level NandFLASH, adopts plate to carry industrial SSD hard disk as main storage device in addition; Described memory plane is interconnected with main control switchboard on backboard, can support that whole processing platform is to the high speed storage requirements of data by the data exchanging function of main control switchboard.
9. the unmanned plane ultra high-definition videograph platform based on OpenVPX according to claim 1, it is characterized in that, described disposable plates adopts FPGA as Main Processor Unit, by the buffering area of plug-in high speed DDRRAM as signal transacting, by LVDS and external interface transmit high-speed signals, carry out data communication by PCIeX4 and main control switchboard.
10. the unmanned plane ultra high-definition videograph platform based on OpenVPX according to claim 1, it is characterized in that, on each plate, equal laying temperature transducer detects self working temperature, and testing result is collected by main control switchboard; Each temperature sensor all arranges alarm threshold, produces alarm when exceeding alarm temperature; In addition, each plate is arranged IPMC and be responsible for the monitoring temperature of veneer corresponding to it, voltage monitoring and electric control.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510661836.0A CN105357461A (en) | 2015-10-14 | 2015-10-14 | OpenVPX-based ultra-high-definition video recording platform for unmanned aerial vehicle |
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| CN201510661836.0A CN105357461A (en) | 2015-10-14 | 2015-10-14 | OpenVPX-based ultra-high-definition video recording platform for unmanned aerial vehicle |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109243007A (en) * | 2018-09-03 | 2019-01-18 | 华清瑞达（天津）科技有限公司 | Circuit board and aviation UAV recorder for aviation UAV recorder |
| CN109324988A (en) * | 2018-11-27 | 2019-02-12 | 中国科学院上海技术物理研究所 | A kind of standard PC case based on 3U VPX framework debugs pinboard in line hard ware |
| CN109729358A (en) * | 2017-10-30 | 2019-05-07 | 成都凯天电子股份有限公司 | Airborne video-with-audio recording plays back ruggedized monitor |
| CN109885526A (en) * | 2019-03-29 | 2019-06-14 | 中国电子科技集团公司第三十八研究所 | A kind of information processing platform based on OpenVPX bus |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109729358A (en) * | 2017-10-30 | 2019-05-07 | 成都凯天电子股份有限公司 | Airborne video-with-audio recording plays back ruggedized monitor |
| CN109243007A (en) * | 2018-09-03 | 2019-01-18 | 华清瑞达（天津）科技有限公司 | Circuit board and aviation UAV recorder for aviation UAV recorder |
| CN109324988A (en) * | 2018-11-27 | 2019-02-12 | 中国科学院上海技术物理研究所 | A kind of standard PC case based on 3U VPX framework debugs pinboard in line hard ware |
| CN109885526A (en) * | 2019-03-29 | 2019-06-14 | 中国电子科技集团公司第三十八研究所 | A kind of information processing platform based on OpenVPX bus |
| CN109885526B (en) * | 2019-03-29 | 2023-08-22 | 中国电子科技集团公司第三十八研究所 | Information processing platform based on OpenVPX bus |
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Application publication date: 20160224 |