CN105353604A - System and method for double-machine hot/cold backup autonomous switching control and information processing - Google Patents

System and method for double-machine hot/cold backup autonomous switching control and information processing Download PDF

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Publication number
CN105353604A
CN105353604A CN201510865036.0A CN201510865036A CN105353604A CN 105353604 A CN105353604 A CN 105353604A CN 201510865036 A CN201510865036 A CN 201510865036A CN 105353604 A CN105353604 A CN 105353604A
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standby
fpga
interface
control
bus driver
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CN105353604B (en
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马骋
张震
李晶
熊剑平
朱荣
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Tsinghua University
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Tsinghua University
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B9/00Safety arrangements
    • G05B9/02Safety arrangements electric
    • G05B9/03Safety arrangements electric with multiple-channel loop, i.e. redundant control systems

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  • General Physics & Mathematics (AREA)
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  • Automation & Control Theory (AREA)
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Abstract

The invention discloses a system and a method for double-machine hot/cold backup autonomous switching control and information processing The system comprises a host, a backup machine, a power supply control module, a power supply input interface, a power supply output interface, a network exchange module, a serial interface module, an external function module interface, a remote communication interface and man-machine interaction interface. The system and the method for double-machine hot/cold backup autonomous switching control and information processing have advantages of high reliability, strong independence and common interfaces.

Description

The control that the cold and hot backup of a kind of two-shipper independently switches and information handling system and method
Technical field
The invention belongs to the control in astrionic system and technical field of information processing, particularly utilize dual-host backup to realize controlling the electronic system with information processing.
Background technology
Due to the high reliability request of astrionic system, for ensureing the smooth enforcement of space mission, the scheme of dual-host backup usually can be taked.The form that dual-host backup is divided into cold standby different with Hot Spare two kinds, cold standby refers to host work, the idle redundancy backup mode of standby host, and Hot Spare refers to the redundancy backup mode that main frame standby host is simultaneously in running order.Adopt the mode of operation of cold standby, its advantage is when host work, standby host does not work, system redundancy can be improved like this, can not extra power consumption be produced again, to save energy consumption, but adopt at present in the electronic system of cold standby and usually need third party to adjudicate mechanism to judge working state of system and when main frame breaks down, switch to standby host work, system itself does not have the ability of initiatively switch operating state.Adopt in the electronic system of Hot Spare because active and standby two-shipper is in duty simultaneously, when wherein a certain remaining breaks down, system degradation is single remaining work, still can ensure that systemic-function is unaffected, but adopt the mode of Hot Spare to increase system power dissipation, the space mission relatively nervous to energy resource supply, economy is not good enough.
Summary of the invention
In view of this, necessary provide a kind of active and standby two-shipper to realize control that cold and hot backup mode independently switches and information handling system and method, independently can change between cold standby and Hot Spare two kinds of backup modes.
The control that the cold and hot backup of two-shipper independently switches and an information handling system, comprise main frame, standby host, energy supply control module, power input interface and power output interface, described main frame comprises primary processor and main FPGA, described primary processor is for carrying out the information processing of main frame, described main FPGA and described primary processor, energy supply control module, standby FPGA are connected, described main FPGA for carry out main frame input and output information conversion, on/off controls and measure voltage & current, control the rs 232 serial interface signal that main frame and standby host export and communicate with for FPGA with picture signal, described standby host comprises standby processor and standby FPGA, described standby processor is for carrying out the information processing of standby host, described standby FPGA is connected with described standby processor, energy supply control module, main FPGA, and described standby FPGA changes for the information of carrying out standby host input and output, on/off control and measure voltage & current, control the rs 232 serial interface signal that main frame and standby host export and communicate with main FPGA with picture signal, described energy supply control module comprises the first relay, second relay, 3rd relay, 4th relay and voltage and current detection circuit, described first Control standby host is powered, described second relay is connected power output interface with after the 3rd relay parallel connection, described 4th Control host supplying power, the break-make of described first relay and the second relay is controlled by main FPGA, the break-make of described 3rd relay and the 4th relay is controlled by standby FPGA, described voltage and current detection circuit detects host supplying power, standby host is powered and the electric current and voltage of externally fed, described power input interface is connected with external power source, described power output interface is connected with external function module.
Compared to prior art, the control that the cold and hot backup of two-shipper provided by the invention independently switches and information handling system and method can autonomous switching working modes and main frame and standby host can without sharing external communication interface interferingly, avoid the deficiency that conventional art needs third-party institution's control system mode of operation to switch, be more suitable for single interfaces environment, while raising system redundancy and reliability, balance can also be reached voluntarily between power consumption, computing power, more effectively can play system effectiveness, increase work efficiency.
Accompanying drawing explanation
The control that the cold and hot backup of two-shipper that Fig. 1 provides for the embodiment of the present invention independently switches and information handling system structured flowchart.
The serial interface module structured flowchart of the control that the cold and hot backup of two-shipper that Fig. 2 provides for the embodiment of the present invention independently switches and information handling system.
The energy supply control module structured flowchart of the control that the cold and hot backup of two-shipper that Fig. 3 provides for the embodiment of the present invention independently switches and information handling system.
The Man Machine Interface structured flowchart of the control that the cold and hot backup of two-shipper that Fig. 4 provides for the embodiment of the present invention independently switches and information handling system.
Main element symbol description
Control and information handling system 10 One AD sampling A/D chip ~ the 8th AD sampling A/D chip 550~557
Main frame 100 External function module interface 600
Main FPGA 110 Remote communication interface 700
Primary processor 120 Man Machine Interface 800
Standby host 200 Key-press input signaling interface 810
Standby FPGA 210 3rd bus driver 820
Standby processor 220 4th bus driver 830
Network exchange module 300 Picture signal output interface 840
Serial interface module 400 Power input interface 900
Serial port drive chip 410 Power output interface 910
First bus driver 430 First isolation resistance ~ the 4th isolation resistance R1~R4
Second bus driver 420 External function module 20
Energy supply control module 500 External power source 30
First relay ~ the 4th relay 510~513 Button 40
First code translator ~ the 4th code translator 520~523 LCDs 50
First measuring resistance ~ the 3rd measuring resistance 530~532 External communication network 60
First voltage amplifier ~ the 4th voltage amplifier 540~543
Following embodiment will further illustrate the present invention in conjunction with above-mentioned accompanying drawing.
Embodiment
The control cold and hot for the two-shipper provided embodiment of the present invention backup independently switched below and information handling system and method are described further.
Refer to Fig. 1, first embodiment of the invention provides the control that cold and hot backup independently switches of a kind of two-shipper and information handling system 10, comprising: main frame 100, standby host 200, network exchange module 300, serial interface module 400, energy supply control module 500, external function module interface 600, remote communication interface 700, Man Machine Interface 800, power input interface 900 and power output interface 910.
Described main frame 100 comprises primary processor 120 and main FPGA110, and described standby host 200 comprises standby processor 220 and standby FPGA210.Described primary processor 120 and main FPGA110 are interconnected, and described standby processor 220 and standby FPGA210 are interconnected.Described main frame 100 is connected main FPGA110 with passing through between standby host 200, carries out the mutual of status information, in this, as judging the other side's duty and carrying out the foundation of duty switching for the digital signal line of FPGA210.Status information between described main FPGA110, standby FPGA210 adopts alternately but is not limited to adopt serial port protocol to carry out, can support to use the mode pushed and inquire about to carry out simultaneously, described use pushes namely to the other side FPGA active push status information, and namely described inquiry waits for that the other side FPGA sends return state information after Query Information.Described mutual status information comprise processor whether normal, require the other side is in which kind of duty etc., can think that this FPGA lost efficacy when finding that a certain FPGA does not push effective status information and repeatedly inquires about and do not return effective status information.
Described primary processor 120 is for carrying out the information processing of main frame 100.Described primary processor 120 is connected with network exchange module 300 by own net controller, and then is communicated with external communication network 60 with external function module 20 by Ethernet.Described primary processor 120 realizes communicating with main FPGA110 by self serial ports controller, and relies on main FPGA110 realization to communicate with external function module 20, to the control of power supply and obtain button 40 information.Described primary processor 120 passes through images themselves signal controller output image information to Man Machine Interface 800 to control LCDs 50.
Described main FPGA110 is communicated with primary processor 120 by serial port protocol, the communication information comprises inquiry primary processor 120 duty, connect the serial ports in primary processor 120 and external function module interface 600, realize the serial communication of primary processor 120 and external function module 20, the Energy control information exported by primary processor 120 carries out changing to export energy supply control module 500 to, button trigger message is carried out conversion and exports primary processor 120 to.Described main FPGA connects energy supply control module 500 by digital signal line, realizes controlling and measure voltage & current the break-make of power supply.Described main FPGA obtains button trigger message by being connected with push button signalling interface in Man Machine Interface 800 and being sent to primary processor 120 by serial ports; By exporting the bus driver that control signal is enable or close in serial interface module 400 and Man Machine Interface 800, the rs 232 serial interface signal exported with indirect main control system 100 and standby host 200 and picture signal, avoid the mutual interference of output signal between main frame 100 and standby host 200; Be connected by digital signal line with standby FPGA210 and carry out information interaction.
Described standby processor 220 is for carrying out the information processing of standby host 200.Described standby processor 220 is connected with network exchange module 300 by own net controller, and then is communicated with external communication network 60 with external function module 20 by Ethernet.Described standby processor 220 realizes communicate with standby FPGA210 by self serial ports controller, and support communicates with external function module 20 for FPGA210 realization, to the control of power supply and obtain button 40 information.Described standby processor 220 passes through image signal controller output image information to Man Machine Interface 800 to control LCDs 50.
Described standby FPGA210 is communicated with standby processor 220 by serial port protocol, the communication information comprises inquiry for processor 220 duty, connect the serial ports in standby processor 220 and external function module interface 600, realize the serial communication of standby processor 220 and external function module 30, the Energy control information that standby processor 220 exports is carried out changing to export energy supply control module 500 to, button trigger message is carried out conversion and export standby processor 220 to; Connect energy supply control module 500 by digital signal line to realize controlling and measure voltage & current the break-make of power supply; Obtain button trigger message by being connected with push button signalling interface in Man Machine Interface 800 and being sent to standby processor 220 by serial ports; By exporting the bus driver that control signal is enable or close in serial interface module 400 and Man Machine Interface 800, the rs 232 serial interface signal exported with indirect main control system 100 and standby host 200 and picture signal, avoid the mutual interference of output signal between main frame 100 and standby host 200; To be connected with main FPGA110 by digital signal line and to carry out information interaction.
Described network exchange module 300 can be the network switch, comprises network exchanging chip and peripheral circuit thereof.This network exchange module 300 is connected by digital signal line with primary processor 120, standby processor 220, external function module interface 600, remote communication interface 700, realizes the network information mutual.
Refer to Fig. 2, described serial interface module 400 connects described main FPGA110, standby FPGA210 and external function module interface 600, the output rs 232 serial interface signal that described main FPGA110 or standby FPGA210 sends is carried out change with isolate after sends into described external function module interface 600, and the input rs 232 serial interface signal received by described external function module interface 600 is through conversion and send into described main FPGA110 after isolating or for FPGA210.Refer to Fig. 2, described serial interface module 400 comprises serial port drive chip 410, first bus driver 430, second bus driver 420, isolation resistance R1 and isolation resistance R2.Described main FPGA110 and standby FPGA210 is connected to the first bus driver 430 and the second bus driver 420 respectively to the signal wire that same serial ports exports, via the input end being jointly connected to serial port drive chip 410 after this first bus driver 430 or the second bus driver 420, carry out signal conversion by this serial port drive chip 410 and output to the serial signal interface of external function module interface 600.Described first bus driver 430 and the second bus driver 420 play buffer action, described first bus driver 430 and the respective enable port of the second bus driver 420 are controlled respectively by main FPGA110 and standby FPGA210, namely enable first bus driver 430 of a side is had in main FPGA110 and standby FPGA210, this first bus driver 430 just can normally work, similarly, have enable second bus driver 420 of a side in main FPGA110 and standby FPGA210, this second bus driver 420 just can normally work.First bus driver 430 and the second bus driver 420 can not be in enabled state simultaneously.Serial port drive chip 410 carries out signal conversion to the serial signal inputted by external function module interface 600, and the signal after conversion is connected to main FPGA110 by isolation resistance R1, is connected to standby FPGA210 by isolation resistance R2.Export rs 232 serial interface signal to isolate through the first bus driver 430 and the second bus driver 420, input rs 232 serial interface signal is isolated through isolation resistance R1 and isolation resistance R2, just can realize main FPGA110 and standby FPGA210 without sharing a serial ports interferingly by above-mentioned partition method.
Refer to Fig. 3, described energy supply control module 500 comprises the first relay ~ the 4th relay 510 ~ 513, first code translator ~ the 4th code translator 520 ~ 523 and voltage and current detection circuit, and voltage and current detection circuit described in the present embodiment comprises the first measuring resistance ~ the 3rd measuring resistance 530 ~ 532, first voltage amplifier ~ the 4th voltage amplifier 540 ~ 543 and an AD sampling A/D chip ~ the 8th AD sampling A/D chip 550 ~ 557.Described main FPGA110 exports the control signal of control first relay 510 second and relay 511 break-make, this control signal is connected to the input end of the first code translator 520 and the second code translator 521 by control signal wire, controls the first relay 510 processed and the second relay 511 break-make via after the first code translator 520 and the second code translator 521 decoding.Similarly, the control signal the 3rd that standby FPGA210 exports controls the 3rd relay 512 and the 4th relay 513 break-make after code translator 522 and the 4th code translator 523 decoding.First relay 510 controls standby host and powers, and the 4th relay 513 main control system is powered, and is connected to power output interface 910 after the second relay 511 and the 3rd relay 512 parallel connection, controls external function module 20 and powers.Described voltage and current detection circuit for detecting host supplying power, standby host powers and the electric current and voltage of externally fed.Supply voltage is by being sent to main FPGA110 or standby FPGA210 after first, fourth, five, eight AD sampling A/D chip 550,553,554,557 back production, supply current is converted to voltage by the first measuring resistance ~ the 3rd measuring resistance 530 ~ 532, be sent to after the first voltage amplifier ~ the 4th voltage amplifier 540 ~ 543 amplifies second and third, six, seven AD sampling A/D chip 551,552,555,556 be sent to main FPGA110 or standby FPGA210.Now power with standby host and be detected as example and be described, the voltage exported through the first relay 510 is sent to main FPGA110 by after AD sampling A/D chip 550 back production by information interactive interface, the electric current exported through the first relay 510 is converted to voltage to be measured by the first measuring resistance 530, the 2nd AD sampling A/D chip 551 is sent to after the first voltage amplifier 540 amplifies, metrical information is sent to main FPGA110 by the information interactive interface of AD sampling A/D chip 551 by rear second, the voltage that standby host is powered can be obtained thus, current information, host supplying power is identical therewith with the measure voltage & current principle of externally fed.
Described external function module interface 600 is the connector interconnected with external function module 20, comprises serial signal interface and Ethernet interface.Described serial signal interface is connected with serial interface module 400, and described Ethernet interface is connected with network exchange module 300.
Described remote communication interface 700 is the connector interconnected with external communication network 60, comprises Ethernet interface, and described remote communication interface 700 is connected with network exchange module 300.
Refer to Fig. 4, described Man Machine Interface 800 receives the man-machine interaction signal of primary processor 120 and standby processor 220 output, and this man-machine interaction signal is sent into corresponding human-computer interaction device.Described human-computer interaction device comprises button 40, liquid crystal display 50 etc.Refer to Fig. 4, described Man Machine Interface 800 comprises key-press input signaling interface 810, the 3rd bus driver 820, the 4th bus driver 830 and picture signal output interface 840.The image signal line that described primary processor 120 and standby processor 220 export is connected to the 3rd bus driver 820 and the 4th bus driver 830 respectively, interconnect via after the 3rd bus driver 820 and the 4th bus driver 830 and be connected to picture signal output interface 840, and exporting LCDs 50 further to.Described picture signal output interface 840 is the picture signal connector that LCDs 50 is mated.Described 3rd bus driver 820 and the 4th bus driver 830 play buffer action, described 3rd bus driver 820 and the respective enable port of the 4th bus driver 830 are controlled respectively by main FPGA110 and standby FPGA210, can not be in enabled state to two different bus drivers that same output image signal line is isolated simultaneously.Described outside input key signal is connected to main FPGA110 through isolation resistance R3 respectively after key-press input signaling interface 810, is connected to standby FPGA210 through isolation resistance R4.Key-press input signaling interface 810 is the connector mated with external key 40.Output image signal is isolated through the 3rd bus driver 820 and the 4th bus driver 830, input key signal is isolated through isolation resistance R3 and isolation resistance R4, just can realize main FPGA110 and standby FPGA210 without common image signal output interface 840 and key-press input signaling interface 810 interferingly by above-mentioned partition method.
Described power input interface 900 and power output interface 910 are the connector of power supply input and output, are made up of power interface.Described power output interface 910 is connected with external function module 20, and described power input interface 900 is connected with external power source 30.
It should be noted that, in the control that the cold and hot backup of the two-shipper that the present embodiment provides independently switches and information handling system, described network exchange module 300, serial interface module 400, external function module interface 600, remote communication interface 700 and Man Machine Interface 800 is equal optional components, in other words, the control that independently switches of the cold and hot backup of two-shipper provided by the invention and information handling system can only be made up of main frame 100, standby host 200, energy supply control module 500, power input interface 900 and power output interface 910.
The method of the autonomous switching of the control that the cold and hot backup of two-shipper provided the present embodiment below independently switches and information handling system is described.
The autonomous changing method of a kind of cold and hot backup of two-shipper, comprises the following steps:
S1, provides the two-shipper control that cold and hot backup independently switches and information handling system 10;
S2, to system power supply, main frame 100 and standby host 200 work simultaneously, enter startup self-detection state, obtain primary processor 120 and the duty for processor 220;
S3, the mode of operation that system will be taked is judged according to the primary processor 120 got and the duty of standby processor 220, if main frame 100 and standby host 200 all normally work, then main FPGA110 control energy supply control module 500 disconnects standby host power supply, and system enters cold standby mode of operation; If main frame 100 normally works, standby host 200 has exception, then main FPGA110 control energy supply control module 500 disconnects standby host power supply, and inner marker standby host fault, system enters main frame list remaining duty; If it is abnormal that standby FPGA210 detects main frame 100, then control energy supply control module 500 for FPGA210 and disconnect host power supply, system enters standby host list remaining duty.
In step S1, the control that the cold and hot backup of described machine independently switches and information handling system 10 can be the maximum system of all functions module comprised in embodiment, also can be the minimum system be only made up of main frame 100, standby host 200, energy supply control module 500, power input interface 900 and power output interface 910, or the combination of above-mentioned minimum system and partial function module.
In step S2, give system power supply by power input interface 900, main frame 100 and standby host 200 obtain power supply by energy supply control module 500 and start working, and now main frame 100 and standby host 200 all externally do not carry out information interaction.The method obtaining the duty of primary processor 120 and standby processor 220 described in the present embodiment is: carry out heartbeat detection by serial ports between primary processor 120 and main FPGA110, main FPGA110 obtains the information whether primary processor 120 normally works, carry out heartbeat detection between processor 220 and standby FPGA210 by serial ports, standby FPGA210 obtains the information whether standby processor 220 normally works.
In step S3, described main FPGA110 and standby FPGA210 carries out state alternately by interconnect signal line, judges according to the primary processor 120 got and the duty of standby processor 220 mode of operation that system will be taked.Described mode of operation is specially:
1) if main frame 100, standby host 200 all normally work, then main FPGA110 control energy supply control module 500 repeat circuit 510 disconnects standby host power supply, and system enters cold standby mode of operation.If comprise serial interface module 400 in system, then main FPGA110 controls the second bus driver 420 in serial interface module 400 and is in not enabled state, and the first bus driver 430 is in enabled state.If comprise Man Machine Interface 800 in system, then main FPGA110 controls the 4th bus driver 830 in Man Machine Interface 800 and is in not enabled state, and the 3rd bus driver 820 is in enabled state.
2) if main frame 100 normally works, standby host 200 has exception, then main FPGA110 performs 1) middle power operation is to standby host 200 power-off, and inner marker standby host 200 fault, system enters the single remaining duty of main frame 100.It is identical with during cold standby pattern with bus driver state in Man Machine Interface 800 that main FPGA110 controls serial interface module 400.
3) if standby FPGA210 detects main frame 100 extremely, then control energy supply control module 500 repeat circuit 513 for FPGA210 and disconnect host power supply, system enters the single remaining duty of standby host 200.If comprise serial interface module 400 in system, then control the second bus driver 420 in serial interface module 400 for FPGA210 and be in enabled state, the first bus driver 430 is in not enabled state.If comprise Man Machine Interface 800 in system, then control the 4th bus driver 830 in Man Machine Interface 800 for FPGA210 and be in enabled state, the 3rd bus driver 820 is in not enabled state.
Further, system can switch between cold standby pattern and hot-standby mode.
1) cold standby pattern switches hot-standby mode
If startup self-detection main frame 100 and standby host 200 all without exception, then system enters cold standby mode of operation, now, primary processor 120 is monitored own resource expense and is obtained power consumption information by the voltage and current detection circuit in energy supply control module 500, when the excessive and power consumption of resource overhead still has surplus, main frame 100 controls energy supply control module 500 repeat circuit 510 and closes as standby host is powered and by working in the information of hot-standby mode with standby FPGA210 interconnect signal line delivery request standby host 200.Standby host 200 detects interconnect signal line after starting shooting and works in hot-standby mode.Under hot-standby mode, standby host 200 bears part evaluation work simultaneously, but does not externally export the information such as serial ports, network interface, image, Energy control.
2) hot-standby mode switches cold standby pattern
Under Hot Spare mode of operation, if by the voltage and current detection circuit in energy supply control module 500, main frame 100 detects that system power dissipation transfinites, then can to standby host 200 power-off, system enters cold standby mode of operation.
It should be noted that, when retraining without other, the changing method of the cold and hot backup of above-mentioned two-shipper autonomous changing method method and cold standby pattern and hot-standby mode is equally applicable to the situation of many external function modules, Multi-netmouth, Multi-serial port, many buttons, many picture output signals line.
Compared to prior art, first embodiment of the invention traditional cold backup and Hot Spare technology basis on, propose control and information handling system and method that the cold and hot backup of two-shipper independently switches, this system can independently switching working mode and main frame and standby host can without sharing external communication interface interferingly, avoid the deficiency that conventional art needs third-party institution's control system mode of operation to switch, be more suitable for single interfaces environment, while raising system redundancy and reliability, can also voluntarily in power consumption, balance is reached between computing power, more effectively can play system effectiveness, increase work efficiency.
Second embodiment of the invention provides a kind of active and standby two-shipper common user communication interface, comprises driving chip, the first bus driver, the second bus driver, the first isolation resistance, the second isolation resistance.The Enable Pin of described first bus driver connects main frame first control signal, standby host first control signal, and the Enable Pin of described second bus driver connects main frame second control signal, standby host second control signal.The input end of described first bus driver connects the output signal of main frame, output terminal connects the inside input end of described driving chip, the input end of described second bus driver connects the output signal of standby host, output terminal connects the inside input end of described driving chip, and the output signal of described main frame, the output signal of standby host export external unit to after described driving chip conversion.One end of described first isolation resistance connects the internal output terminal of described driving chip, the other end connects main frame, one end of described second isolation resistance connects the internal output terminal of described driving chip, the other end connects standby host, the input signal that external unit sends is after described driving chip conversion, enter main frame through described first isolation resistance, enter standby host through the second isolation resistance.Described driving chip can be serial port drive chip, also can be Ethernet driving chip.
The output signal of main frame connects the first bus driver, the output signal of standby host connects the second bus driver, the Enable Pin of described first bus driver is controlled respectively by main frame and standby host, a side this first bus driver enable is had in main frame and standby host, namely this first bus driver works, the Enable Pin of described second bus driver is controlled respectively by main frame and standby host, a side this second bus driver enable is had in main frame and standby host, namely this second bus driver works, and described first bus driver and the second bus driver can not be in enabled state simultaneously.The input signal that external unit sends enters main frame through the first isolation resistance, and the input signal that external unit sends enters standby host through the second isolation resistance.The resistance of described first isolation resistance and the second isolation resistance can be selected according to practical situations, and the resistance of the first isolation resistance described in the present embodiment is 100 to 200 ohm, and described second isolation resistance is 100 to 200 ohm.
Please also refer to Fig. 2 and Fig. 4, the serial interface module 400 of the control that the active and standby two-shipper common user communication interface that second embodiment of the invention provides independently switches as the cold and hot backup of first embodiment of the invention two-shipper and information handling system 10 and Man Machine Interface 800.It is pointed out that the active and standby two-shipper common user communication interface that second embodiment of the invention provides is applicable to various active and standby two-unit standby system, and be not limited only to control that the cold and hot backup of two-shipper in first embodiment of the invention independently switches and information handling system 10.
Compared to prior art, the active and standby two-shipper common user communication interface that second embodiment of the invention provides can be applied to various active and standby two-unit standby system, can ensure that active and standby two-shipper is without sharing external communication interface interferingly, be applicable to single interfaces environment, effectively can play system effectiveness, increase work efficiency.
In addition, those skilled in the art also can do other changes in spirit of the present invention, and certainly, these changes done according to the present invention's spirit, all should be included within the present invention's scope required for protection.

Claims (10)

1. the control that independently switches of the cold and hot backup of two-shipper and an information handling system, is characterized in that, comprise main frame, standby host, energy supply control module, power input interface and power output interface;
Described main frame comprises primary processor and main FPGA, described primary processor is for carrying out the information processing of main frame, described main FPGA and described primary processor, energy supply control module, standby FPGA are connected, described main FPGA for carry out main frame input and output information conversion, on/off controls and measure voltage & current, control the rs 232 serial interface signal that main frame and standby host export and communicate with for FPGA with picture signal;
Described standby host comprises standby processor and standby FPGA, described standby processor is for carrying out the information processing of standby host, described standby FPGA is connected with described standby processor, energy supply control module, main FPGA, and described standby FPGA changes for the information of carrying out standby host input and output, on/off control and measure voltage & current, control the rs 232 serial interface signal that main frame and standby host export and communicate with main FPGA with picture signal;
Described energy supply control module comprises the first relay, second relay, 3rd relay, 4th relay and voltage and current detection circuit, described first Control standby host is powered, described second relay is connected power output interface with after the 3rd relay parallel connection, described 4th Control host supplying power, the break-make of described first relay and the second relay is controlled by main FPGA, the break-make of described 3rd relay and the 4th relay is controlled by standby FPGA, described voltage and current detection circuit detects host supplying power, standby host is powered and the electric current and voltage of externally fed,
Described power input interface is connected with external power source;
Described power output interface is connected with external function module.
2. the control that independently switches of the cold and hot backup of two-shipper as claimed in claim 1 and information handling system, is characterized in that, comprise network exchange module, serial interface module, external function module interface, remote communication interface and Man Machine Interface further;
Described network exchange module comprises the network switch, and described network exchange module is connected by digital signal line with primary processor, standby processor, external function module interface, remote communication interface, realizes the network information mutual;
Described serial interface module connects described main FPGA, standby FPGA and external function module interface, the output rs 232 serial interface signal that described main FPGA or standby FPGA sends is carried out change with isolate after sends into described external function module interface, and by described external function module interface to input rs 232 serial interface signal through conversion and send into described main FPGA after isolating or for FPGA;
Described external function module interface comprises serial signal interface and Ethernet interface, and described serial signal interface connects described serial interface module, and described Ethernet interface connects described network exchange module;
Described remote communication interface is the connector interconnected with external communication network, is connected, comprises Ethernet interface with described network exchange module;
Described Man Machine Interface receives the man-machine interaction signal of primary processor and standby processor output, and this man-machine interaction signal is sent into corresponding human-computer interaction device.
3. the control that independently switches of the cold and hot backup of two-shipper as claimed in claim 2 and information handling system, it is characterized in that, described serial interface module comprises serial port drive chip, the first bus driver, the second bus driver, the first isolation resistance, the second isolation resistance; Described main FPGA and standby FPGA is connected to the first bus driver and the second bus driver respectively to the signal wire that same serial ports exports, via the input end being jointly connected to described serial port drive chip after this first bus driver or the second bus driver, after described serial port drive chip carries out signal conversion, output to the serial signal interface of external function module interface; The enable port of described first bus driver and the enable port of the second bus driver are by main FPGA and standby FPGA co-controlling, and the first bus driver and the second bus driver can not be in enabled state simultaneously; Serial port drive chip carries out signal conversion to the serial signal inputted by external function module interface, and the signal after conversion is connected to main FPGA by the first isolation resistance, is connected to standby FPGA by the second isolation resistance.
4. the control that independently switches of the cold and hot backup of two-shipper as claimed in claim 2 and information handling system, it is characterized in that, described human-computer interaction device comprises button and LCDs, and described Man Machine Interface comprises key-press input signaling interface, picture signal output interface, the 3rd bus driver, the 4th bus driver, the 3rd isolation resistance and the 4th isolation resistance; The image signal line that described primary processor and standby processor export is connected to the 3rd bus driver and the 4th bus driver respectively, jointly be connected to picture signal output interface via after the 3rd bus driver and the 4th bus driver, and export LCDs to further; Described 3rd bus driver and the 4th bus driver enable port are separately by main FPGA and standby FPGA co-controlling, and described 3rd bus driver and the 4th bus driver can not be in enabled state simultaneously; Push button signalling is connected to main FPGA through the 3rd isolation resistance after key-press input signaling interface, is connected to standby FPGA through the 4th isolation resistance.
5. the control that independently switches of the cold and hot backup of two-shipper as claimed in claim 1 or 2 and information handling system, it is characterized in that, described energy supply control module comprises the first code translator, the second code translator, the 3rd code translator and the 4th code translator further; The first control signal wire that main FPGA exports is connected to the input end of the first code translator, exports control signal and control the first relay on-off after the first decoder for decoding; The second control signal wire that main FPGA exports is connected to the input end of the second code translator, exports control signal and control the second relay on-off after the second decoder for decoding; The 3rd control signal wire that standby FPGA exports is connected to the input end of the 3rd code translator, exports control signal and control the 3rd relay on-off after the 3rd decoder for decoding; The 4th control signal wire that standby FPGA exports is connected to the input end of the 4th code translator, exports control signal and control the 4th relay on-off after the 4th decoder for decoding.
6. the control that independently switches of the cold and hot backup of two-shipper as claimed in claim 1 or 2 and information handling system, it is characterized in that, described voltage and current detection circuit comprises measuring resistance, voltage amplifier, an AD sampling A/D chip and the 2nd AD sampling A/D chip; Supply voltage is by being sent to described main FPGA or standby FPGA after a described AD sampling A/D chip back production, supply current is converted to voltage by described measuring resistance, is sent to described 2nd AD sampling A/D chip and is sent to described main FPGA or standby FPGA after described voltage amplifier amplifies.
7. the control that independently switches of the cold and hot backup of two-shipper as claimed in claim 1 or 2 and information handling system, it is characterized in that, described primary processor is communicated with external communication network with external function module by respective Ethernet interface with for processor; Communicated with corresponding FPGA by respective serial ports controller, and rely on this FPGA to realize communicating with external function module, to the control of power supply and acquisition key information; LCD screen display is controlled by respective image signal controller output image information.
8. the control that independently switches of the cold and hot backup of two-shipper as claimed in claim 1 or 2 and information handling system, it is characterized in that, described main FPGA and standby FPGA are by serial ports and each self-corresponding processor communication; Connect described energy supply control module by digital signal line to realize controlling and measure voltage & current the break-make of power supply.
9. the method that independently switches of the cold and hot backup of two-shipper, is characterized in that, comprise the following steps:
S1, provides the control and information handling system that independently switch just like the cold and hot backup of the two-shipper described in claim 1 or 2;
S2, the control independently switch the cold and hot backup of described two-shipper and information handling system are powered, main frame and standby host work simultaneously, enter startup self-detection state, main FPGA carries out heartbeat detection to primary processor, standby FPGA carries out heartbeat detection to standby processor, obtains primary processor and the duty for processor;
S3, judges according to the primary processor got and the duty of standby processor the mode of operation that system will be taked, if main frame and standby host all normally work, then main FPGA controls energy supply control module disconnection standby host power supply, and system enters cold standby mode of operation; If main frame normally works, standby host has exception, then main FPGA controls energy supply control module disconnection standby host power supply, and inner marker standby host fault, system enters main frame list remaining duty; If it is abnormal that standby FPGA detects main frame, then control energy supply control module for FPGA and disconnect host power supply, system enters standby host list remaining duty.
10. the method that independently switches of the cold and hot backup of two-shipper as claimed in claim 9, is characterized in that, comprise the changing method of a kind of cold standby pattern and hot-standby mode further:
S4, main processor monitors own resource expense also obtains power consumption information by energy supply control module, if under system is in cold standby mode of operation and resource overhead is excessive, power consumption still has surplus, then performs step S5, if system is in Hot Spare mode of operation and system power dissipation transfinites, then perform step S6;
S5, host computer control relay closes is that standby host is powered and worked in the information of hot-standby mode by interconnect signal line delivery request standby host, detects interconnect signal line and works in hot-standby mode, bear part evaluation work simultaneously, return step S4 after standby host start;
S6, host computer control relay disconnects standby host power-off, and system enters cold standby mode of operation, returns step S4.
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