CN105353297B - Universal anti-interference digital processing board test platform and method of testing - Google Patents

Universal anti-interference digital processing board test platform and method of testing Download PDF

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Publication number
CN105353297B
CN105353297B CN201510872498.5A CN201510872498A CN105353297B CN 105353297 B CN105353297 B CN 105353297B CN 201510872498 A CN201510872498 A CN 201510872498A CN 105353297 B CN105353297 B CN 105353297B
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China
Prior art keywords
testing
backboard
cabinet
clock
testing backboard
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CN201510872498.5A
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Chinese (zh)
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CN105353297A (en
Inventor
董树鹏
王云帆
邢强强
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Tianjin 764 Communication and Navigation Technology Corp
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Tianjin 764 Communication and Navigation Technology Corp
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits

Abstract

The present invention relates to a kind of universal anti-interference digital processing board test platform and method of testing,Including cabinet,Testing backboard,Calculation machine,RF processing unit,Transformation input power and external clock,Testing backboard,Including voltage conversion chip,Clock level conversion chip,Gain control chip,Signal conversion chip,Several radio frequency connectors,Several low-frequency connectors,Each connector function port,Communication serial port leads to cabinet panel,Have the technical effect that functional test and the index verification demand that can be fully met to the anti-interference digital processing plate of each model,And support to carry out after-treatment to clock signal,To meet the clock demand of different model digiboard,Backboard is connected by low frequency socket on cabinet with calculation machine,It can monitor that communication serial port exports,Data are verified,And control command can be sent,Test response condition.

Description

Universal anti-interference digital processing board test platform and method of testing
Technical field
Invention is related to a kind of anti-interference digital baseband board test platform, more particularly to a kind of universal anti-interference digital processing plate Test platform and method of testing.
Background technology
In recent years, Satellite Navigation Technique is widely applied in multiple fields such as military affairs, scientific research, agriculturals, possesses BDS systems The anti-interference satellite antenna technology of system antijamming capability also obtains quick development, the anti-interference number that each manufacturer production makes at present Word baseband board species is various, and external interface, mating external clock, power supply mode etc. are had nothing in common with each other, and its performance is verified When, it is also desirable to according to features, test fixture is made, individually checking, brings great inconvenience.
The content of the invention
In view of the problem of prior art is present, invention provides a kind of universal anti-interference digital baseband board test platform to current The anti-interference digital baseband plate of the B3 frequencies of the Big Dipper two of main flow, there is provided unified, complete test platform, be able to verify that its data passes Defeated, self-test, various functions, the concrete technical scheme such as channel status monitoring, control command are, at a kind of universal anti-interference numeral Manage board test platform, including cabinet, testing backboard, calculation machine, RF processing unit, transformation input power and it is outside when Clock, it is characterised in that:Described testing backboard, including voltage conversion chip, clock level conversion chip, gain control chip, Signal conversion chip, several radio frequency connectors, several low-frequency connectors, each connector function port, communication serial port lead to machine Case panel;Circuit is connected as, and external power source enters cabinet inside by power connector, is powered for testing backboard, testing backboard By voltage conversion chip, it is powered for measurand letter stencil;External clock is accessed by cabinet radio frequency connector, is connected to survey Backboard is tried, sinusoidal and two kinds of clocks of LVCOMS are converted to by the clock conversion chip of backboard, on demand selection and measured number Plate is connected;Satellite-signal handles through RF processing unit and produces four road B3 frequency radiofrequency signals, inputs to the test back of the body in cabinet Plate, Gain tuning is carried out to it by gain control circuit on backboard, output access measurand letter stencil after processing;Set on testing backboard Communication conversion chip is put, RS232, RS422, LVTTL communication form are supported, for digiboard port to be led to outside cabinet Portion, connecting test computer.
Testing procedure is divided into,
(1), first tested anti-interference digital processing plate is fixed in cabinet on testing backboard by installing stud, according to quilt The power demands connection of digital processing plate is tried by the power input of test plate (panel) and testing backboard power output end, connection subject numeral Respective communications port on the communication serial port of process plate to testing backboard, testing backboard can support RS232 RS422 LVTTL it is various Level communication form;
(2), connection by the input end of clock of test plate (panel) and the output terminal of clock of testing backboard, testing backboard can provide 62M just String or LVCOMS LVTTL level clocks, connect each road BD2, B3 input, closed case;
(3), connection cabinet external radio frequency processing unit, power input, external clock and calculation machine;
(4), by observation state information, subject digital processing plate output signal, test anti-jamming effectiveness, pass through tester Data are verified by the monitoring communication serial port output of calculation machine, and can send control command, test response condition.
Having the technical effect that for invention, can fully meet the functional test to the anti-interference digital processing plate of each model and index Checking demand.The anti-interference digital processing board test platform has completed validation test at present, and index reaches military's requirement, can be complete Functional test and index verification demand of the full up foot to various anti-interference digital processing plate, to the B3 frequencies of the Big Dipper two of current main flow Anti-interference digital baseband plate, there is provided unified, complete test platform, be able to verify that its data transfer, self-test, channel status prison Depending on the various functions such as control command.
Brief description of the drawings
Fig. 1 is the operation principle block diagram of the present invention.
Fig. 2 is the testing backboard operation principle block diagram of the present invention.
Embodiment
As shown in Figure 1, 2, universal anti-interference digital processing board test platform, including cabinet, testing backboard, measuring and calculation Machine, RF processing unit, transformation input power and external clock, described testing backboard, including voltage conversion chip, clock electricity Flat conversion chip, gain control chip, signal conversion chip, several radio frequency connectors, several low-frequency connectors, each connector work( Energy port, communication serial port lead to cabinet panel, and circuit is connected as, and external power source enters cabinet inside by power connector, Powered for testing backboard, testing backboard is powered by voltage conversion chip for measurand letter stencil.External clock passes through cabinet Radio frequency connector accesses, and is connected to testing backboard, when being converted to two kinds of sinusoidal and LVCOMS by the clock conversion chip of backboard Clock, selection is pulled with measured number on demand is connected.Satellite-signal handles through RF processing unit and produces four road B3 frequency radio frequencies Signal, input to testing backboard in cabinet, Gain tuning is carried out to it by gain control circuit on backboard, access is exported after processing Measurand letter stencil.Communication conversion chip is set on testing backboard, supports RS232, RS422, LVTTL communication form, for by number Letter stencil port is led to outside cabinet, connecting test computer.
When testing anti-interference digital processing plate, first tested anti-interference digital processing plate is consolidated by installing stud It is scheduled in cabinet on testing backboard, is connected according to the power demands of subject digital processing plate by the power input of test plate (panel) and test Backboard power output end, connection are tested respective communications port on communication serial port to the testing backboard of digital processing plate, testing backboard Can support RS232 RS422 the various level communication forms of LVTTL.Connection by the input end of clock of test plate (panel) and testing backboard when Clock output end, testing backboard can provide that 62M is sinusoidal or LVCOMS LVTTL level clocks, connect each road BD2 B3 inputs, closing Cabinet.Finally connect cabinet external radio frequency processing unit, power input, external clock and calculation machine.Pass through observation state Information, subject digital processing plate output signal etc., test anti-jamming effectiveness, monitor that communication serial port exports by calculation machine, Data are verified, and control command can be sent, test response condition.

Claims (2)

1. a kind of universal anti-interference digital processing board test platform, including at cabinet, testing backboard, calculation machine, radio frequency Manage unit, transformation input power and external clock, it is characterised in that:Described testing backboard, including voltage conversion chip, clock Electrical level transferring chip, gain control chip, signal conversion chip, several radio frequency connectors, several low-frequency connectors, each connector Function port, communication serial port lead to cabinet panel;Circuit is connected as, and external power source is entered in cabinet by power connector Portion, powered for testing backboard, testing backboard is powered by voltage conversion chip for measurand letter stencil;External clock passes through Cabinet radio frequency connector is accessed, and is connected to testing backboard, and sinusoidal and LVCOMS two is converted to by the clock conversion chip of backboard Kind clock, on demand selection are connected with measurand letter stencil;Satellite-signal handles through RF processing unit and produces four road B3 frequencies Radiofrequency signal, input to testing backboard in cabinet, Gain tuning is carried out to it by gain control circuit on backboard, exported after processing Access measurand letter stencil;Communication conversion chip is set on testing backboard, RS232, RS422, LVTTL communication form is supported, is used for Digiboard port is led to outside cabinet, connecting test computer.
A kind of 2. method of testing of anti-interference digital processing plate, it is characterised in that:Testing procedure is divided into,
(1), first tested anti-interference digital processing plate is fixed in cabinet on testing backboard by installing stud, according to subject number The power demands connection of word processing plate is by the power input of test plate (panel) and testing backboard power output end, connection subject digital processing Respective communications port on the communication serial port of plate to testing backboard, testing backboard can support RS232 RS422 the various level of LVTTL Communication form;
(2), connection by the input end of clock of test plate (panel) and the output terminal of clock of testing backboard, testing backboard can provide 62M it is sinusoidal or LVCOMS LVTTL level clocks, connect each road BD2, B3 input, closed case;
(3), connection cabinet external radio frequency processing unit, power input, external clock and calculation machine;
(4), by observation state information, subject digital processing plate output signal, test anti-jamming effectiveness, pass through calculation machine Communication serial port output is monitored, data are verified, and control command can be sent, tests response condition.
CN201510872498.5A 2015-12-02 2015-12-02 Universal anti-interference digital processing board test platform and method of testing Active CN105353297B (en)

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CN105353297B true CN105353297B (en) 2018-03-16

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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1542937A (en) * 2003-11-07 2004-11-03 爱德万测试(苏州)有限公司上海分公 Method for testing RFID chip using digital signal and radiofrequency signal transmission/identification circuit
CN101363899A (en) * 2008-06-26 2009-02-11 复旦大学 Electronic label test system and test method thereof
CN101581758A (en) * 2008-05-14 2009-11-18 北京中电华大电子设计有限责任公司 Non-contact card chip WAFER-grade testing circuit
CN102495353A (en) * 2011-12-27 2012-06-13 重庆西南集成电路设计有限责任公司 Radio frequency integrated circuit test system and control method thereof
CN103675647A (en) * 2013-12-10 2014-03-26 中国船舶重工集团公司第七〇九研究所 Calibration device and method based on integrated circuit standard sample
CN104175313A (en) * 2013-05-27 2014-12-03 富泰华工业(深圳)有限公司 Circuit board test monitoring system and method
CN104198918A (en) * 2014-09-12 2014-12-10 张保宁 Testing system for small-lot production of high-speed and -precision ADC (analog to digital converter) chips
CN205301521U (en) * 2015-12-02 2016-06-08 天津七六四通信导航技术有限公司 Anti -interference digital process board test platform of general type

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9041421B2 (en) * 2011-06-13 2015-05-26 Mediatek Inc. IC, circuitry, and RF BIST system

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1542937A (en) * 2003-11-07 2004-11-03 爱德万测试(苏州)有限公司上海分公 Method for testing RFID chip using digital signal and radiofrequency signal transmission/identification circuit
CN101581758A (en) * 2008-05-14 2009-11-18 北京中电华大电子设计有限责任公司 Non-contact card chip WAFER-grade testing circuit
CN101363899A (en) * 2008-06-26 2009-02-11 复旦大学 Electronic label test system and test method thereof
CN102495353A (en) * 2011-12-27 2012-06-13 重庆西南集成电路设计有限责任公司 Radio frequency integrated circuit test system and control method thereof
CN104175313A (en) * 2013-05-27 2014-12-03 富泰华工业(深圳)有限公司 Circuit board test monitoring system and method
CN103675647A (en) * 2013-12-10 2014-03-26 中国船舶重工集团公司第七〇九研究所 Calibration device and method based on integrated circuit standard sample
CN104198918A (en) * 2014-09-12 2014-12-10 张保宁 Testing system for small-lot production of high-speed and -precision ADC (analog to digital converter) chips
CN205301521U (en) * 2015-12-02 2016-06-08 天津七六四通信导航技术有限公司 Anti -interference digital process board test platform of general type

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
数字电路板自动测试技术浅析;孙丽平 等;《科技传播》;20150331;第73-74页 *
通用数字电路板测试系统硬件设计;周博 等;《电子科技》;20120615;第25卷(第6期);第110-114页 *

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