CN105336848B - The forming method of MRAM device - Google Patents
The forming method of MRAM device Download PDFInfo
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- CN105336848B CN105336848B CN201410260635.5A CN201410260635A CN105336848B CN 105336848 B CN105336848 B CN 105336848B CN 201410260635 A CN201410260635 A CN 201410260635A CN 105336848 B CN105336848 B CN 105336848B
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- conductive material
- medium layer
- hole
- magnetic tunnel
- layer
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- 238000000034 method Methods 0.000 title claims abstract description 42
- 239000004020 conductor Substances 0.000 claims abstract description 49
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 238000005530 etching Methods 0.000 claims abstract description 13
- 239000004065 semiconductor Substances 0.000 claims abstract description 11
- JRBRVDCKNXZZGH-UHFFFAOYSA-N alumane;copper Chemical compound [AlH3].[Cu] JRBRVDCKNXZZGH-UHFFFAOYSA-N 0.000 claims description 21
- 239000000463 material Substances 0.000 claims description 18
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 15
- 229910052802 copper Inorganic materials 0.000 claims description 15
- 239000010949 copper Substances 0.000 claims description 15
- 239000004411 aluminium Substances 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 8
- 239000010432 diamond Substances 0.000 claims description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 238000006701 autoxidation reaction Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 92
- 239000011799 hole material Substances 0.000 description 31
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000005498 polishing Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 239000002002 slurry Substances 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 238000004380 ashing Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000002305 electric material Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
Landscapes
- Hall/Mr Elements (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Semiconductor Memories (AREA)
Abstract
The invention provides a kind of forming method of MRAM device.Including：Semiconductor substrate is provided；First medium layer is formed on the semiconductor substrate；The first medium layer is performed etching, forms through hole wherein；Conductive material is filled in the through hole, the conductive material also covers the first medium layer in the lump；The conductive material being covered on the first medium layer is removed using flatening process so that the conductive material in the through hole has the surface flushed with the first medium layer；Magnetic tunnel-junction is formed on conductive material in the through hole, the magnetic tunnel-junction electrically connects with the conductive material in the through hole；Wherein, selection of the flatening process to the conductive material and first medium layer is compared for 0.8 to 1.2.The present invention enables to MTJ layers to have flat surface, so as to eliminate the thus caused influence to MTJ performances.
Description
Technical field
The present invention relates to magnetic storage technology, more particularly to a kind of forming method of MRAM device.
Background technology
Magnetic RAM (MRAM) is one of current most promising three kinds of non-volatility memorizers, because its high speed
The features such as read-write, low-power consumption, long radioresistance and data retention over time, it is possible to substitute SRAM and DRAM in the future mobile whole
Application on end.Then there is the ground do not replaced for other fields high to reliability requirement, such as national defence, space flight and aviation etc.
Position.
MRAM device mainly carrys out data storage by magnetic tunnel-junction therein (MTJ).MTJ layers of the prior art are usual
It is formed on copper interconnection structure, after plating forms copper and carries out chemical machinery (CMP) polishing, due to CMP slurry
(slurry) in acidity and alkaline components can and copper react, and the grain boundary (grain boundary) of copper also compared with
Easily it is corroded, it is not flat to cause whole substrate surface, and then so that surface and the injustice of the MTJ layers being formed thereon
It is smooth.The rough surface of MTJ layers can influence its magnetic characteristic, such as can cause to produce undesirable coupling and tunnel between MTJ layers
Wear, so as to influence switching current.By upper, coarse surface can cause MTJ failure and uncertain behavior in MRAM device.
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of forming method of MRAM device, MTJ layers are enabled to have
Flat surface, so as to eliminate the thus caused influence to MTJ performances.
In order to solve the above technical problems, the invention provides a kind of forming method of MRAM device, including：
Semiconductor substrate is provided；
First medium layer is formed on the semiconductor substrate；
The first medium layer is performed etching, forms through hole wherein；
Conductive material is filled in the through hole, the conductive material also covers the first medium layer in the lump；
The conductive material being covered on the first medium layer is removed using flatening process so that leading in the through hole
Electric material has the surface flushed with the first medium layer；
Magnetic tunnel-junction is formed on conductive material in the through hole, the magnetic tunnel-junction and the conductive material in the through hole
Electrical connection；
Wherein, selection of the flatening process to the conductive material and first medium layer is compared for 0.8 to 1.2.
According to one embodiment of present invention, the conductive material is aluminium copper, and the material of the first medium layer selects
Autoxidation silicon, silicon nitride, black diamond or its any combination.
According to one embodiment of present invention, copper accounts for 0.4~0.6wt% in the aluminium copper, and remaining is aluminium.
According to one embodiment of present invention, copper accounts for 0.5wt% in the aluminium copper, and remaining is aluminium.
According to one embodiment of present invention, the pattern of the through hole is inverted trapezoidal.
According to one embodiment of present invention, the flatening process is chemically mechanical polishing.
According to one embodiment of present invention, magnetic tunnel-junction is formed on the conductive material in the through hole includes：
Magnetic tunnel junction layer is formed, the magnetic tunnel junction layer covers the conduction material in the first medium layer and the through hole
Material；
The magnetic tunnel junction layer is performed etching, to form multiple magnetic tunnel-junctions, each magnetic tunnel-junction respectively with below
Through hole in conductive material electrical connection.
According to one embodiment of present invention, methods described also includes：Form second dielectric layer, second dielectric layer covering
The surface of the magnetic tunnel-junction and the first medium layer.
Compared with prior art, the present invention has advantages below：
In the forming method of the MRAM device of the embodiment of the present invention, the conductive material and in through hole in first medium layer
Selection of one dielectric layer in flatening process is compared close to 1, preferably 0.8 to 1.2, therefore leading in through hole after planarization
Electric material can have the surface flushed very much with first medium layer so that be subsequently formed in first medium layer and conductive material
On MTJ layers also there is flat surface, a series of problems caused by so as to eliminate rough surface, be advantageous to improve switch electricity
Stream, reduce power consumption, improve speed and reliability.
Further, the material below MTJ is copper in the prior art, can be produced when being performed etching to MTJ layers a large amount of micro-
Grain, and the conductive material in the present embodiment is preferably aluminium copper, and caused particulate can be substantially reduced when etching MTJ layers,
The defects of being advantageous to avoid thereby resulting in.
Brief description of the drawings
Fig. 1 is the schematic flow sheet of the forming method of the MRAM device of the embodiment of the present invention；
Fig. 2 to Figure 12 be the MRAM device of the embodiment of the present invention forming method in device profile structure corresponding to each step
Schematic diagram.
Embodiment
With reference to specific embodiments and the drawings, the invention will be further described, but the guarantor of the present invention should not be limited with this
Protect scope.
With reference to figure 1, the forming method of the MRAM device of the present embodiment comprises the following steps：
Step S11, there is provided Semiconductor substrate；
Step S12, first medium layer is formed on the semiconductor substrate；
Step S13, the first medium layer is performed etching, forms through hole wherein；
Step S14, conductive material is filled in the through hole, the conductive material also covers the first medium layer in the lump；
Step S15, the conductive material being covered on the first medium layer is removed using flatening process so that described logical
Conductive material in hole has the surface flushed with the first medium layer；
Step S16, form magnetic tunnel-junction on the conductive material in the through hole, the magnetic tunnel-junction with the through hole
Conductive material electrically connects.
Wherein, selection of the flatening process to conductive material and first medium layer is compared for 0.8 to 1.2, preferably 1 or connects
Nearly 1.As a preferred embodiment, the conductive material can be aluminium copper (Al-Cu), and the material of first medium layer is selected from
Silica, silicon nitride, black diamond (BD, Black Diamond) or its any combination.More preferred, copper in aluminium copper
0.4~0.6wt% is accounted for, remaining is aluminium.Optimally, copper accounts for 0.5wt% in aluminium copper, and remaining is aluminium.
From the material such as aluminium copper and autoxidation silicon, silicon nitride, black diamond hardness (rigidity) quite, flat
There can be the selection ratio close to 1 during chemical industry skill so that the aluminium copper and first medium being located at after planarization in through hole
There is the surface flushed between layer.For example, the flatening process can be chemically mechanical polishing (CMP), can be by regulationization
Learn slurry (slurry) composition in mechanical polishing so that have between aluminium copper and first medium layer around it close to
1 selection ratio.
There is the surface flushed, it is ensured that be subsequently formed at this between aluminium copper and first medium layer in through hole
MTJ layers on first medium layer and aluminium copper have flat surface, so as to improve MTJ switching current, reduce work(
Consumption, improve reliability.In addition, when etching MTJ layers formation MTJ, compared with the copper in traditional handicraft, etching produces aluminium copper
Particulate will be less, this is also beneficial to improve device performance.
The forming method of the MRAM device is described in detail with reference to Fig. 2 to Figure 12.
With reference to figure 2, there is provided Semiconductor substrate.The Semiconductor substrate can include substrate 100 and medium disposed thereon
Layer 101.Wherein, the substrate 100 for example can be silicon substrate, wherein could be formed with MOS transistor etc..The dielectric layer 101
Material is such as can be silica, low-k (k), wherein could be formed with interconnection structure 12.For example, can be in base
Deposition forms dielectric layer 101 on 100, and etching forms through hole on dielectric layer 101 afterwards, fills metal material (example in through-holes
Such as copper), the metal material in dielectric layer 101 and through hole is chemically-mechanicapolish polished afterwards, it is flat so as to obtain surface
Interconnection structure 12 in dielectric layer 101 and through hole.
With reference to figure 3, form first medium layer 13 on a semiconductor substrate, the blanket dielectric layer 101 of first medium layer 13 with
And the upper surface of interconnection structure 12.As a preferred embodiment, the material of the first medium layer 13 is selected from silica, nitridation
Silicon, black diamond or its any combination.The forming method of first medium layer 13 for example can be chemical vapor deposition (CVD).
With reference to figure 4, mask layer 131 is formed on first medium layer 13 and it is patterned.Mask layer 131 for example may be used
To be photoresist, it is patterned by the photoetching process of routine.
With reference to figure 5, it is mask with the mask layer 131 after graphical, first medium layer 13 is performed etching, in first medium
One or more through holes 132 are formed in layer 13.As a nonrestrictive example, the bottom-exposed of the through hole 132 goes out interconnection
Structure 12.The lithographic method of through hole 132 for example can be dry etching.The pattern of through hole 132 is preferably inverted trapezoidal, that is, its
Tilted between side wall and bottom, the pattern of inverted trapezoidal allows the aluminium copper in subsequent process steps more easily to fill
In through hole 132.
With reference to figure 6, will it is graphical after mask layer 131 (see Fig. 5) remove, expose the surface of first medium layer 13,
After removing mask layer 131, the surface of first medium layer 13 can be cleaned.For example, the material of mask layer 131 is photoetching
Glue, it can be ashing (ashing) that it, which removes technique,.
With reference to figure 7, the filling conductive material 14 in through hole 132 (see Fig. 6), the conductive material 14 is preferably aluminium copper.
It is further preferred that copper accounts for 0.4~0.6wt% in the aluminium copper, remaining is aluminium.Optimally, copper accounts in the aluminium copper
0.5wt%, remaining is aluminium.The surface of the also all or part of covering first medium layer 14 of conductive material 14.
With reference to figure 8, conductive material 14 is planarized so that the conductive material 14 in through hole has with first medium layer 13
There is the surface flushed.It should be noted that the surface element of first medium layer 13 may be removed during flatening process in the lump
Point.
The flatening process is preferably to chemically-mechanicapolish polish, but is not limited to this.Conductive material 14 and first medium layer 13
Hardness it is suitable, in chemically mechanical polishing, can by adjust slurry composition chemically-mechanicapolish polish to conductive material
14 and the selection of first medium layer 13 compare close in the range of 1, preferably 0.8 to 1.2 so that the conductive material 14 after polishing
There is relatively flat surface with first medium layer 13.
It should be noted that, although conductive material 14 is aluminium copper in the present embodiment, the material of first medium layer 13 selects
Autoxidation silicon, silicon nitride, black diamond or its any combination, but this is only preferable material.It will be appreciated by those skilled in the art that
It is also an option that other appropriate materials, as long as meeting selection ratio of the flatening process to conductive material 14 and first medium layer 13
Fall into the range of 0.8 to 1.2.
With reference to figure 9, magnetic tunnel junction layer 15, the magnetic tunnel junction layer 15 covering first medium layer 13 and conductive material 14 are formed
Upper surface.Magnetic tunnel junction layer 15 is laminated construction, including at least lower electrode layer, magnetic channel layer and upper electrode layer, wherein magnetic tunnel
Channel layer is arranged between lower electrode layer and upper electrode layer.
With reference to figure 10, mask layer 151 is formed on magnetic tunnel junction layer 15 and it is patterned.The mask layer 151
Material is preferably hard mask material.
With reference to figure 11, with the mask layer 151 (see Figure 10) after graphical for mask, magnetic tunnel junction layer 15 is entered (see Figure 10)
Row etching, so as to form one or more magnetic tunnel-junctions 152, each of which magnetic tunnel-junction 152 is respectively in through hole below
Conductive material 14 electrically connects.
With reference to figure 12, second dielectric layer 16, the second dielectric layer 16 covering magnetic tunnel-junction 152 and first medium layer are formed
Upper surface.The material of the second dielectric layer 16 can be the material of conventional interlayer dielectric layer, such as various low-k materials.
After second dielectric layer 16 is formed, through hole can be formed in second dielectric layer 16 and forms mutually link wherein
The upper electrode layer electrical connection of structure, the interconnection structure and magnetic tunnel-junction 152.
The technical scheme of the present embodiment is particularly suitable for use in 65nm techniques or more advanced technology.
Although the present invention is disclosed as above with preferred embodiment, it is not for limiting the present invention, any this area skill
Art personnel without departing from the spirit and scope of the present invention, can make possible variation and modification, therefore the guarantor of the present invention
Shield scope should be defined by the scope that the claims in the present invention are defined.
Claims (8)
- A kind of 1. forming method of MRAM device, it is characterised in that including：Semiconductor substrate is provided；First medium layer is formed on the semiconductor substrate；The first medium layer is performed etching, forms through hole wherein；Conductive material is filled in the through hole, the conductive material also covers the first medium layer, the conductive material in the lump For aluminium copper；The conductive material being covered on the first medium layer is removed using flatening process so that the conduction material in the through hole Expect that there is the surface flushed with the first medium layer；Magnetic tunnel-junction is formed on conductive material in the through hole, the magnetic tunnel-junction is electrically connected with the conductive material in the through hole Connect；Wherein, selection of the flatening process to the conductive material and first medium layer is compared for 0.8 to 1.2.
- 2. the forming method of MRAM device according to claim 1, it is characterised in that the material choosing of the first medium layer Autoxidation silicon, silicon nitride, black diamond or its any combination.
- 3. the forming method of MRAM device according to claim 1, it is characterised in that copper accounts for 0.4 in the aluminium copper ~0.6wt%, remaining is aluminium.
- 4. the forming method of MRAM device according to claim 1, it is characterised in that copper accounts in the aluminium copper 0.5wt%, remaining is aluminium.
- 5. the forming method of MRAM device according to claim 2, it is characterised in that the pattern of the through hole is terraced to fall Shape.
- 6. the forming method of MRAM device according to claim 1, it is characterised in that the flatening process is chemical machine Tool polishes.
- 7. the forming method of MRAM device according to claim 1, it is characterised in that the conductive material in the through hole Upper formation magnetic tunnel-junction includes：Magnetic tunnel junction layer is formed, the magnetic tunnel junction layer covers the conductive material in the first medium layer and the through hole；The magnetic tunnel junction layer is performed etching, to form multiple magnetic tunnel-junctions, each magnetic tunnel-junction is logical with below respectively Conductive material electrical connection in hole.
- 8. the forming method of MRAM device according to claim 1, it is characterised in that methods described also includes：Form the Second medium layer, the second dielectric layer cover the surface of the magnetic tunnel-junction and the first medium layer.
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| CN201410260635.5A CN105336848B (en) | 2014-06-12 | 2014-06-12 | The forming method of MRAM device |
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| CN201410260635.5A CN105336848B (en) | 2014-06-12 | 2014-06-12 | The forming method of MRAM device |
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| CN105336848A CN105336848A (en) | 2016-02-17 |
| CN105336848B true CN105336848B (en) | 2018-01-09 |
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| CN109087993A (en) * | 2017-06-13 | 2018-12-25 | 上海磁宇信息科技有限公司 | A method of making magnetic RAM top electrode hole |
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