CN105322786A - DC-DC converter - Google Patents
DC-DC converter Download PDFInfo
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- CN105322786A CN105322786A CN201410317227.9A CN201410317227A CN105322786A CN 105322786 A CN105322786 A CN 105322786A CN 201410317227 A CN201410317227 A CN 201410317227A CN 105322786 A CN105322786 A CN 105322786A
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Abstract
The invention discloses a DC-DC converter which comprises an output circuit, a voltage division circuit, a feedback control circuit and an input voltage selection circuit. The input voltage selection circuit comprises a third power switch, a fourth power switch, a voltage comparator and a logic circuit. A first power supply is connected to the output circuit through the third power switch; a second power supply is connected to the output circuit through the fourth power switch; and the voltage comparator is used for comparing the voltage of the first power supply and the voltage of the second power supply, when the voltage of the first power supply is higher than the voltage of the second power supply, outputting a control signal to the logic circuit to enable the logic circuit to control the third power switch to be connected and the fourth power switch to be disconnected, and when the voltage of the second power supply is higher than the voltage of the first power supply, outputting the control signal to the logic circuit to enable the logic circuit to control the fourth power switch to be connected and the third power switch to be disconnected. Therefore, switching of a plurality of input power supplies is realized.
Description
[technical field]
The present invention relates to Power convert field, particularly relate to a kind of DC-to-DC converter.
[background technology]
DC/DC (DC-to-DC) transducer is a kind of common, widely used electric power management circuit.Current electronic product, all have employed this dc-dc in such as notebook, mobile phone, MP3.DC/DC (DC-to-DC) transducer normally converts a kind of input voltage to another kind of output voltage.But in a lot of situation, can there is multi input voltage, such as the voltage etc. of lithium battery voltage, charging adapter, all designs a independent dc-dc for often kind of input voltage in the prior art sometimes, and such design cost is very high.
In addition, in some applications, in such as notebook, if there is adapter to insert, so preferentially should use the input voltage of adapter, if there is not adapter to insert, just bring into use the input voltage that lithium battery provides.But the control circuit needing design to be responsible for realize this object in prior art controls.
In addition, dc-dc of the prior art also exists along with variations in temperature, and the problem causing output voltage to change.Meanwhile, dc-dc power consumption of the prior art is also higher, also needs to reduce its static or dynamic power consumption further.
For this reason, be necessary to provide a kind of new technical scheme to solve the problems referred to above.
[summary of the invention]
The object of the present invention is to provide a kind of DC-to-DC converter, it can carry out switching power supply in order between multiple input power.
In order to reach object of the present invention, the present invention proposes a kind of DC-to-DC converter, and it comprises output circuit, bleeder circuit, feedback control circuit, input voltage selection circuit.Described output circuit comprises the first power switch, the second power switch, inductance and electric capacity, a link of the first power switch is connected with the first link of described inductance, first link of described inductance is by the second power switch ground connection, second link of described inductance is by described capacity earth, second link of described inductance is as the output of described output circuit, and the voltage that described bleeder circuit is sampled on the output of described output circuit generates feedback voltage, described feedback control circuit generates the first control signal and the second control signal based on described feedback voltage, and utilize the first control signal to control conducting or the shutoff of the first power switch, the second control signal is utilized to control conducting or the shutoff of the second power switch, described input voltage selection circuit comprises the 3rd power switch, 4th power switch, voltage comparator, logical circuit, first link of the 3rd power switch connects the first power supply, second link connects another link of the first power switch, first link of the 4th power switch connects second source, second link connects another link of the first power switch, described voltage comparator is for the size of the voltage of the voltage and second source that compare the first power supply, when voltage higher than second source of the voltage of the first voltage source, export control signal to described logical circuit, described logical circuit is made to control the 3rd power switch conducting, 4th power switch cut-off, when voltage higher than the first power supply of the voltage of second source, export control signal to described logical circuit, now described logical circuit controls the 4th power switch conducting, 3rd power switch cut-off.
Further, first power switch, 3rd power switch and the 4th power switch are PMOS transistor, second power switch is nmos pass transistor, the source class of the 3rd power switch is connected with the first power supply, the drain electrode of the 3rd power switch is connected with the source class of the first power switch, the grid of the 3rd power switch is connected with an output of logical circuit, the source class of the 4th power switch is connected with second source, the drain electrode of the 4th power switch is connected with the source class of the first power switch, the grid of the 4th power switch is connected with another output of logical circuit, an input of described voltage comparator is connected with the first power supply, another input is connected with second source.
Further, described bleeder circuit comprises the resistance R11 between output and ground and resistance R12 that are series at described output circuit, and the node voltage between two resistance is described feedback voltage.
Further, described feedback control circuit comprises pedestal generator, error amplifier, low-power consumption oscillator, PWM generator and logic drive circuit, described pedestal generator generates reference voltage, and described error amplifier forms error amplification signal for the difference of amplifying reference voltage and described feedback voltage; Low-power consumption oscillator is for generating triangular wave oscillation signal; Described PWM generator generates pwm control signal based on triangular wave oscillation signal and described error amplification signal; Described logic drive circuit controls conducting or the shutoff of the first power switch and the second power switch based on described pwm control signal.
Further, an input of described error amplifier receives described reference voltage, another input receives described feedback voltage, an input of described PWM generator receives error amplification signal, another input receives triangular wave oscillation signal, logic drive circuit receives pwm control signal, and an one output is connected with the control end of the first power switch, and another output is connected with the control end of the second power switch.
Further, described pedestal generator comprises the first bipolar transistor, the second bipolar transistor, the first resistance, the second resistance, the 3rd resistance and the 4th resistance, the base stage of the first bipolar transistor and grounded collector, its emitter-base bandgap grading is connected to ground via the first resistance; The base stage of the second bipolar transistor and grounded collector, its emitter-base bandgap grading is connected to one end of the 3rd resistance, and the other end of the 3rd resistance is connected to ground via the second resistance; One end of 4th resistance is connected to ground, the electric current be directly proportional to the hybrid current of the electric current of the electric current and the second resistance that flow through the 3rd resistance is utilized to flow through the 4th resistance, thus obtain reference voltage at the other end of the 4th resistance, wherein the 4th resistance comprises basic resistance unit and multiple adjustable resistance unit, the switch in parallel that each adjustable resistance unit is corresponding with one, adjusts the resistance of the 4th resistance by the conducting and cut-off controlling each switch.
Further, first bipolar transistor is a benchmark bipolar transistor, second bipolar transistor comprises the benchmark bipolar transistor of multiple parallel connection, described pedestal generator also includes the first PMOS transistor, second PMOS transistor, 3rd PMOS transistor and operational amplifier, the source electrode of each PMOS transistor connects power supply, grid is connected to each other, the drain electrode of the first PMOS transistor connects the emitter-base bandgap grading of the first bipolar transistor, the drain electrode of the second PMOS transistor connects one end be connected with the second resistance of the 3rd resistance, the drain electrode of the 3rd PMOS transistor is connected with the 4th resistance, the voltage of the drain electrode of the 3rd PMOS transistor and the intermediate node of the 4th resistance is described reference voltage, the negative-phase input of described operational amplifier connects the drain electrode of the first PMOS transistor, normal phase input end connects the drain electrode of the second PMOS transistor, it exports the grid of termination the 3rd PMOS transistor.
Further, pedestal generator comprises: the digital temperature sensor of induction Current Temperatures; Temperature corrected data is obtained with according to Current Temperatures, and according to described temperature corrected data being controlled the temperature compensation module of each switch.
Compared with prior art, DC/DC transducer of the present invention can select the carrying out that in multiple input power, voltage is higher to power automatically, thus meets system power supply needs.
[accompanying drawing explanation]
In conjunction with reference accompanying drawing and ensuing detailed description, the present invention will be easier to understand, the structure member that wherein same Reference numeral is corresponding same, wherein:
Fig. 1 is the circuit diagram of the DC/DC transducer in the present invention;
Fig. 2 is the circuit diagram of reference voltage generating unit;
Fig. 3 is the structural representation of the programmable resistance of reference voltage generating unit in Fig. 2;
Fig. 4 is the low-power consumption oscillator structural representation in a first embodiment in the present invention;
Fig. 5 is the equivalent circuit diagram of the second field effect transistor M P2 of low-power consumption oscillator in Fig. 4;
Fig. 6 is the equivalent circuit diagram of the first field effect transistor M P1 of low-power consumption oscillator in Fig. 4;
Fig. 7 is the signal schematic representation of the oscillator signal RAMP of low-power consumption oscillator in Fig. 4.
[embodiment]
Alleged herein " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention.Different local in this manual " in one embodiment " occurred not all refers to same embodiment, neither be independent or optionally mutually exclusive with other embodiments embodiment.In addition, represent sequence of modules in the method for one or more embodiment, flow chart or functional block diagram and revocablely refer to any particular order, not also being construed as limiting the invention.
The invention provides a kind of DC-to-DC converter, it can switch between two input powers, and control switching circuit realizes simple.
As shown in Figure 1, described DC-to-DC converter 100 comprises output circuit 110, bleeder circuit 120, feedback control circuit 130 and input voltage selection circuit 140.
Described output circuit 110 comprises the first power switch MP11, the second power switch MN12, inductance L 11 and electric capacity C11, a link of the first power switch MP11 is connected with the first link of described inductance L 11, first link of described inductance L 11 is by the second power switch MN12 ground connection, second link of described inductance L 11 is by described electric capacity C11 ground connection, and the second link of described inductance is as the output VO of described output circuit.The voltage that described bleeder circuit 120 is sampled on the output of described output circuit generates feedback voltage V FB.Described feedback control circuit 130 generates the first control signal and the second control signal based on described feedback voltage V FB, and utilize the first control signal to control conducting or the shutoff of the first power switch MP11, utilize the second control signal to control conducting or the shutoff of the second power switch MN12.
Described input voltage selection circuit 140 comprises the 3rd power switch MP13, the 4th power switch MP14, voltage comparator 142, logical circuit 141.First link of the 3rd power switch MP13 connects the first power supply Vin1, second link connects another link of the first power switch MP11, first link of the 4th power switch MP14 connects second source Vin2, and the second link connects another link of the first power switch MP11.Described voltage comparator 142 is for the size of the voltage of the voltage and second source Vin2 that compare the first power supply Vin1, when voltage higher than second source of the voltage of the first voltage source, export control signal to described logical circuit 141, described logical circuit 141 is made to control the 3rd power switch MP13 conducting, 4th power switch cut-off MP14, when voltage higher than the first power supply of the voltage of second source, export control signal to described logical circuit 141, now described logical circuit 141 controls the 4th power switch MP14 conducting, and the 3rd power switch MP13 ends.
In the embodiment shown in fig. 1, first power switch MP11, the 3rd power switch MP13 and the 4th power switch MP14 are PMOS (P-ChannelmetalOxide) transistor, and the second power switch is NMOS (N-ChannelmetalOxide) transistor.The source class of the 3rd power switch MP13 is connected with the first power supply, the drain electrode of the 3rd power switch MP13 is connected with the source class of the first power switch MP11, the grid of the 3rd power switch MP13 is connected with an output of logical circuit 141, the source class of the 4th power switch MP14 is connected with second source, the drain electrode of the 4th power switch MP14 is connected with the source class of the first power switch MP11, and the grid of the 4th power switch MP14 is connected with another output of logical circuit 141.An input of described voltage comparator 142 is connected with the first power supply Vin1, and another input is connected with second source Vin2.
In one embodiment, described logical circuit comprises an inverter and a buffer, the output signal of described voltage comparator circuit 142 exports described 3rd power switch MP13 to after buffer, and the output signal of described voltage comparator circuit 142 exports described 4th power switch MP14 to after inverter.
As shown in Figure 1, described bleeder circuit 120 comprises the resistance R11 between output and ground and resistance R12 that are series at described output circuit, and the node voltage between two resistance is described feedback voltage.
Described feedback control circuit 130 comprises pedestal generator 131, error amplifier 132, low-power consumption oscillator 133, PWM (pulse-width modulation) generator 134 and logic drive circuit 135.Described pedestal generator 131 generates reference voltage.Described error amplifier 132 forms error amplification signal EAO for the difference of amplifying reference voltage and described feedback voltage V FB.Low-power consumption oscillator 133 is for generating triangular wave oscillation signal RAMP.Described PWM generator 134 generates pwm control signal based on triangular wave oscillation signal and described error amplification signal.Described logic drive circuit 135 controls conducting or the shutoff of the first power switch MP11 and the second power switch MN12 based on described pwm control signal.
An input of described error amplifier 132 receives described reference voltage, and another input receives described feedback voltage, and an input of described PWM generator 134 receives error amplification signal, and another input receives triangular wave oscillation signal.Described logic drive circuit 135 receives pwm control signal, and an one output is connected with the control end of the first power switch MP11, and another output is connected with the control end of the second power switch MP12.
In sum, the combination based on described voltage comparator and the 3rd power switch, the 4th power switch can realize the automatic switchover of the first power supply and second source, and they share same dc-dc critical piece, reduce cost.In one application, adapter is as second source, lithium battery is as the first power supply, the voltage of adapter is higher than the voltage of lithium battery, and after having adapter to insert, logical circuit 141 controls the 3rd power switch MP13 to be ended, 4th power switch MP14 conducting, after adapter is extracted, logical circuit 141 controls the 3rd power switch MP13 conducting, and the 4th power switch MP14 ends.
In a preferred embodiment, described pedestal generator 131 can provide high-precision and vary with temperature minimum reference voltage.Described pedestal generator 131 comprises digital temperature sensor, temperature compensation module and reference voltage generating unit 200.Described digital temperature sensor responds to the Current Temperatures of described reference voltage generating unit 200, and Current Temperatures is supplied to described temperature compensation module.Described temperature compensation module obtains temperature corrected data according to Current Temperatures, and described temperature corrected data is supplied to described reference voltage generating unit 200.Described reference voltage generating unit 200 carries out temperature correction according to described temperature corrected data to the reference voltage exported.
Fig. 2 is the circuit diagram of reference voltage generating unit 200.Refer to shown in Fig. 2, described reference voltage generating unit 200 comprises bipolar transistor Q1 (PNP), bipolar transistor Q2 (PNP), resistance R21, R22 and R23.
The base stage of bipolar transistor Q1 and grounded collector, emitter-base bandgap grading is connected to ground via resistance R21, the base stage of bipolar transistor Q2 and grounded collector, and emitter-base bandgap grading is connected to one end of resistance R23, and the other end of resistance R23 is connected to ground via resistance R22.If bipolar transistor Q1 to be considered as a benchmark bipolar transistor, so bipolar transistor Q2 then comprise multiple parallel connection benchmark bipolar transistor (namely base stage be connected, emitter-base bandgap grading is connected, collector electrode is connected), bipolar transistor Q1 and Q2 can be made so better to be mated, and described bipolar transistor Q2 comprises 8 benchmark bipolar transistors in parallel in one example.
When described reference voltage generating unit 200 is in stable state, the voltage of the emitter-base bandgap grading of described transistor Q1 and the equal with the voltage of one end that resistance R2 connects of described resistance R3, following formula can be obtained like this: VBE1=VBE2+IPTAT*R3, wherein VBE1 is the conduction voltage drop of transistor Q1, VBE2 is the conduction voltage drop of transistor Q2, and IPTAT is the electric current that resistance R3 flows through.
Carry out fortran to above formula to obtain: IPTAT=(VBE1-VBE2)/R3=Δ VBE/R3, Δ VBE is the voltage of positive temperature coefficient, and therefore IPTAT is the electric current of positive temperature coefficient.
In addition, the electric current I CTAT flowing through resistance R2 is: ICTAT=VBE1/R2, VBE1 are the voltage of negative temperature coefficient, and therefore ICTAT is the electric current of negative temperature coefficient.The hybrid current of ICTAT and IPTAT can be made to be approximate zero temperature coefficient by the size of adjusting resistance R2 and R3, namely not change the size of electric current along with the change of temperature, or change very little.
Described reference voltage generating unit 200 also includes programmable resistance R24, utilize the electric current of approximate zero temperature coefficient to flow through band gap voltage VBG that described programmable resistance R24 can obtain approximate zero temperature coefficient.Described resistance R21, R22, R23 and R24 are the resistance matched each other, and can reduce the impact of the temperature coefficient of resistance like this, also can reduce the relative error that each resistance causes due to technique.
Described reference voltage generating unit 200 also includes PMOS (P-typeComplementaryMetalOxideSemiconductor) transistor MP21, MP22 and MP23, and operational amplifier OP.The source electrode of each PMOS transistor MP21, MP22 and MP23 meets power vd D, and grid is connected to each other.The drain electrode of PMOS transistor MP21 connects the emitter-base bandgap grading of described transistor Q1, the drain electrode of described PMOS transistor MP2 connects one end be connected with resistance R22 of described resistance R23, the drain electrode of described PMOS transistor MP23 is connected to the ground via described resistance R24, and the voltage of the drain electrode of described PMOS transistor MP23 and the intermediate node of described resistance R24 is described band gap voltage VBG (also can claim output voltage, reference voltage, bandgap voltage reference).The negative-phase input of described operational amplifier OP connects the drain electrode of PMOS transistor MP21, and normal phase input end connects the drain electrode of PMOS transistor MP22, and it exports the grid of termination PMOS transistor MP23.Described operational amplifier makes the voltage of two input equal by the grid voltage controlling PMOS transistor MP21 and MP22, namely make that the voltage of the emitter-base bandgap grading of described transistor Q1 and described resistance R23's is equal with the voltage of one end that resistance R22 connects, the electric current that described like this PMOS transistor MP22 flows through is exactly the hybrid current of ICTAT and IPTAT of approximate zero temperature coefficient.
PMOS transistor MP21, MP22 and MP23 form current mirror, the electric current that PMOS transistor MP23 flows through is directly proportional to the electric current that PMOS transistor MP22 flows through, the electric current that such PMOS transistor MP23 flows through is also the electric current of approximate zero temperature coefficient, and the electric current I CONST of approximate zero temperature coefficient flows through the band gap voltage VBG that described resistance R24 can obtain approximate zero temperature coefficient.In one embodiment, the ratio of the breadth length ratio of PMOS transistor PM21, PM22 and PM23 is 1: 1: 1, and the electric current flowing through each PMOS transistor is like this equal.
Owing to have employed the mode of electric current coating-forming voltage on resistance of approximate zero temperature coefficient, band gap voltage VBG is made to be less than 1V.
Described reference voltage generating unit 200 adjusts described programmable resistance R24 according to described temperature corrected data, and then carries out temperature correction to the reference voltage that it exports, and makes the reference voltage variation with temperature of output very little.
Fig. 3 is the structural representation of the programmable resistance R4 of reference voltage generating unit in Fig. 2.As shown in Figure 3, described programmable resistance R24 comprise basic resistance unit R 400 and n adjustable resistance unit R40, R41, R42 ..., R4n.Each adjustable resistance unit and corresponding switch S 0, S1, S2 ..., Sn is in parallel, the control end of each switch by described temperature corrected data D0, D1, D2 ..., Dn control.Just can be adjusted the resistance of programmable resistance R4 by the conducting and cut-off controlling each switch, thus change reference voltage V BG.
In a preferred embodiment, Fig. 4 is the low-power consumption oscillator structural representation in one embodiment in the present invention.As shown in Figure 4, described oscillator comprises electric capacity C1, the first field effect transistor M P1, the second field effect transistor M P2, the 3rd field effect transistor M P3, the 4th field effect transistor M P4, inverter INV1.
One end of described electric capacity C1 is connected with the first power end, and the other end is connected with the lining body of the second field effect transistor M P2 as signal oscillating end RAMP, and grid, the drain electrode of the second field effect transistor M P2 are connected with second source end with source electrode.The source electrode of the first field effect transistor M P1 is connected with the first power end with lining body, and its drain electrode is connected with signal oscillating end RAMP.The source electrode of the 4th field effect transistor M P4 is connected with the first power end with lining body, grid is connected with signal oscillating end RAMP, drain electrode is connected with the lining body of the 3rd field effect transistor M P3 with the input of inverter INV1, grid, the drain electrode of the 3rd field effect transistor M P3 are connected with second source end with source electrode, and the output of inverter INV1 is connected with the grid of the first field effect transistor M P1.
In this first embodiment, first, second, third and fourth field-effect transistor is PMOS (P-channelMetalOxideSemiconductor) field-effect transistor, described first power end is Input voltage terminal VIN, described second source end is earth terminal GND, and second is connected second source end GND with the substrate of the 3rd pmos fet.
Fig. 5 is the equivalent circuit diagram of the second field effect transistor M P2 of low-power consumption oscillator in Fig. 1.As shown in Figure 5, parasitic diode D1 is there is between the lining body B of field effect transistor M P2 and its source S, there is parasitic diode D2 between the lining body B of field effect transistor M P2 and its drain D, between the lining body B of field effect transistor M P2 and the substrate of P type, also there is parasitic diode D3.Parasitic diode D1 and D2 is made up of the P-N junction between P+ (forming source electrode and drain electrode) and N trap (formed and serve as a contrast body), and parasitic diode D3 is made up of the P-N junction between N trap and the substrate of P type.The electric leakage of general parasitic diode is directly proportional to its P-N junction area, and the area of P-N junction is larger, leaks electricity larger.The electric leakage of usual diode D3 is greater than the area of diode D1 and D2.When drain electrode, source electrode, the substrate of P type all ground connection time, the lining body end B leakage current relatively of field effect transistor M P2 is made up of diode D1, D2, D3 sum.
Fig. 6 is the equivalent circuit diagram of the first field effect transistor M P1 of low-power consumption oscillator in Fig. 4.When the gate source voltage of field-effect transistor MP1 is zero, when namely MP1 is turned off, be only connected to parasitic diode D4 between the drain electrode of field effect transistor M P1 and lining body and there is leakage current, parasitic diode D4 is equivalent to the D2 in Fig. 2.
As the above analysis, if the area equation of field effect transistor M P1 and MP2, then the electric leakage of MP2 is necessarily greater than the electric leakage of MP1, can form the comparatively reliable charging current to electric capacity C1 like this.In order to further conservative design, consider process deviation, the area reducing field effect transistor M P1 parasitic diode D4 can also be designed, increase the area of field effect transistor M P2 parasitic diode D1, D2, D3, thus ensure reliable charging current, such as reduce the channel width of MP1, increase the channel width of MP2.Can find out in the present invention, the leakage current of MP2 is greater than the leakage current of MP1 when turning off, and provides stable controllable charging current can to like this electric capacity C1.
In addition, in this embodiment, the drain conditions (situation of parasitic diode) of field effect transistor M P3 and the identical of MP2, the drain conditions of field effect transistor M P4 and the identical of MP1, here just not in repeated description.What the leakage current of MP3 was designed is greater than the leakage current of MP4 when turning off, like this can when MP4 closes, the voltage of pulling down node NA, thus can turn off transistor MP1 normally.
In oscillator in the diagram, inverter INV1 forms necessary delay circuit, field effect transistor M P3 and MP4 forms comparison circuit, and field effect transistor M P1 is charge and discharge switch, and the leakage current of field effect transistor M P2 is supplied to the charging current of described electric capacity C1 charging.The operation principle of the oscillator in Fig. 1 is described below, when field-effect transistor MP1 closes, because the electric leakage of MP2 is greater than MP1, causes RAMP node voltage to decline, namely electric capacity C1 is charged.When being reduced to VIN-|Vth| under RAMP node voltage, (wherein VIN is the magnitude of voltage of the first power end VIN, Vth is the threshold voltage of field effect transistor M P4, because the threshold voltage of PMOS is generally negative value, so add absolute value) time, MP4 conducting, node NA voltage becomes high level, after inverter INV1, node NB voltage is low level, make transistor MP1 conducting, electric capacity C1 is discharged, RAMP voltage is pulled up to the voltage VIN of the first power end, NA becomes low level afterwards, NB becomes high level, MP1 is turned off, then electric capacity C1 is charged again by the leakage current of MP2, go round and begin again like this, oscillator vibrates gets up, Fig. 7 illustrates the vibration schematic diagram of the oscillator signal RAMP of the low-power consumption oscillator in Fig. 1.
In the preferred embodiment, utilize the electric leakage of MP2 to form charging current, but due to leakage current very little, be usually difficult to control, such as also there is electric leakage in MP1.If the electric leakage of MP1 is greater than the electric leakage of MP2, then cannot form required charging current, then oscillator will lose efficacy (cannot vibrate).Key of the present invention is the principle utilizing the element leakage of identical type similar, and ensures enough charging currents from project organization, avoids because process deviation causes oscillator Problem of Failure.In the present invention, electric capacity C1 can adopt and variously do dielectric electric capacity with insulating barrier, such as polysilicon-polysilicon silicon electric capacity (PIP:Poly-Interpoly-Poly), MOS (MetalOxideSemiconductor) electric capacity, MIM (Metal-Isulator-Metal) electric capacity, MOM (Metal-Oxide-Metal) electric capacity etc., but p-n junction electric capacity can not be used, because the electric leakage that p-n junction electric capacity exists may cause consistency controlling.MP1 and MP2 is made up of the transistor of same type, can ensure that its leakage current characteristic is similar like this, thus ensures that leakage current is at controlled range, and can not cause the problem that cannot realize of vibrating.
Low-power consumption oscillator in Fig. 4, its quiescent dissipation produces primarily of the leakage current of MP2 and MP3, and each electric leakage branch current can be designed into 1nA or following, so can be easy to design the low-power consumption oscillator of total power consumption lower than 5nA.
The power consumption of dc-dc can be reduced like this.
" some " herein represent two or more.Above-mentioned explanation fully discloses the specific embodiment of the present invention.It is pointed out that the scope be familiar with person skilled in art and any change that the specific embodiment of the present invention is done all do not departed to claims of the present invention.Correspondingly, the scope of claim of the present invention is also not limited only to described embodiment.
Claims (8)
1. a DC-to-DC converter, it comprises output circuit, bleeder circuit, feedback control circuit, input voltage selection circuit,
Described output circuit comprises the first power switch, the second power switch, inductance and electric capacity, a link of the first power switch is connected with the first link of described inductance, first link of described inductance is by the second power switch ground connection, second link of described inductance is by described capacity earth, second link of described inductance is as the output of described output circuit
The voltage that described bleeder circuit is sampled on the output of described output circuit generates feedback voltage;
Described feedback control circuit generates the first control signal and the second control signal based on described feedback voltage, and utilizes the first control signal to control conducting or the shutoff of the first power switch, utilizes the second control signal to control conducting or the shutoff of the second power switch,
Described input voltage selection circuit comprises the 3rd power switch, 4th power switch, voltage comparator, logical circuit, first link of the 3rd power switch connects the first power supply, second link connects another link of the first power switch, first link of the 4th power switch connects second source, second link connects another link of the first power switch, described voltage comparator is for the size of the voltage of the voltage and second source that compare the first power supply, when voltage higher than second source of the voltage of the first voltage source, export control signal to described logical circuit, described logical circuit is made to control the 3rd power switch conducting, 4th power switch cut-off, when voltage higher than the first power supply of the voltage of second source, export control signal to described logical circuit, now described logical circuit controls the 4th power switch conducting, 3rd power switch cut-off.
2. DC-to-DC converter according to claim 1, is characterized in that,
First power switch, the 3rd power switch and the 4th power switch are PMOS transistor, and the second power switch is nmos pass transistor,
The source class of the 3rd power switch is connected with the first power supply, and the drain electrode of the 3rd power switch is connected with the source class of the first power switch, and the grid of the 3rd power switch is connected with an output of logical circuit,
The source class of the 4th power switch is connected with second source, and the drain electrode of the 4th power switch is connected with the source class of the first power switch, and the grid of the 4th power switch is connected with another output of logical circuit,
An input of described voltage comparator is connected with the first power supply, and another input is connected with second source.
3. DC-to-DC converter according to claim 1, is characterized in that, described bleeder circuit comprises the resistance R11 between output and ground and resistance R12 that are series at described output circuit, and the node voltage between two resistance is described feedback voltage.
4. DC-to-DC converter according to claim 1, is characterized in that, described feedback control circuit comprises pedestal generator, error amplifier, low-power consumption oscillator, PWM generator and logic drive circuit,
Described pedestal generator generates reference voltage,
Described error amplifier forms error amplification signal for the difference of amplifying reference voltage and described feedback voltage;
Low-power consumption oscillator is for generating triangular wave oscillation signal;
Described PWM generator generates pwm control signal based on triangular wave oscillation signal and described error amplification signal;
Described logic drive circuit controls conducting or the shutoff of the first power switch and the second power switch based on described pwm control signal.
5. DC-to-DC converter according to claim 4, is characterized in that, an input of described error amplifier receives described reference voltage, and another input receives described feedback voltage,
An input of described PWM generator receives error amplification signal, and another input receives triangular wave oscillation signal,
Logic drive circuit receives pwm control signal, and an one output is connected with the control end of the first power switch, and another output is connected with the control end of the second power switch.
6. DC-to-DC converter according to claim 4, it is characterized in that, described pedestal generator comprises the first bipolar transistor, the second bipolar transistor, the first resistance, the second resistance, the 3rd resistance and the 4th resistance, the base stage of the first bipolar transistor and grounded collector, its emitter-base bandgap grading is connected to ground via the first resistance; The base stage of the second bipolar transistor and grounded collector, its emitter-base bandgap grading is connected to one end of the 3rd resistance, and the other end of the 3rd resistance is connected to ground via the second resistance; One end of 4th resistance is connected to ground, the electric current be directly proportional to the hybrid current of the electric current of the electric current and the second resistance that flow through the 3rd resistance is utilized to flow through the 4th resistance, thus obtain reference voltage at the other end of the 4th resistance, wherein the 4th resistance comprises basic resistance unit and multiple adjustable resistance unit, the switch in parallel that each adjustable resistance unit is corresponding with one, adjusts the resistance of the 4th resistance by the conducting and cut-off controlling each switch.
7. DC-to-DC converter according to claim 6, is characterized in that:
First bipolar transistor is a benchmark bipolar transistor, and the second bipolar transistor comprises the benchmark bipolar transistor of multiple parallel connection,
Described pedestal generator also includes the first PMOS transistor, the second PMOS transistor, the 3rd PMOS transistor and operational amplifier,
The source electrode of each PMOS transistor connects power supply, and grid is connected to each other,
The drain electrode of the first PMOS transistor connects the emitter-base bandgap grading of the first bipolar transistor,
The drain electrode of the second PMOS transistor connects one end be connected with the second resistance of the 3rd resistance,
The drain electrode of the 3rd PMOS transistor is connected with the 4th resistance, and the voltage of the drain electrode of the 3rd PMOS transistor and the intermediate node of the 4th resistance is described reference voltage,
The negative-phase input of described operational amplifier connects the drain electrode of the first PMOS transistor, and normal phase input end connects the drain electrode of the second PMOS transistor, and it exports the grid of termination the 3rd PMOS transistor.
8. DC-to-DC converter according to claim 7, is characterized in that: pedestal generator comprises:
The digital temperature sensor of induction Current Temperatures; With
Temperature corrected data is obtained according to Current Temperatures, and according to described temperature corrected data being controlled the temperature compensation module of each switch.
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| CN108733511A (en) * | 2018-03-23 | 2018-11-02 | 成都安信思远信息技术有限公司 | A kind of electronic data processing method based on big data |
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| CN108733511B (en) * | 2018-03-23 | 2022-05-24 | 赵浩茗 | Electronic data processing method based on big data |
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| CN111064453B (en) * | 2019-12-13 | 2023-07-04 | 南京中感微电子有限公司 | Voltage comparator |
| CN111817563A (en) * | 2020-07-08 | 2020-10-23 | 无锡力芯微电子股份有限公司 | Buck type DC-DC converter |
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