CN105242587B - A kind of dual drive mixed type DC low-voltage Intelligent servo drive circuit - Google Patents
A kind of dual drive mixed type DC low-voltage Intelligent servo drive circuit Download PDFInfo
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Abstract
The invention belongs to servo-driver technical field of circuit design, and in particular to a kind of dual drive mixed type DC low-voltage Intelligent servo drive circuit.The circuit of the present invention includes the intelligent control unit based on ARM, based on control system, high speed analog-to-digital conversion unit, high-speed digital-analog converting unit, data storage cell, signal condition unit, external network communication unit, PMU, debugging emulation unit, passive crystal oscillator unit, man-machine interaction unit, sensor information unit, intelligent control output unit, power protection location and power drive unit.The present invention solves the technical problem that existing servo-driver control performance is poor, it is big to take up space, is difficult to networking；Using the design of the double power drive units of ARM+FPGA+, there is the characteristics of dual drive, small volume, low in energy consumption, precision is high, reliability is high, real-time is good, autgmentability is strong, networking is good, strong anti-electromagnetic interference capability is strong.
Description
Technical field
The invention belongs to servo-driver technical field of circuit design, and in particular to a kind of dual drive mixed type DC low-voltage
Intelligent servo drive circuit.
Background technology
DC servomechanism developing history is long, all the time can be in a wide range of interior speed for realizing precision and position with it
The easy running characteristic of control and high-quality and high-efficiency occupies an important position in transmission field.And direct current servo driver is as whole
The core of individual DC servomechanism, developed rapidly also with the development of novel semi-conductor technology and digitial controller.
At present, DC servo product can be widely used in Digit Control Machine Tool, elevator, package packing machine, printing machinery, plastics machine
The various fields such as tool, handling machinery, robot, Medical Devices, radar control equipment.Modern industry servo-drive system, especially one
A little high performance digital control systems, higher requirement is proposed to the control performance of servo-driver.Foreign countries peace river, Panasonic, ABB,
The companies such as Shi Naide develop a series of servo-driver, greatly advance the modernization level of industry；Domestic Central China number
Some major companies such as control, Hollysys are also in active development multiple types servo-driver, but on the whole, in motion control field
Larger gap with developed country also be present.Capability of independent innovation weakness strong influence China's manufacturing industry technical merit carries
Rise, due to lacking the core technology of independent intellectual property right, kinetic control system hit product is largely captured by foreign countries, and moves
The more external monopolization of nucleus movement control technology and Design of Drive and Control Circuit technology of control system.
Servo-driver of the prior art is more to be realized with single-chip microcomputer, DSP (digital signal processor) for control core：With
The shortcomings such as low control performance, low-response, precision be low be present for the driver of core in single-chip microcomputer；And the driver using DSP as core
The defects of compensate for single-chip microcomputer, high speed processor are easy to the realization of algorithm, and control performance is high, faster system response, but in intellectuality
Certain defect also be present in terms of networking, especially existing servo-driver product some spaces it is limited, be unfavorable for single driving
Device is installed, and the application scenario of system requirements high-speed, high precision controlled motor operation, its design aspect also have many deficiencies.Cause
This, design small size, high power are than the servo-driver of, high-intelligentization and networking as the art urgent need to resolve
Problem.
The content of the invention
The technical problem to be solved in the invention is：Servo-driver control performance of the prior art is poor, takes up space
Greatly, it is difficult to networking.
Technical scheme is as described below：
A kind of dual drive mixed type DC low-voltage Intelligent servo drive circuit, including based on control system, it is used
In collection analog quantity and digital information, intelligent control result is exported by logical operation；Dual drive mixed type DC low-voltage intelligence
Energy servo-driver circuit also includes the intelligent control unit based on ARM, high speed analog-to-digital conversion unit, high-speed digital-analog conversion list
It is member, data storage cell, signal condition unit, external network communication unit, PMU, debugging emulation unit, passive
Crystal oscillator unit, man-machine interaction unit, sensor information unit, intelligent control output unit, power protection location and power drive
Unit；Its annexation is：
Its annexation is：
Sensor information unit gathers analog sensor information and digital sensorses information, and above- mentioned information is transmitted
Nursed one's health to signal condition unit；Analog information after conditioning is exported after high speed analog-to-digital conversion unit carries out analog-to-digital conversion to being based on
FPGA control unit, the digital information after conditioning are directly output to the control unit based on FPGA；Control list based on FPGA
The information of input by data/address bus and address bus, is sent to the intelligent control unit based on ARM by member；Intelligence based on ARM
Energy control unit stores information into data storage cell, and calls corresponding data combination external network communication unit information to carry out
Intelligent logical reasoning；After intelligent logical reasoning terminates, based on ARM intelligent control unit by control instruction by data/address bus and
Address bus is sent to the control unit based on FPGA；Control unit based on FPGA is resolved to control instruction, and solution is watched
The control signal of motor operation is taken, control signal is exported after signal condition unit is nursed one's health to power drive unit while driving two
Individual power drive unit, so as to realize accurate controlled motor operation；The information after resolving is passed through based on FPGA control unit
Intelligent control output unit exports：Discrete control information directly exports after signal condition unit is nursed one's health, digital I/O signals warp
Signal condition unit conditioning after directly export, Analog control information successively through high-speed digital-analog converting unit carry out digital-to-analogue conversion,
Signal condition unit exports again after being nursed one's health；System work in, power protection location real-time detecting system voltage, electric current,
Temperature information, there is provided the defencive function of drive circuit；Passive crystal oscillator unit is supplied to intelligent control unit and base based on ARM
In FPGA control unit working clock frequency；PMU is supplied to intelligent control unit based on ARM and is based on
FPGA control unit voltage signal；Debugging emulation unit is supplied to the intelligent control unit based on ARM and the control based on FPGA
Unit debugging emulation interface processed, realize the emulation and download of program；Network communication unit provides network communication interface, realizes servo
Driver communicates with external communication network, there is provided system status information and transmitting control parameters；Man-machine interaction unit realizes system
The input of control parameter and the selection of control function.
Preferably：
The intelligent control unit based on ARM includes arm processor, power-switching circuit, passive crystal oscillating circuit and imitated
True debug circuit：Power-switching circuit provides the normal voltage required for arm processor；Passive crystal oscillating circuit provides ARM processing
Working frequency required for device；Artificial debugging circuit provides the download of ARM program softwares and emulation interface；Arm processor passes through number
Realize data and the transmission and storage of instruction with data storage cell respectively according to bus and address bus.
Preferably：
The control unit based on FPGA includes FPGA processor, power-switching circuit, passive crystal oscillating circuit and emulation
Debug circuit：Power-switching circuit provides voltage needed for FPGA processor；Passive crystal oscillating circuit provides work needed for FPGA processor
Working frequency；Artificial debugging circuit provides program software and downloaded and debugging port；FPGA processor obtains high-speed AD converter, number
Word quantity sensor and digital quantity I/O information datas, FPGA processor are led to using data/address bus and address bus with arm processor
Letter, it resolves the instruction that the intelligent control unit based on ARM performs intelligent logical reasoning, the control of output control servomotor operation
Signal processed.
Preferably：
The control signal of the control unit output based on FPGA is by pwm signal output and I/O signals input and output two
Part forms：The PWM count word signal of FPGA processor output, signal isolation and voltage conversion are carried out through signal condition unit, it is real
Now with power drive unit electrical level match；The input and output of I/O signals are directly to external equipment input and output I/O signals.
Preferably：
The signal condition unit is used to realize analog signalses conditioning and digital quantity regulation；
Analog signalses conditioning includes：Analog sensor input information conditioning and analog output nurse one's health two parts simulation
Quantity sensor input information conditioning process is as described below：Analog sensor information first passes around first-order filtering circuit and carries out signal
Filtering, subsequently into voltage follower circuit, after the input impedance and the signal to noise ratio that improve system, it is sent to adder circuit realization
The bilateral adjustment of voltage, operation amplifier circuit is sent to afterwards and is adjusted to the input range of high speed AD conversion unit requirement；Institute
Stating analog sensor information mainly includes：Positional information, analog temperature information, current of electric and information of voltage；Analog quantity is defeated
It is as described below to go out conditioning process：The analog signal of high-speed digital-analog converting unit output initially enters adder circuit and realizes simulation electricity
Bilateral adjustment is pressed, operational amplifier realization and the electrical level match of external device is then delivered to, reaches normalization output voltage model
Enclose, finally proceeding to voltage follower and first-order filtering circuit reduces output impedance, improves the antijamming capability of signal；
Digital quantity regulation includes：The conditioning of digital sensorses input information, digital quantity input conditioning, digital output
Nurse one's health three parts；
Digital sensorses input information conditioning process is as described below：Digital sensor signal is successively through first-order filtering electricity
Road, photoelectric isolating circuit are filtered and after signal isolation, are sent to data driving chip progress signal driving, and by after driving
Information transmission to data/address bus；
Digital quantity input conditioning process is as described below：Digital quantity signal is carried out through first-order filtering circuit, shaping circuit successively
After filtering and signal shaping, it is sent to data driving chip and carries out signal driving, and the information transmission after driving is total to data
Line；
Digital output conditioning process is as described below：Digital information from the control unit based on FPGA drives through data
Dynamic chip carries out signal driving, and the signal after driving is divided into two parts, and a part of information is converted to difference by difference channel and believed
Number output, another part export the drive signal of enhancing through signal drive circuit.
Preferably：
The high speed analog-to-digital conversion unit includes high-speed AD converter and power reference circuit：Power reference circuit provides
Reference voltage needed for high-speed AD converter；High-speed AD converter is realized using address bus and data/address bus and is based on FPGA
Control unit data and command communication；
The high-speed digital-analog converting unit includes high-speed AD converter and power reference circuit：Power reference circuit provides
Reference voltage needed for high-speed A/D converter；High-speed AD converter is realized and the control list based on FPGA using SPI string lines
The data communication of member；
The data storage cell uses FLASH flash memories and SDRAM Synchronous Dynamic Random Access Memories；
The power drive unit includes power drive adjustment circuit, power drive chip and power drive device：By base
PWM control information is sent in FPGA control unit；The information is sent to power drive chip after power drive adjustment circuit；
Power drive chip signal output direct drive power drive device realizes that motor drives.
Beneficial effects of the present invention are：
The present invention proposes a kind of based on ARM (rank enters reduced instruction set machine)+FPGA (programmable parallel logical device)+bis-
The DC low-voltage Intelligent servo drive circuit of power drive unit, the servo-driver have dual drive, small volume, power consumption
It is low, function is strong, precision is high, reliability is high, real-time is good, response is fast, long lifespan, autgmentability is strong, versatile, networking is good,
The characteristics of anti-electromagnetic interference capability is strong by force, DC servo motor, and can driving DC brushless motor can be driven.
A kind of dual drive mixed type DC low-voltage Intelligent servo drive circuit of the present invention, it is micro- using two kinds of first inlet signals
Processor cooperates, and the architecture thought using double drive control integration, the control of collection digital intelligent, high speed information
Collection, in one, can be the realization pair of two axis servo motor with information processing, intelligent diagnostics, network communication and double power drive functions
Position, speed and Acceleration Control.
A kind of dual drive mixed type DC low-voltage Intelligent servo drive circuit of the present invention, being capable of compatible PLC
Connecting interface, and more servo-driver group net operations are supported, complete multiple-axis servo driving.
A kind of dual drive mixed type DC low-voltage Intelligent servo drive circuit of the present invention, has general purpose I/O, 12 at 18
Point digital light is every output, 12 digital lights every input, 4 tunnel simulation inputs and 3 external communication interfaces.Every servo-driver can
Two axle servomotors are controlled, each axle control accuracy respectively reaches 15A up to 0.01mm, every axle 40us servo turnover rates, dual drive electric current,
Driving voltage+18V~+72V, power 2kW.
Brief description of the drawings
Fig. 1 is hardware configuration block diagram of the present invention；
Fig. 2 (a) is that analog sensor inputs information conditioning structure chart；
Fig. 2 (b) is that analog output nurses one's health structure chart；
Fig. 3 is digital quantity regulation structure chart；
Fig. 4 is external memory storage structure chart；
Fig. 5 is power protection structure figure；
Fig. 6 is system power supply structure chart.
Embodiment
With reference to the accompanying drawings and examples to a kind of dual drive mixed type DC low-voltage Intelligent servo driver of the present invention
Circuit is described in detail.
A kind of dual drive mixed type DC low-voltage Intelligent servo drive circuit of the present invention, can be data acquisition, data
Processing, network service, intelligent control, man-machine interaction, power drive etc. provide hardware foundation.As shown in figure 1, the present invention is a kind of double
Drive mixed type DC low-voltage Intelligent servo drive circuit, including the intelligent control unit based on ARM, controlled based on FPGA it is single
Member, high speed analog-to-digital conversion unit, high-speed digital-analog converting unit, data storage cell, signal condition unit, external network communication list
Member, PMU, debugging emulation unit, passive crystal oscillator unit, man-machine interaction unit, sensor information unit, intelligence control
Output unit, power protection location and power drive unit processed.
The annexation of circuit of the present invention is as described below：
Sensor information unit gathers analog sensor information and digital sensorses information, and above- mentioned information is transmitted
Nursed one's health to signal condition unit；Analog information after conditioning is exported after high speed analog-to-digital conversion unit carries out analog-to-digital conversion to being based on
FPGA control unit, the digital information after conditioning are directly output to the control unit based on FPGA；Control list based on FPGA
The information of input by data/address bus and address bus, is sent to the intelligent control unit based on ARM by member；Intelligence based on ARM
Energy control unit stores information into data storage cell, and calls corresponding data combination external network communication unit information to carry out
Intelligent logical reasoning；After intelligent logical reasoning terminates, based on ARM intelligent control unit by control instruction by data/address bus and
Address bus is sent to the control unit based on FPGA；Control unit based on FPGA is resolved to control instruction, and solution is watched
The control signal of motor operation is taken, control signal is exported after signal condition unit is nursed one's health to power drive unit while driving two
Individual power drive unit, so as to realize accurate controlled motor operation；The information after resolving is passed through based on FPGA control unit
Intelligent control output unit exports：Discrete control information directly exports after signal condition unit is nursed one's health, digital I/O signals warp
Signal condition unit conditioning after directly export, Analog control information successively through high-speed digital-analog converting unit carry out digital-to-analogue conversion,
Signal condition unit exports again after being nursed one's health.
In system work, power protection location real-time detecting system voltage, electric current, temperature information, there is provided driver electricity
The defencive function on road；Passive crystal oscillator unit is supplied to the intelligent control unit based on ARM and the control unit work based on FPGA
Clock frequency；PMU is supplied to the intelligent control unit based on ARM and the control unit voltage signal based on FPGA；
Debugging emulation unit is supplied to the intelligent control unit based on ARM and the control unit debugging emulation interface based on FPGA, realizes
The emulation and download of program；Network communication unit provides network communication interface, realizes that servo-driver leads to external communication network
Letter, there is provided system status information and transmitting control parameters；Man-machine interaction unit realizes system by the way of keyboard and touch-screen
The input of control parameter and the selection of control function.
The intelligent control unit based on ARM is the core of drive circuit, and it is responsible for controlling whole SERVO CONTROL system
System flow, can be driven control, data processing and intelligent diagnostics, and can be realized by external network bus communication unit
Communicated with external bus real-time performance, there is the signal handling capacity of high speed.Intelligent control unit based on ARM is included at ARM
Manage device, power-switching circuit, passive crystal oscillating circuit and artificial debugging circuit：Power-switching circuit is provided required for arm processor
Normal voltage, such as+3.3V and+1.3V；Passive crystal oscillating circuit provides the working frequency required for arm processor, such as 12MHz；
Artificial debugging circuit provides the download of ARM program softwares and emulation interface；Arm processor is distinguished by data/address bus and address bus
Data and the transmission and storage of instruction are realized with data storage cell.
In the present embodiment, the arm processor uses Samsung's high-performance S3C2440A chips, and S3C2440A is ARM
32 risc microcontrollers of 920T kernels, work dominant frequency are up to 400MHz, have small volume, low in energy consumption, function is strong, stability
The advantages of height, strong interference immunity, fast arithmetic speed, Windows and (SuSE) Linux OS are supported, be the height of a floating-point operation
Integrated processor, there is I2C, the interface such as UART, Ethernet, USB.
The control unit collection analog quantity and digital information based on FPGA, receive the intelligent control single based on ARM
Metainstruction, and using logical operation output intelligent control result.Control unit based on FPGA includes FPGA processor, power supply turns
Change circuit, passive crystal oscillating circuit and artificial debugging circuit：Power-switching circuit provides voltage needed for FPGA processor, such as+3.3V
With+1.5V；Passive crystal oscillating circuit provides working frequency needed for FPGA processor；Artificial debugging circuit provide program software download with
Debug port；FPGA processor obtains high-speed AD converter, digital sensorses and digital quantity I/O information datas, at FPGA
Reason device is communicated using data/address bus and address bus with arm processor, and it resolves the intelligent control unit based on ARM and performs intelligence
The instruction of reasoning from logic, the control signal of output control servomotor operation.
The control signal of the control unit output based on FPGA is by pwm signal output and digital I/O signal outputs two
Part forms, and the relationship of the two is：FPGA processor output PWM count word signal, through signal condition unit carry out signal isolation and
Voltage conversion, realization and power drive unit electrical level match, to avoid the whole circuit of interference effect caused by motor driving；Number
Word I/O signal outputs directly export digital I/O information to external equipment, mainly including brake signal, alarm signal, digital-scroll technique letter
Number etc..
In the present embodiment, the FPGA processor uses the XC3S200 chips of Xilinx companies, XilinxXC3S2000 cores
Piece is latest generation FPGA products, and the chip has a 4320LE logical resources, and 216KBlock RAM, 173 user I/O is (general defeated
Enter output).Have the advantages that small volume, integrated level are high, speed is fast, online modification programming is convenient, the work that the chip can be stablized
Make the frequency in 50MHz, meet technical requirements.
The high speed analog-to-digital conversion unit includes high-speed AD converter and power reference circuit：Power reference circuit provides
Reference voltage needed for high-speed AD converter, such as+2.5V；High-speed AD converter using address bus and data/address bus realize with
The data and command communication of control unit based on FPGA.
In the present embodiment, the high-speed AD converter uses AD7608 chips, a passage of high accuracy 8 of AD7608 chips
18 high-speed AD converters, the conversion frequency of each analog channel is 200kSPS, meets that system control requires；The power supply base
Quasi- circuit uses AD421 high-accuracy voltage conversion chips.
The high-speed digital-analog converting unit includes high-speed AD converter and power reference circuit：Power reference circuit provides
Reference voltage needed for high-speed A/D converter, such as+2.5V；High-speed AD converter is realized using SPI string lines and is based on FPGA
Control unit data communication.
In the present embodiment, the high-speed A/D converter uses DAC7311 chips, and DAC7311 chips are with buffering benchmark
12 Dual-channel digital analog converters of input, there is the characteristics of high accuracy, Low Drift Temperature, low noise, meet that system control requires；Institute
State power reference circuit and use AD580 chips ,+2.5V caused by it is used as high-speed A/D converter reference voltage.
The signal condition unit is used to realize analog signalses conditioning and digital quantity regulation.
Analog signalses conditioning includes：Analog sensor input information conditioning and analog output nurse one's health two parts.Such as
Shown in Fig. 2 (a), analog sensor input information conditioning process is as described below：Analog sensor information first passes around single order
Filter circuit carries out signal filtering, subsequently into voltage follower circuit, after the input impedance and the signal to noise ratio that improve system, and transmission
Realize the bilateral adjustment of voltage to adder circuit, be sent to afterwards operation amplifier circuit adjust to high speed AD conversion unit will
The input range asked.The analog sensor information mainly includes：Positional information, analog temperature information, current of electric and electricity
Press information.As shown in Fig. 2 (b), analog output conditioning process is as described below：The analog signal of high-speed digital-analog converting unit output
Initially enter adder circuit and realize the bilateral adjustment of analog voltage, be then delivered to operational amplifier realization and the electricity of external device
Flat matching, reaches normalization output voltage range, finally proceed to voltage follower and first-order filtering circuit reduce output impedance,
Improve the antijamming capability of signal.
As shown in figure 3, digital quantity regulation includes：Digital sensorses input information is nursed one's health, digital quantity input is nursed one's health,
Digital output nurses one's health three parts.
Digital sensorses input information conditioning process is as described below：Carry out the digital sensings such as self-encoding encoder and temperature sensor
Device signal first passes around forms first-order filtering circuit by resistance, electric capacity, after by the Phototube Coupling that is made up of TLP281-4 chips
Circuit carries out signal isolation, and the information transmission after isolation to data driving chip SM164245 finally is carried out into signal driving, and
By the information transmission after driving to data/address bus.
Digital quantity input conditioning process is as described below：First pass around and first-order filtering circuit formed by resistance, electric capacity, after by
The shaping circuit being made up of Schmitt trigger 74LS14 chips carries out signal shaping, finally by the information transmission after shaping to number
Signal driving is carried out according to driving chip SM164245, and by the information transmission after driving to data/address bus.
Digital output conditioning process is as described below：Digital information from the control unit based on FPGA first passes around
Data driving chip SM164245, the signal after driving are divided into two parts, and a part of information passes through the difference being made up of AM26LS31
Parallel circuit, convert a signal into differential signal output；Another part passes through the signal drive circuit being made up of TD62083, will increase
Strong drive signal output.
The data storage cell includes FLASH flash memories and SDRAM Synchronous Dynamic Random Access Memories：Data
Memory cell is connected by address bus and data/address bus with arm processor, and each memory cell passes through special reading and writing, piece selected control
Signal processed is connected with ARM control lines.
In the present embodiment, FLASH uses totally 512 megabits of two panels FLASH chip, for solidify bootstrap and it is embedded should
Use program；SDRAM uses totally 512 megabits of two panels SDRAM chips, for storage and processing data, and realizes embedding after upper electricity
Enter the loading of formula application program.Two panels FLASH chip and two panels SDRAM chips pass through address bus and data/address bus and ARM processing
Device connects.Realized and data storage cell number by the external memory interface of arm processor based on ARM intelligent control unit
According to the read-write with instruction, it is as shown in Figure 4 that it stores operation structure.
The man-machine interaction unit includes charactron, indicator lamp and button：The work of numeral method current servo driver
Make state parameter information and human-machine interactive information；Indicator lamp indicates the working condition of servo-driver；Peripheral operation can by by
Key input servo-driver device control parameter.In the present embodiment, charactron uses 4 common-anode charactrons；Indicator lamp is using straight
Insert light emitting diode.
The communication that the external network communication unit is used between intelligent control unit and external network peripheral hardware based on ARM
Data send and receive with instruction, including CAN, RS485 buses and RS232 buses：It is total that CAN corresponds to MCP2551
Line transceiver；RS485 buses correspond to MAX1487 bus transceivers；RS232 buses correspond to MAX232 bus transceivers.
The passive crystal oscillator unit includes passive crystal oscillator chip and electric capacity, provides working frequency for arm processor, such as
12MHz；Working frequency, such as 50MHz are provided for FPGA processor；Clock signal, such as 12MHz are provided for network service work.
The debugging emulation unit is used to provide the intelligent control unit based on ARM and the control unit debugging based on FPGA
Emulation interface, realize the emulation and download of program.Debugging emulation unit includes debugging storage chip, resistance and electric capacity, the tune
Examination storage chip uses XCF08PVOG48C chips.
The sensor information unit includes digital sensorses and analog sensor：Digital sensorses are used to gather
Incremental encoder information, absolute type encoder information and digital sensor information of two motors etc.；Analog sensor is used
In the analog positional information of collection, analog temperature information, analog quantity external control information etc..
The power drive unit includes power drive adjustment circuit, power drive chip and power drive device：By base
PWM control information is sent in FPGA control unit；The information is sent to power drive chip after power drive adjustment circuit；
Power drive chip signal output direct drive power drive device realizes that motor drives.
In the present embodiment, it is attached based on FPGA control unit with power drive unit using flexible board.The work(
Rate driving adjustment circuit is made up of diode, voltage-stabiliser tube, precision resistance, current-limiting resistance, and foundation needs selected diode and precision
Resistance value, realize the power protection of power drive hardware.The power drive chip uses Infineon companies
1ED020I12-B2,1ED020I12-B2 are a impulsive quarantine type driving chips, have stronger antijamming capability, driving electricity
Press as+15V and -8V, can preferably suppress power driver module voltage change ratio and current changing rate.The power drive device
Magnificent core micro semiconductor HRM250D type N-channel MOS FET are selected, it has, and light weight, conducting resistance are small, are easy to driving, high pressure
The advantages that, its metal mold encapsulation for being encapsulated as being fully sealed.
As shown in figure 5, the power protecting circuit includes：Overvoltage crowbar, under-voltage protecting circuit, current foldback circuit
And temperature protection circuit.Over-pressed, under-voltage, excessively stream, temperature protection can be directly realized by power drive protection by hardware signal conditioning,
Meanwhile can also be nursed one's health by data signal, FPGA control unit is directly based upon, passes through Digital Logic control software protection technique
Realize that power is protected.
In the present embodiment, overvoltage crowbar and under-voltage protecting circuit are made up of resistance, electric capacity, voltage comparator, work as production
When giving birth to over-pressed, under-voltage signal, comparator exports " 0 " and " 1 " signal respectively, and this is signally attached to the realization of power drive chip controls
Hardware protection.Current sense chip uses the IR2175 chips of IR companies in current foldback circuit, and the chip not only has interface
The advantages of circuit is simple, with PWM mode output current signal, also provide the functions such as overcurrent protection function.Temperature protection circuit is adopted
With high-precision DS18B20 chips, for the temperature during measuring internal drive, the sensor has small volume, precision height, connect
The characteristics of line is simple.
The PMU includes multiple power sources modular converter and filter circuit, and power transfer module is broadly divided into control
Power supply processed, driving power, probe power, the major class of electrical source of power four.System input voltage is mainly converted to ARM by control power supply
Processor, FPGA processor, sensor and communication system operating voltage；Probe power will mainly provide current potential and be passed to analog quantity
Sensor and digital sensorses；Driving power provides voltage and gives power drive chip；Power input power and external input power
Unanimously, power output power supply is picked out by analog line driver output.Voltage class be broadly divided into+24V ,+15V, -15V ,+12V ,+
The type of 5V ,+3.3V ,+1.8V ,+1.5V ,+1.3V nine.Arm processor power module corresponds to LM117-3.3, LM117ADJ-
1.3；FPFA processor power supply modules correspond to LM117-3.3, LT1587-1.5 and TPS79401；Driving power corresponds to
ZHDC28D0815；Communication isolating power supply corresponds to NKE0505SC；Probe power corresponds to ZHDC28D05 and ZHDC28D15；
System voltage grade transition diagram is as shown in Figure 6.Filter circuit is made up of tantalum electric capacity and ceramic disc capacitor, the filter for power supply
Ripple.Relation between it is：Tantalum electric capacity and ceramic disc capacitor in filter circuit are parallel to each power transfer module input and output
Port.
Claims (1)
1. a kind of dual drive mixed type DC low-voltage Intelligent servo drive circuit, including based on control system, it is used for
Analog quantity and digital information are gathered, intelligent control result is exported by logical operation；It is characterized in that：Also include being based on ARM
Intelligent control unit, high speed analog-to-digital conversion unit, high-speed digital-analog converting unit, data storage cell, signal condition unit, outer
Portion's network communication unit, PMU, debugging emulation unit, passive crystal oscillator unit, man-machine interaction unit, sensor information
Unit, intelligent control output unit, power protection location and power drive unit；
Its annexation is：
Sensor information unit gathers analog sensor information and digital sensorses information, and above- mentioned information is transferred into letter
The conditioning of number conditioning unit；Analog information after conditioning exports after high speed analog-to-digital conversion unit carries out analog-to-digital conversion is extremely based on FPGA
Control unit, the digital information after conditioning is directly output to the control unit based on FPGA；Control unit based on FPGA will
The information of input is sent to the intelligent control unit based on ARM by data/address bus and address bus；Intelligence control based on ARM
Unit processed stores information into data storage cell, and calls corresponding data combination external network communication unit information to carry out intelligence
Reasoning from logic；After intelligent logical reasoning terminates, control instruction is passed through data/address bus and address by the intelligent control unit based on ARM
Bus is sent to the control unit based on FPGA；Control unit based on FPGA resolves to control instruction, solves servo electricity
The control signal of machine operation, control signal export to power drive unit after signal condition unit is nursed one's health while drive two work(
Rate driver element, so as to realize accurate controlled motor operation；Information after resolving is passed through by intelligence based on FPGA control unit
Control output unit output：Discrete control information directly exports after signal condition unit is nursed one's health, and digital I/O signals are through signal
Directly exported after conditioning unit conditioning, Analog control information carries out digital-to-analogue conversion, signal through high-speed digital-analog converting unit successively
Conditioning unit exports again after being nursed one's health；In system work, power protection location real-time detecting system voltage, electric current, temperature
Information, there is provided the defencive function of drive circuit；Passive crystal oscillator unit is supplied to intelligent control unit based on ARM and is based on
FPGA control unit working clock frequency；PMU is supplied to intelligent control unit based on ARM and based on FPGA
Control unit voltage signal；Debugging emulation unit is supplied to the intelligent control unit based on ARM and the control list based on FPGA
First debugging emulation interface, realize the emulation and download of program；Network communication unit provides network communication interface, realizes servo-drive
Device communicates with external communication network, there is provided system status information and transmitting control parameters；Man-machine interaction unit realizes system control
The input of parameter and the selection of control function；
The intelligent control unit based on ARM includes arm processor, power-switching circuit, passive crystal oscillating circuit and emulation and adjusted
Try circuit：Power-switching circuit provides the normal voltage required for arm processor；Passive crystal oscillating circuit provides arm processor institute
The working frequency needed；Artificial debugging circuit provides the download of ARM program softwares and emulation interface；Arm processor is total by data
Line and address bus realize data and the transmission and storage of instruction with data storage cell respectively；
The control unit based on FPGA includes FPGA processor, power-switching circuit, passive crystal oscillating circuit and artificial debugging
Circuit：Power-switching circuit provides voltage needed for FPGA processor；Passive crystal oscillating circuit provides work frequency needed for FPGA processor
Rate；Artificial debugging circuit provides program software and downloaded and debugging port；FPGA processor obtains high-speed AD converter, digital quantity
Sensor and digital quantity I/O information datas, FPGA processor are communicated using data/address bus and address bus with arm processor, it
Resolve the instruction that the intelligent control unit based on ARM performs intelligent logical reasoning, the control letter of output control servomotor operation
Number；
The control signal of the control unit output based on FPGA is by pwm signal output and I/O signal input and output two parts
Composition：The PWM count word signal of FPGA processor output, signal isolation and voltage conversion are carried out through signal condition unit, realize with
Power drive unit electrical level match；The input and output of I/O signals are directly to external equipment input and output I/O signals；
The signal condition unit is used to realize analog signalses conditioning and digital quantity regulation；
Analog signalses conditioning includes：Analog sensor input information conditioning and analog output nurse one's health two parts analog quantity biography
Sensor input information conditioning process is as described below：Analog sensor information first passes around first-order filtering circuit and carries out signal filter
Ripple, subsequently into voltage follower circuit, after the input impedance and the signal to noise ratio that improve system, it is sent to adder circuit and realizes electricity
Bilateral adjustment is pressed, operation amplifier circuit is sent to afterwards and adjusts to the input range of high speed AD conversion unit requirement；It is described
Analog sensor information mainly includes：Positional information, analog temperature information, current of electric and information of voltage；Analog output
Conditioning process is as described below：The analog signal of high-speed digital-analog converting unit output initially enters adder circuit and realizes analog voltage
Bilateral adjustment, operational amplifier realization and the electrical level match of external device are then delivered to, reaches normalization output voltage range,
Finally proceeding to voltage follower and first-order filtering circuit reduces output impedance, improves the antijamming capability of signal；
Digital quantity regulation includes：The conditioning of digital sensorses input information, digital quantity input conditioning, digital output conditioning
Three parts；
Digital sensorses input information conditioning process is as described below：Digital sensor signal is successively through first-order filtering circuit, light
Electric isolating circuit is filtered and after signal isolation, is sent to data driving chip and carries out signal driving, and by the letter after driving
Breath is sent to data/address bus；
Digital quantity input conditioning process is as described below：Digital quantity signal is filtered through first-order filtering circuit, shaping circuit successively
After signal shaping, it is sent to data driving chip and carries out signal driving, and by the information transmission after driving to data/address bus；
Digital output conditioning process is as described below：Digital information from the control unit based on FPGA is through data-driven core
Piece carries out signal driving, and the signal after driving is divided into two parts, and it is defeated that a part of information by difference channel is converted to differential signal
Go out, another part exports the drive signal of enhancing through signal drive circuit；
The high speed analog-to-digital conversion unit includes high-speed AD converter and power reference circuit：Power reference circuit provides at a high speed
Reference voltage needed for analog-digital converter；High-speed AD converter is realized and the control based on FPGA using address bus and data/address bus
The data and command communication of unit processed；
The high-speed digital-analog converting unit includes high-speed AD converter and power reference circuit：Power reference circuit provides at a high speed
Reference voltage needed for digital analog converter；High-speed AD converter is realized and the control unit based on FPGA using SPI string lines
Data communicate；
The data storage cell uses FLASH flash memories and SDRAM Synchronous Dynamic Random Access Memories；
The power drive unit includes power drive adjustment circuit, power drive chip and power drive device：By based on
FPGA control unit sends PWM control information；The information is sent to power drive chip after power drive adjustment circuit；Work(
Rate drive chip signal output direct drive power drive device realizes that motor drives.
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