CN105242587A - Double-drive hybrid direct-current and low-voltage intelligent servo driver circuit - Google Patents
Double-drive hybrid direct-current and low-voltage intelligent servo driver circuit Download PDFInfo
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Abstract
The invention belongs to the technical field of servo driver circuit design, and specifically relates to a double-drive hybrid direct-current and low-voltage intelligent servo driver circuit. The circuit of the invention comprises an ARM-based intelligent control unit, an FPGA-based control unit, a high-speed analog-to-digital conversion unit, a high-speed digital-to-analog conversion unit, a data storage unit, a signal conditioning unit, an external network communication unit, a power management unit, a debugging and simulation unit, a passive crystal oscillation unit, a human-computer interaction unit, a sensor information unit, an intelligent control output unit, a power protection unit, and a power drive unit. The technical problem that the existing servo driver has poor control performance, occupies a large space and is hard to achieve a networked mode is solved. By adopting the design of 'ARM + FPGA + double power drive units', the double-drive hybrid direct-current and low-voltage intelligent servo driver circuit of the invention has the characteristics of double drive, small size, low power consumption, high precision, high reliability, good real-time performance, high scalability, good networking performance, and high resistance to electromagnetic interference.
Description
Technical field
The invention belongs to servo-driver technical field of circuit design, be specifically related to a kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit.
Background technology
DC servomechanism developing history is long, the interior easy running characteristic realizing accurate speed and position control and high-quality and high-efficiency can occupy an important position at transmission field with it on a large scale all the time.And direct current servo driver is as the core of whole DC servomechanism, also along with the development of novel semi-conductor technology and digitial controller and develop rapidly.
At present, DC servo product can be widely used in the various fields such as numerically-controlled machine, elevator, package packing machine, printing machinery, plastics machinery, handling machinery, robot, Medical Devices, radar control equipment.Modern industry servo-drive system, especially some high performance digital control systems, have higher requirement to the control performance of servo-driver.The company such as external peace river, Panasonic, ABB, Shi Naide develops a series of servo-driver, greatly advances the modernization level of industry; Also at active development multiple types servo-driver, but on the whole, also there is larger gap in motion control field and developed country in some major companies such as the numerical control of domestic Central China, Hollysys.The weak lifting affecting China's manufacturing industry technical merit greatly of the capability of independent innovation, owing to lacking the core technology of independent intellectual property right, kinetic control system hit product major part is abroad captured, and the nucleus movement control technology of kinetic control system and Design of Drive and Control Circuit technology more abroad monopolize.
Servo-driver of the prior art is that control core realizes mainly with single-chip microcomputer, DSP (digital signal processor): be that the driver of core exists the shortcomings such as control performance is low, low-response, precision are low with single-chip microcomputer; And take DSP as the defect that the driver of core compensate for single-chip microcomputer, high speed processor is convenient to the realization of algorithm, control performance is high, faster system response, but in intelligent network, also there is certain defect, especially existing servo-driver product at some limited spaces, be unfavorable for that single driver is installed, and system requirements high-speed, high precision controls the application scenario that motor runs, also there is many deficiencies in its design aspect.Therefore, design small size, high power ratio, high-intelligentization and networking servo-driver become the problem that the art needs solution badly.
Summary of the invention
The technical issues that need to address of the present invention are: servo-driver control performance of the prior art is poor, take up space large, be difficult to realize networking.
Technical scheme of the present invention is as described below:
A kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit, comprise based on control system, it is for gathering analog quantity and digital information, exports Based Intelligent Control result by logical operation; Dual Drive mixed type DC low-voltage Intelligent servo drive circuit also comprises based on the intelligent control unit of ARM, high speed analog-to-digital conversion unit, high-speed digital-analog converting unit, data storage cell, signal condition unit, external network communication unit, Power Management Unit, debugging emulation unit, passive crystal oscillator unit, man-machine interaction unit, sensor information unit, Based Intelligent Control output unit, power protected location and power drive unit; Its annexation is:
Its annexation is:
Sensor information unit gathers analog sensor information and digital sensors information, and above-mentioned information is passed to the conditioning of signal condition unit; Analog information after conditioning carries out through high speed analog-to-digital conversion unit the control module that exports to after analog to digital conversion based on FPGA, and the numerical information after conditioning directly exports the control module based on FPGA to; Based on FPGA control module by input information by data bus and address bus, be sent to the intelligent control unit based on ARM; Information is stored into data storage cell by the intelligent control unit based on ARM, and calls corresponding data and carry out intelligent logical reasoning in conjunction with external network communication unit information; After intelligent logical reasoning terminates, steering order is sent to control module based on FPGA by data bus and address bus by the intelligent control unit based on ARM; Control module based on FPGA resolves steering order, solve the control signal that servomotor runs, control signal exports power drive unit to and drives two power drive units simultaneously after the conditioning of signal condition unit, thus realizes accurately controlling motor operation; Information after resolving is exported by Based Intelligent Control output unit by the control module based on FPGA: discrete control information directly exports after the conditioning of signal condition unit, numeral I/O signal directly exports after the conditioning of signal condition unit, and Analog control information carries out digital-to-analog conversion through high-speed digital-analog converting unit successively, signal condition unit exports after nursing one's health again; In system works, power protected location real-time detecting system voltage, electric current, temperature information, provide the defencive function of drive circuit; Passive crystal oscillator unit is supplied to the intelligent control unit based on ARM and the control module work hour hands frequency based on FPGA; Power Management Unit is supplied to the intelligent control unit based on ARM and the control module voltage signal based on FPGA; Debugging emulation unit is supplied to the intelligent control unit based on ARM and the control module debugging emulation interface based on FPGA, realizes emulation and the download of program; Network communication unit provides network communication interface, realizes servo-driver and communicates with external communication network, provides system status information and transmitting control parameters; Man-machine interaction unit realizes the input of system control parameters and the selection of controlling functions.
Preferably:
The described intelligent control unit based on ARM comprises arm processor, power-switching circuit, passive crystal oscillating circuit and artificial debugging circuit: power-switching circuit provides the normal voltage required for arm processor; Passive crystal oscillating circuit provides the frequency of operation required for arm processor; Artificial debugging circuit provides ARM program software to download and emulation interface; Arm processor realizes transmission and the storage of data and instruction respectively by data bus and address bus with data storage cell.
Preferably:
The described control module based on FPGA comprises FPGA processor, power-switching circuit, passive crystal oscillating circuit and artificial debugging circuit: power-switching circuit provides FPGA processor required voltage; Passive crystal oscillating circuit provides frequency of operation needed for FPGA processor; Artificial debugging circuit provides program software to download and debug port; FPGA processor obtains high-speed AD converter, digital sensors and digital quantity I/O information data, FPGA processor adopts data bus to communicate with arm processor with address bus, it resolves the instruction of the intelligent control unit execution intelligent logical reasoning based on ARM, exports the control signal controlling servomotor and run.
Preferably:
The control signal that the described control module based on FPGA exports is exported by pwm signal and I/O signal input and output two parts form: the PWM digital signal that FPGA processor exports, carry out signal isolation and voltage transitions through signal condition unit, realize and power drive unit level match; The input and output of I/O signal are directly to external equipment input and output I/O signal.
Preferably:
Described signal condition unit is used for realizing analog signals conditioning and digital quantity regulation;
Analog signals conditioning comprises: it is as described below that analog sensor input information conditioning and analog output nurse one's health two parts analog sensor input information conditioning process: first analog sensor information carry out signal filtering through first-order filtering circuit, then voltage follower circuit is entered, after the input impedance of raising system and signal to noise ratio (S/N ratio), be sent to adder circuit and realize the bilateral adjustment of voltage, be sent to the input range that operation amplifier circuit is adjusted to the requirement of high speed analog-to-digital conversion unit afterwards; Described analog sensor information spinner will comprise: positional information, analog temperature information, current of electric and information of voltage; Analog output conditioning process is as described below: first the simulating signal that high-speed digital-analog converting unit exports enters adder circuit and realize the bilateral adjustment of analog voltage, then be sent to operational amplifier and realize the level match with external device, reach normalization output voltage range, be finally sent to voltage follower and first-order filtering circuit and reduce output impedance, improve the antijamming capability of signal;
Digital quantity regulation comprises: the conditioning of digital sensors input information, digital quantity input conditioning, digital output nurse one's health three parts;
Digital sensors input information conditioning process is as described below: digital sensor signal is successively after first-order filtering circuit, photoelectric isolating circuit carry out filtering and signal isolation, be sent to data driving chip and carry out signal driving, and the information after driving is sent to data bus;
Digital quantity input conditioning process is as described below: digital quantity signal, successively after first-order filtering circuit, shaping circuit carry out filtering and signal shaping, is sent to data driving chip and carries out signal driving, and the information after driving is sent to data bus;
Digital output conditioning process is as described below: the digital information from the control module based on FPGA carries out signal driving through data driving chip, signal after driving is divided into two parts, part information is converted to differential signal through difference channel and exports, the drive singal strengthened, through signal drive circuit, exports by another part.
Preferably:
Described high speed analog-to-digital conversion unit comprises high-speed AD converter and power reference circuit: power reference circuit provides reference voltage needed for high-speed AD converter; High-speed AD converter adopt address bus and data bus realize with based on the data of the control module of FPGA and command communication;
Described high-speed digital-analog converting unit comprises high-speed AD converter and power reference circuit: power reference circuit provides reference voltage needed for high-speed A/D converter; High-speed AD converter adopts SPI string line to realize and the data communication based on the control module of FPGA;
Described data storage cell adopts FLASH flash memories and SDRAM Synchronous Dynamic Random Access Memory;
Described power drive unit comprises power drive Circuit tuning, power drive chip and power drive device: send PWM control information by the control module based on FPGA; This information delivers to power drive chip after power drive Circuit tuning; Power drive chip signal output Direct driver power drive device realizes motor and drives.
Beneficial effect of the present invention is:
The present invention proposes a kind of DC low-voltage Intelligent servo drive circuit based on ARM (reduced instruction set machine is entered on rank)+FPGA (programmable parallel logical device)+bis-power drive unit, this servo-driver has Dual Drive, volume is little, low in energy consumption, function is strong, precision is high, reliability is high, real-time is good, response is fast, the life-span is long, extendability is strong, highly versatile, feature that good, the strong anti-electromagnetic interference capability of networking is strong, can DC servo motor be driven, can DC brushless motor be driven again.
A kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit of the present invention, adopt two kinds of advanced signal microprocessor collaborative works, and adopt double drive to control the architecture thought of integration, integrate digital intelligent control, high speed information collection and information processing, intelligent diagnostics, network communication and two power drive function, can realize position, speed and Acceleration Control for two axis servo motor.
A kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit of the present invention, can compatible PLC connecting interface, and supports multiple stage servo-driver group net operation, completes multiple-axis servo and drives.
A kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit of the present invention, has 18 general purpose I/O, 12 digital light every output, 12 digital light every input, 4 tunnel analog inputs and 3 external communication interface.Every platform servo-driver can control diaxon servomotor, and each axle control accuracy can reach 0.01mm, and every axle 40us servo turnover rate, Dual Drive electric current respectively reaches 15A, driving voltage+18V ~+72V, power 2kW.
Accompanying drawing explanation
Fig. 1 is hardware configuration block diagram of the present invention;
Fig. 2 (a) is analog sensor input information conditioning structural drawing;
Fig. 2 (b) is analog output conditioning structural drawing;
Fig. 3 is digital quantity regulation structural drawing;
Fig. 4 is external memory storage structural drawing;
Fig. 5 is power operator guards figure;
Fig. 6 is system power supply structural drawing.
Embodiment
Below in conjunction with drawings and Examples, a kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit of the present invention is described in detail.
A kind of Dual Drive mixed type of the present invention DC low-voltage Intelligent servo drive circuit, can provide hardware foundation for data acquisition, data processing, network service, Based Intelligent Control, man-machine interaction, power drive etc.As shown in Figure 1; a kind of Dual Drive mixed type of the present invention DC low-voltage Intelligent servo drive circuit, comprises based on the intelligent control unit of ARM, based on control system, high speed analog-to-digital conversion unit, high-speed digital-analog converting unit, data storage cell, signal condition unit, external network communication unit, Power Management Unit, debugging emulation unit, passive crystal oscillator unit, man-machine interaction unit, sensor information unit, Based Intelligent Control output unit, power protected location and power drive unit.
The annexation of circuit of the present invention is as described below:
Sensor information unit gathers analog sensor information and digital sensors information, and above-mentioned information is passed to the conditioning of signal condition unit; Analog information after conditioning carries out through high speed analog-to-digital conversion unit the control module that exports to after analog to digital conversion based on FPGA, and the numerical information after conditioning directly exports the control module based on FPGA to; Based on FPGA control module by input information by data bus and address bus, be sent to the intelligent control unit based on ARM; Information is stored into data storage cell by the intelligent control unit based on ARM, and calls corresponding data and carry out intelligent logical reasoning in conjunction with external network communication unit information; After intelligent logical reasoning terminates, steering order is sent to control module based on FPGA by data bus and address bus by the intelligent control unit based on ARM; Control module based on FPGA resolves steering order, solve the control signal that servomotor runs, control signal exports power drive unit to and drives two power drive units simultaneously after the conditioning of signal condition unit, thus realizes accurately controlling motor operation; Information after resolving is exported by Based Intelligent Control output unit by the control module based on FPGA: discrete control information directly exports after the conditioning of signal condition unit, numeral I/O signal directly exports after the conditioning of signal condition unit, and Analog control information carries out digital-to-analog conversion through high-speed digital-analog converting unit successively, signal condition unit exports after nursing one's health again.
In system works, power protected location real-time detecting system voltage, electric current, temperature information, provide the defencive function of drive circuit; Passive crystal oscillator unit is supplied to the intelligent control unit based on ARM and the control module work hour hands frequency based on FPGA; Power Management Unit is supplied to the intelligent control unit based on ARM and the control module voltage signal based on FPGA; Debugging emulation unit is supplied to the intelligent control unit based on ARM and the control module debugging emulation interface based on FPGA, realizes emulation and the download of program; Network communication unit provides network communication interface, realizes servo-driver and communicates with external communication network, provides system status information and transmitting control parameters; Man-machine interaction unit adopts the mode of keyboard and touch-screen to realize the input of system control parameters and the selection of controlling functions.
The described intelligent control unit based on ARM is the core of drive circuit, it is responsible for controlling whole servo-control system flow process, drived control, data processing and intelligent diagnostics can be carried out, and can realize communicating with external bus real-time performance by external network bus communication unit, there is signal handling capacity at a high speed.Intelligent control unit based on ARM comprises arm processor, power-switching circuit, passive crystal oscillating circuit and artificial debugging circuit: power-switching circuit provides the normal voltage required for arm processor, as+3.3V and+1.3V; Passive crystal oscillating circuit provides the frequency of operation required for arm processor, as 12MHz; Artificial debugging circuit provides ARM program software to download and emulation interface; Arm processor realizes transmission and the storage of data and instruction respectively by data bus and address bus with data storage cell.
In the present embodiment, described arm processor adopts Samsung high-performance S3C2440A chip, S3C2440A is 32 risc microcontrollers of ARM920T kernel, work dominant frequency is up to 400MHz, have that volume is little, low in energy consumption, function is strong, stability is high, the advantage of strong interference immunity, fast operation, support Windows and (SuSE) Linux OS, be the high integrated processor of a floating-point operation, there is the interfaces such as I2C, UART, Ethernet, USB.
The described control module based on FPGA gathers analog quantity and digital information, receives the intelligent control single metainstruction based on ARM, and adopts logical operation to export Based Intelligent Control result.Control module based on FPGA comprises FPGA processor, power-switching circuit, passive crystal oscillating circuit and artificial debugging circuit: power-switching circuit provides FPGA processor required voltage, as+3.3V and+1.5V; Passive crystal oscillating circuit provides frequency of operation needed for FPGA processor; Artificial debugging circuit provides program software to download and debug port; FPGA processor obtains high-speed AD converter, digital sensors and digital quantity I/O information data, FPGA processor adopts data bus to communicate with arm processor with address bus, it resolves the instruction of the intelligent control unit execution intelligent logical reasoning based on ARM, exports the control signal controlling servomotor and run.
The control signal that the described control module based on FPGA exports exports two parts by pwm signal output and digital I/O signal and forms, the relationship of the two is: the PWM digital signal that FPGA processor exports, signal isolation and voltage transitions is carried out through signal condition unit, realize and power drive unit level match, the whole circuit of disturbing effect produced when driving to avoid motor; Numeral I/O signal exports and directly exports digital I/O information to external equipment, mainly comprises brake signal, alerting signal, digital-scroll technique signal etc.
In the present embodiment, described FPGA processor adopts the XC3S200 chip of Xilinx company, and XilinxXC3S2000 chip is latest generation FPGA product, and this chip has 4320LE logical resource, 216KBlockRAM, 173 user I/O (universal input output).Have the advantages such as volume is little, integrated level is high, speed is fast, online modification programming is convenient, the frequency being operated in 50MHz that this chip can be stable, meets technical requirement.
Described high speed analog-to-digital conversion unit comprises high-speed AD converter and power reference circuit: power reference circuit provides reference voltage needed for high-speed AD converter, as+2.5V; High-speed AD converter adopt address bus and data bus realize with based on the data of the control module of FPGA and command communication.
In the present embodiment, described high-speed AD converter adopts AD7608 chip, a high precision 8 of AD7608 chip passage 18 high-speed AD converters, and the inversion frequency of each analog channel is 200kSPS, meets Systematical control requirement; Described power reference circuit adopts AD421 high-accuracy voltage conversion chip.
Described high-speed digital-analog converting unit comprises high-speed AD converter and power reference circuit: power reference circuit provides reference voltage needed for high-speed A/D converter, as+2.5V; High-speed AD converter adopts SPI string line to realize and the data communication based on the control module of FPGA.
In the present embodiment, described high-speed A/D converter adopts DAC7311 chip, and DAC7311 chip, with 12 Dual-channel digital analog converter of buffering benchmark input, has the feature of high precision, Low Drift Temperature, low noise, meets Systematical control requirement; Described power reference circuit adopts AD580 chip, and its+2.5V produced is as high-speed A/D converter reference voltage.
Described signal condition unit is used for realizing analog signals conditioning and digital quantity regulation.
Analog signals conditioning comprises: analog sensor input information conditioning and analog output nurse one's health two parts.As shown in Fig. 2 (a), analog sensor input information conditioning process is as described below: first analog sensor information carry out signal filtering through first-order filtering circuit, then voltage follower circuit is entered, after the input impedance of raising system and signal to noise ratio (S/N ratio), be sent to adder circuit and realize the bilateral adjustment of voltage, be sent to the input range that operation amplifier circuit is adjusted to the requirement of high speed analog-to-digital conversion unit afterwards.Described analog sensor information spinner will comprise: positional information, analog temperature information, current of electric and information of voltage.As shown in Fig. 2 (b), analog output conditioning process is as described below: first the simulating signal that high-speed digital-analog converting unit exports enters adder circuit and realize the bilateral adjustment of analog voltage, then be sent to operational amplifier and realize the level match with external device, reach normalization output voltage range, be finally sent to voltage follower and first-order filtering circuit and reduce output impedance, improve the antijamming capability of signal.
As shown in Figure 3, digital quantity regulation comprises: the conditioning of digital sensors input information, digital quantity input conditioning, digital output nurse one's health three parts.
Digital sensors input information conditioning process is as described below: from the digital sensor signal such as scrambler and temperature sensor first through forming first-order filtering circuit by resistance, electric capacity, after carry out signal isolation through the photoelectric isolating circuit be made up of TLP281-4 chip, finally the information after isolation is sent to data driving chip SM164245 and carries out signal driving, and the information after driving is sent to data bus.
Digital quantity input conditioning process is as described below: first through forming first-order filtering circuit by resistance, electric capacity, after carry out signal shaping through the shaping circuit be made up of this schmitt trigger 74LS14 chip, finally the information after shaping is sent to data driving chip SM164245 and carries out signal driving, and the information after driving is sent to data bus.
Digital output conditioning process is as described below: from the digital information of the control module based on FPGA first through data driving chip SM164245, signal after driving is divided into two parts, the difference channel of part information through being made up of AM26LS31, is converted to differential signal and exports by signal; The signal drive circuit of another part through being made up of TD62083, exports the drive singal strengthened.
Described data storage cell comprises FLASH flash memories and SDRAM Synchronous Dynamic Random Access Memory: data storage cell is connected with arm processor with data bus by address bus, and each storage unit selects control signal to be connected with ARM control line by special reading and writing, sheet.
In the present embodiment, FLASH adopts two panels FLASH chip totally 512 megabits, for solidifying boot and built-in application program; SDRAM employing two panels SDRAM chip totally 512 megabits, for storing and process data, and realize the built-in application program loading after powering on.Two panels FLASH chip is connected with arm processor with data bus by address bus with two panels SDRAM chip.Based on the external memory interface realization of intelligent control unit by arm processor and the read-write of data storage cell data and instruction of ARM, it stores operating structure as shown in Figure 4.
Described man-machine interaction unit comprises charactron, pilot lamp and button: the working status parameter information of numeral method current servo driver and human-machine interactive information; The duty of pilot lamp instruction servo-driver; Peripheral operation is by key-press input servo-driver device controling parameters.In the present embodiment, charactron adopts 4 common anode pole charactrons; Pilot lamp adopts straight cutting light emitting diode.
Described external network communication unit is used for transmission based on the communication data between the intelligent control unit of ARM and external network peripheral hardware and instruction and reception, comprises CAN, RS485 bus and RS232 bus: the corresponding MCP2551 bus transceiver of CAN; The corresponding MAX1487 bus transceiver of RS485 bus; The corresponding MAX232 bus transceiver of RS232 bus.
Described passive crystal oscillator unit comprises passive crystal oscillator chip and electric capacity, for arm processor provides frequency of operation, as 12MHz; For FPGA processor provides frequency of operation, as 50MHz; For network service work provides hour hands signal, as 12MHz.
Described debugging emulation unit, for providing the intelligent control unit based on ARM and the control module debugging emulation interface based on FPGA, realizes emulation and the download of program.Debugging emulation unit comprises debugging storage chip, resistance and electric capacity, and described debugging storage chip adopts XCF08PVOG48C chip.
Described sensor information unit comprises digital sensors and analog sensor: digital sensors is for gathering incremental encoder information, the absolute type encoder information and digital sensor information etc. of two motors; Analog sensor is for gathering analog positional information, analog temperature information, analog quantity external control information etc.
Described power drive unit comprises power drive Circuit tuning, power drive chip and power drive device: send PWM control information by the control module based on FPGA; This information delivers to power drive chip after power drive Circuit tuning; Power drive chip signal output Direct driver power drive device realizes motor and drives.
In the present embodiment, control module and power drive unit based on FPGA adopt flexible board to be connected.Described power drive Circuit tuning is made up of diode, stabilivolt, precision resistance, current-limiting resistance, according to needing selected diode and precision resistance numerical value, realizes the power protection of power drive hardware.Described power drive chip adopts Infineon company 1ED020I12-B2,1ED020I12-B2 is a impulsive quarantine type driving chip, have stronger antijamming capability, driving voltage is+15V and-8V, can suppress power driver module voltage change ratio and current changing rate preferably.Magnificent core micro semiconductor HRM250D type N-channel MOS FET selected by described power drive device, and it has, and quality is light, conducting resistance is little, be easy to driving, withstand voltage advantages of higher, and its hermetic metal mold that has been encapsulated as encapsulates.
As shown in Figure 5, described power protecting circuit comprises: overvoltage crowbar, under-voltage protecting circuit, current foldback circuit and temperature protection circuit.Overvoltage, under-voltage, overcurrent, temperature protection directly can realize power drive protection by hardware signal conditioning, meanwhile, also by digital signal conditioning, directly based on the control module of FPGA, realize power protection by Digital Logic control software design resist technology.
In the present embodiment; overvoltage crowbar and under-voltage protecting circuit are made up of resistance, electric capacity, voltage comparator; when producing overvoltage, under-voltage signal, comparer exports respectively " 0 " and " 1 " signal, and this signal is connected to power drive chip controls and realizes hardware protection.In current foldback circuit, current sense chip adopts the IR2175 chip of IR company, this chip not only have interface circuit simple, with the advantage of PWM mode output current signal, also provide the functions such as overcurrent protection function.Temperature protection circuit adopts high precision DS18B20 chip, and for the temperature during measuring internal drive, this sensor has that volume is little, precision is high, the simple feature of wiring.
Described Power Management Unit comprises multiple power sources modular converter and filtering circuit, and power transfer module is mainly divided into the large class of control power supply, driving power, probe power, electrical source of power four.Control power supply and mainly system input voltage is converted to arm processor, FPGA processor, sensor and communication system operating voltage; Probe power mainly will provide current potential to analog sensor and digital sensors; Driving power provides voltage to power drive chip; Power input power is consistent with external input power, and Power output power supply is exported by analog line driver and picks out.Electric pressure is mainly divided into+24V ,+15V ,-15V ,+12V ,+5V ,+3.3V ,+1.8V ,+1.5V ,+1.3V nine type.Arm processor power module corresponds to LM117-3.3, LM117ADJ-1.3; FPFA processor power supply module corresponds to LM117-3.3, LT1587-1.5 and TPS79401; Driving power corresponds to ZHDC28D0815; Communication isolating power supply corresponds to NKE0505SC; Probe power corresponds to ZHDC28D05 and ZHDC28D15; System voltage grade transition diagram as shown in Figure 6.Filtering circuit is made up of tantalum electric capacity and ceramic disc capacitor, for the filtering of power supply.Relation between it is: the tantalum electric capacity in filtering circuit and ceramic disc capacitor are parallel to each power transfer module constrained input port.
Claims (6)
1. a Dual Drive mixed type DC low-voltage Intelligent servo drive circuit, comprises based on control system, and it is for gathering analog quantity and digital information, exports Based Intelligent Control result by logical operation; It is characterized in that: also comprise based on the intelligent control unit of ARM, high speed analog-to-digital conversion unit, high-speed digital-analog converting unit, data storage cell, signal condition unit, external network communication unit, Power Management Unit, debugging emulation unit, passive crystal oscillator unit, man-machine interaction unit, sensor information unit, Based Intelligent Control output unit, power protected location and power drive unit; Its annexation is:
Its annexation is:
Sensor information unit gathers analog sensor information and digital sensors information, and above-mentioned information is passed to the conditioning of signal condition unit; Analog information after conditioning carries out through high speed analog-to-digital conversion unit the control module that exports to after analog to digital conversion based on FPGA, and the numerical information after conditioning directly exports the control module based on FPGA to; Based on FPGA control module by input information by data bus and address bus, be sent to the intelligent control unit based on ARM; Information is stored into data storage cell by the intelligent control unit based on ARM, and calls corresponding data and carry out intelligent logical reasoning in conjunction with external network communication unit information; After intelligent logical reasoning terminates, steering order is sent to control module based on FPGA by data bus and address bus by the intelligent control unit based on ARM; Control module based on FPGA resolves steering order, solve the control signal that servomotor runs, control signal exports power drive unit to and drives two power drive units simultaneously after the conditioning of signal condition unit, thus realizes accurately controlling motor operation; Information after resolving is exported by Based Intelligent Control output unit by the control module based on FPGA: discrete control information directly exports after the conditioning of signal condition unit, numeral I/O signal directly exports after the conditioning of signal condition unit, and Analog control information carries out digital-to-analog conversion through high-speed digital-analog converting unit successively, signal condition unit exports after nursing one's health again; In system works, power protected location real-time detecting system voltage, electric current, temperature information, provide the defencive function of drive circuit; Passive crystal oscillator unit is supplied to the intelligent control unit based on ARM and the control module work hour hands frequency based on FPGA; Power Management Unit is supplied to the intelligent control unit based on ARM and the control module voltage signal based on FPGA; Debugging emulation unit is supplied to the intelligent control unit based on ARM and the control module debugging emulation interface based on FPGA, realizes emulation and the download of program; Network communication unit provides network communication interface, realizes servo-driver and communicates with external communication network, provides system status information and transmitting control parameters; Man-machine interaction unit realizes the input of system control parameters and the selection of controlling functions.
2. a kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit according to claim 1, is characterized in that:
The described intelligent control unit based on ARM comprises arm processor, power-switching circuit, passive crystal oscillating circuit and artificial debugging circuit: power-switching circuit provides the normal voltage required for arm processor; Passive crystal oscillating circuit provides the frequency of operation required for arm processor; Artificial debugging circuit provides ARM program software to download and emulation interface; Arm processor realizes transmission and the storage of data and instruction respectively by data bus and address bus with data storage cell.
3. a kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit according to claim 2, is characterized in that:
The described control module based on FPGA comprises FPGA processor, power-switching circuit, passive crystal oscillating circuit and artificial debugging circuit: power-switching circuit provides FPGA processor required voltage; Passive crystal oscillating circuit provides frequency of operation needed for FPGA processor; Artificial debugging circuit provides program software to download and debug port; FPGA processor obtains high-speed AD converter, digital sensors and digital quantity I/O information data, FPGA processor adopts data bus to communicate with arm processor with address bus, it resolves the instruction of the intelligent control unit execution intelligent logical reasoning based on ARM, exports the control signal controlling servomotor and run.
4. a kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit according to claim 3, it is characterized in that: the control signal that the described control module based on FPGA exports is exported by pwm signal and I/O signal input and output two parts form: the PWM digital signal that FPGA processor exports, carry out signal isolation and voltage transitions through signal condition unit, realize and power drive unit level match; The input and output of I/O signal are directly to external equipment input and output I/O signal.
5. a kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit according to claim 4, is characterized in that:
Described signal condition unit is used for realizing analog signals conditioning and digital quantity regulation;
Analog signals conditioning comprises: it is as described below that analog sensor input information conditioning and analog output nurse one's health two parts analog sensor input information conditioning process: first analog sensor information carry out signal filtering through first-order filtering circuit, then voltage follower circuit is entered, after the input impedance of raising system and signal to noise ratio (S/N ratio), be sent to adder circuit and realize the bilateral adjustment of voltage, be sent to the input range that operation amplifier circuit is adjusted to the requirement of high speed analog-to-digital conversion unit afterwards; Described analog sensor information spinner will comprise: positional information, analog temperature information, current of electric and information of voltage; Analog output conditioning process is as described below: first the simulating signal that high-speed digital-analog converting unit exports enters adder circuit and realize the bilateral adjustment of analog voltage, then be sent to operational amplifier and realize the level match with external device, reach normalization output voltage range, be finally sent to voltage follower and first-order filtering circuit and reduce output impedance, improve the antijamming capability of signal;
Digital quantity regulation comprises: the conditioning of digital sensors input information, digital quantity input conditioning, digital output nurse one's health three parts;
Digital sensors input information conditioning process is as described below: digital sensor signal is successively after first-order filtering circuit, photoelectric isolating circuit carry out filtering and signal isolation, be sent to data driving chip and carry out signal driving, and the information after driving is sent to data bus;
Digital quantity input conditioning process is as described below: digital quantity signal, successively after first-order filtering circuit, shaping circuit carry out filtering and signal shaping, is sent to data driving chip and carries out signal driving, and the information after driving is sent to data bus;
Digital output conditioning process is as described below: the digital information from the control module based on FPGA carries out signal driving through data driving chip, signal after driving is divided into two parts, part information is converted to differential signal through difference channel and exports, the drive singal strengthened, through signal drive circuit, exports by another part.
6. a kind of Dual Drive mixed type DC low-voltage Intelligent servo drive circuit according to claim 5, is characterized in that:
Described high speed analog-to-digital conversion unit comprises high-speed AD converter and power reference circuit: power reference circuit provides reference voltage needed for high-speed AD converter; High-speed AD converter adopt address bus and data bus realize with based on the data of the control module of FPGA and command communication;
Described high-speed digital-analog converting unit comprises high-speed AD converter and power reference circuit: power reference circuit provides reference voltage needed for high-speed A/D converter; High-speed AD converter adopts SPI string line to realize and the data communication based on the control module of FPGA;
Described data storage cell adopts FLASH flash memories and SDRAM Synchronous Dynamic Random Access Memory;
Described power drive unit comprises power drive Circuit tuning, power drive chip and power drive device: send PWM control information by the control module based on FPGA; This information delivers to power drive chip after power drive Circuit tuning; Power drive chip signal output Direct driver power drive device realizes motor and drives.
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