CN105207659A - Detecting circuit - Google Patents

Detecting circuit Download PDF

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Publication number
CN105207659A
CN105207659A CN201510520030.XA CN201510520030A CN105207659A CN 105207659 A CN105207659 A CN 105207659A CN 201510520030 A CN201510520030 A CN 201510520030A CN 105207659 A CN105207659 A CN 105207659A
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China
Prior art keywords
transistor
coupled
control end
control
branch road
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Granted
Application number
CN201510520030.XA
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Chinese (zh)
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CN105207659B (en
Inventor
李永胜
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Shanghai Zhaoxin Semiconductor Co Ltd
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Shanghai Zhaoxin Integrated Circuit Co Ltd
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Publication of CN105207659A publication Critical patent/CN105207659A/en
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/0038—Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller (comparing pulses or pulse trains according to amplitude)
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant

Abstract

A detecting circuit detects an external device with a specific resistance. The detecting circuit comprises a first resistor, a second resistor, a first converter, a second converter, a device converter, a first current comparator and a second current comparator. The first resistor has a first resistance. The second resistor has a second resistance. The first converter converts the first resistance to a first current. The second converter converts the second resistance to a second current. The device converter converts the specific resistance to a specific current. The first current comparator compares the specific current with the first current and generates a first output signal. The second current comparator compares the specific current with the second current and generates a second output signal. The detecting circuit has advantages of improving performance of the detecting circuit and reducing dimension of the circuit.

Description

Circuit for detecting
Technical field
The present invention about a kind of circuit for detecting, particularly about the circuit for detecting that accurately can detect the resistance value of external device.
Background technology
In the field of mobile device, circuit for detecting is widely used for the kind judging any external device that mobile device connects.Tradition circuit for detecting generally includes transistor, and it is as the switch controlling detecting flow process.But imperfect and have a small amount of resistance value due to this kind of switch, they often can cause detecting mistake, and reduce the performance of circuit for detecting.The resistance value of aforementioned transistor can be close to by significantly increasing transistor size to be eliminated completely, but this kind of solution is not then suitable for the mobile device of some miniaturizations.So, be necessary to design a kind of brand-new circuit for detecting, to overcome prior art institute problems faced.
Summary of the invention
In the preferred embodiment, the invention provides a kind of circuit for detecting, for detecting an external device with a specific resistance value, and comprise: one first resistor, there is one first resistance value; One second resistor, has one second resistance value; One first transducer, is converted into one first electric current by this first resistance value; One second transducer, is converted into one second electric current by this second resistance value; One device transducer, is converted into a specific currents by this specific resistance value; One first current comparator, makes comparisons this specific currents and this first electric current, and produces one first output signal according to this; And one second current comparator, this specific currents and this second electric current are made comparisons, and produces one second output signal according to this; Wherein this specific resistance value is judged out according to this first output signal and this second output signal.
In certain embodiments, each of this device transducer, this first transducer and this second transducer comprises: a first transistor, have a control end, a first end and one second end, wherein this first end of this first transistor is coupled to a supply current potential; One transistor seconds, there is a control end, a first end and one second end, wherein this first end of this transistor seconds is coupled to this second end of this first transistor, and this second end of this transistor seconds is coupled to the correspondence one of this external device, this first resistor and this second resistor; One third transistor, have a control end, a first end and one second end, wherein this control end of this third transistor is coupled to this control end of this first transistor, and this first end of this third transistor is coupled to this supply current potential; And one the 4th transistor, there is a control end, a first end and one second end, wherein this control end of the 4th transistor is coupled to this control end of this transistor seconds, this first end of 4th transistor is coupled to this second end of this third transistor, and this second end of the 4th transistor is coupled to this control end of the 4th transistor, to export the correspondence one of this specific currents, this first electric current and this second electric current.
In certain embodiments, this circuit for detecting also comprises: a power-saving circuit, produces a control signal, with optionally activation and this device transducer of forbidden energy, this first transducer and this second transducer.
In certain embodiments, this device transducer, this first transducer and this second transducer are all periodically enabled, and are disabled after this first output signal and this second output signal produce.
In certain embodiments, each of this device transducer, this first transducer and this second transducer also comprises: one the 5th transistor, there is a control end, a first end and one second end, wherein this control end of the 5th transistor is for receiving this control signal, this first end of 5th transistor is coupled to this supply current potential, and this second end of the 5th transistor is coupled to this control end of this first transistor; And one the 6th transistor, there is a control end, a first end and one second end, wherein this control end of the 6th transistor is for receiving this control signal, this first end of 6th transistor is coupled to this second end of this first transistor, and this second end of the 6th transistor is coupled to this control end of this first transistor.
In certain embodiments, each of this first current comparator and this second current comparator comprises: one the 7th transistor, and have a control end, a first end and one second end, wherein this first end of the 7th transistor is coupled to an earthing potential; One the 8th transistor, have a control end, a first end and one second end, wherein this first end of the 8th transistor is coupled to this earthing potential; One the 9th transistor, there is a control end, a first end and one second end, wherein this control end of the 9th transistor is coupled to this second end of the 8th transistor, this first end of 9th transistor is coupled to a supply current potential, and this second end of the 9th transistor is coupled to this second end of the 7th transistor; The tenth transistor, there is a control end, a first end and one second end, wherein this control end of the tenth transistor is coupled to this second end of the 7th transistor, this first end of tenth transistor is coupled to this supply current potential, and this second end of the tenth transistor is coupled to this second end of the 8th transistor; One first inverter, has an input and an output, and wherein this input of this first inverter is coupled to this second end of the 7th transistor; One first compares branch road, between this control end being coupled to this earthing potential and the 7th transistor, and for conducting the electric current come by this specific currents mirror; One second compares branch road, between this control end being coupled to this supply current potential and the 7th transistor, and for conducting the electric current come by correspondence mirror of this first electric current and this second electric current; One the 3rd compares branch road, between this control end being coupled to this earthing potential and the 8th transistor, and for conducting the electric current come by correspondence mirror of this first electric current and this second electric current; And one the 4th compares branch road, between this control end being coupled to this supply current potential and the 8th transistor, and for conducting the electric current come by this specific currents mirror; Wherein this output of this first inverter is for exporting the correspondence one of this first output signal and this second output signal.
In certain embodiments, each of this first current comparator and this second current comparator also comprises: one first is sink to source branch road, be coupled between this supply current potential and this earthing potential, and to this for this specific currents of mirror first compare branch road and the 4th and compare branch road; And one second is sink to source branch road, be coupled between this supply current potential and this earthing potential, and to this for the correspondence one of this first electric current of mirror and this second electric current second compare branch road and the 3rd and compare branch road.
In certain embodiments, each of this first current comparator and this second current comparator also comprises: one first input branch road, receives this specific currents, and this specific currents of mirror first is sink to source branch road to this; And one second input branch road, receive the correspondence one of this first electric current and this second electric current, and the correspondence one of this first electric current of mirror and this second electric current second is sink to source branch road to this.
In certain embodiments, this first compares branch road and comprises: 1 the 17 transistor, and have a control end, a first end and one second end, wherein this second end of the 17 transistor is coupled to this control end of the 7th transistor; And 1 the 18 transistor, have a control end, a first end and one second end, wherein this first end of the 18 transistor is coupled to this earthing potential, and this second end of the 18 transistor is coupled to this first end of the 17 transistor; Wherein the 4th compares branch road and comprises: one the 29 transistor, there is a control end, a first end and one second end, wherein this first end of the 29 transistor is coupled to this supply current potential, and this second end of the 29 transistor is coupled to this control end of the 29 transistor; And one the 30 transistor, there is a control end, a first end and one second end, wherein this first end of the 30 transistor is coupled to this control end of the 29 transistor, and this second end of the 30 transistor is coupled to this control end of the 8th transistor.
In certain embodiments, this first is sink to source branch road and comprises: 1 the 13 transistor, there is a control end, a first end and one second end, wherein this control end of the 13 transistor is coupled to this control end of the 29 transistor, and this first end of the 13 transistor is coupled to this supply current potential; The 14 transistor, there is a control end, a first end and one second end, wherein this control end of the 14 transistor is coupled to this control end of the 30 transistor, this first end of 14 transistor is coupled to this second end of the 13 transistor, and this second end of the 14 transistor is coupled to this control end of the 30 transistor; The 15 transistor, there is a control end, a first end and one second end, wherein this control end of the 15 transistor is coupled to this control end of the 17 transistor, and this second end of the 15 transistor is coupled to this control end of the 30 transistor; And 1 the 16 transistor, there is a control end, a first end and one second end, wherein this control end of the 16 transistor is coupled to this control end of the 18 transistor, this first end of 16 transistor is coupled to this earthing potential, and this second end of the 16 transistor is coupled to this control end of the 16 transistor.
In certain embodiments, this the first input branch road comprises: 1 the 11 transistor, there is a control end, a first end and one second end, wherein this control end of the 11 transistor is coupled to this control end of the 15 transistor, and this second end of the 11 transistor is coupled to this control end of the 11 transistor; And 1 the tenth two-transistor, there is a control end, a first end and one second end, wherein this control end of the tenth two-transistor is coupled to this control end of the 16 transistor, this first end of tenth two-transistor is coupled to this earthing potential, and this second end of the tenth two-transistor is coupled to this first end of the 11 transistor; Wherein this second end of the 11 transistor is for receiving this specific currents.
In certain embodiments, this second compares branch road and comprises: 1 the 19 transistor, there is a control end, a first end and one second end, wherein this first end of the 19 transistor is coupled to this supply current potential, and this second end of the 19 transistor is coupled to this control end of the 19 transistor; And one the 20 transistor, there is a control end, a first end and one second end, wherein this first end of the 20 transistor is coupled to this second end of the 19 transistor, and this second end of the 20 transistor is coupled to this control end of the 7th transistor; Wherein the 3rd compares branch road and comprises: one the 27 transistor, and have a control end, a first end and one second end, wherein this second end of the 27 transistor is coupled to this control end of the 8th transistor; And one the 28 transistor, there is a control end, a first end and one second end, wherein this first end of the 28 transistor is coupled to this earthing potential, and this second end of the 28 transistor is coupled to this first end of the 27 transistor.
In certain embodiments, this second is sink to source branch road and comprises: one the 23 transistor, there is a control end, a first end and one second end, wherein this control end of the 23 transistor is coupled to this control end of the 19 transistor, and this first end of the 23 transistor is coupled to this supply current potential; One the 24 transistor, there is a control end, a first end and one second end, wherein this control end of the 24 transistor is coupled to this control end of the 20 transistor, this first end of 24 transistor is coupled to this second end of the 23 transistor, and this second end of the 24 transistor is coupled to this control end of the 24 transistor; One the 25 transistor, there is a control end, a first end and one second end, wherein this control end of the 25 transistor is coupled to this control end of the 27 transistor, and this second end of the 25 transistor is coupled to this second end of the 24 transistor; And one the 26 transistor, there is a control end, a first end and one second end, wherein this control end of the 26 transistor is coupled to this control end of the 28 transistor, this first end of 26 transistor is coupled to this earthing potential, and this second end of the 26 transistor is coupled to this control end of the 26 transistor.
In certain embodiments, this the second input branch road comprises: one the 21 transistor, there is a control end, a first end and one second end, wherein this control end of the 21 transistor is coupled to this control end of the 25 transistor, and this second end of the 21 transistor is coupled to this control end of the 21 transistor; And one the 20 two-transistor, there is a control end, a first end and one second end, wherein this control end of the 20 two-transistor is coupled to this control end of the 26 transistor, this first end of 20 two-transistor is coupled to this earthing potential, and this second end of the 20 two-transistor is coupled to this first end of the 21 transistor; Wherein this second end of the 21 transistor is for receiving the correspondence one of this first electric current and this second electric current.
The present invention can not only promote the performance of circuit for detecting, also can reduce circuit size.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the circuit for detecting of display according to one embodiment of the invention;
Fig. 2 is the schematic diagram of the circuit for detecting of display according to one embodiment of the invention;
Fig. 3 is the signal waveforms of display according to one embodiment of the invention;
Fig. 4 is device transducer, first transducer, second transducer of display according to one embodiment of the invention, or the schematic diagram of the 3rd transducer;
Fig. 5 A is first current comparator, second current comparator of display according to one embodiment of the invention, or the schematic diagram of the 3rd current comparator;
Fig. 5 B is first current comparator, second current comparator of display according to one embodiment of the invention, or the schematic diagram of the 3rd current comparator; And
Fig. 6 is the schematic diagram of the circuit for detecting of display according to another embodiment of the present invention.
Wherein, being simply described as follows of symbol in accompanying drawing:
100,200,600 ~ circuit for detecting; 120 ~ external device; 131 ~ the first transducers; 132 ~ the second transducers; 133 ~ three transducer; 140 ~ device transducer; 151 ~ the first current comparators; 152 ~ the second current comparators; 153 ~ three current comparator; 160 ~ power-saving circuit; 510 ~ the first input branch roads; 520 ~ the second input branch roads; 511 ~ the first are sink to source branch road; 522 ~ the second are sink to source branch road; 531 ~ the first compare branch road; 532 ~ the second compare branch road; 533 ~ three compares branch road; 534 ~ four compares branch road; 561 ~ the first inverters; 610 ~ potential comparator; 621 ~ the first switchs; 622 ~ the second switchs; 623 ~ three switch; I1 ~ the first electric current; I2 ~ the second electric current; I3 ~ the 3rd electric current; IE ~ specific currents; IX ~ the first input current; IY ~ the second input current; M1 ~ the first transistor; M2 ~ transistor seconds; M3 ~ third transistor; M4 ~ the 4th transistor; M5 ~ the 5th transistor; M6 ~ the 6th transistor; M7 ~ the 7th transistor; M8 ~ the 8th transistor; M9 ~ the 9th transistor; M10 ~ the tenth transistor; M11 ~ the 11 transistor; M12 ~ the tenth two-transistor; M13 ~ the 13 transistor; M14 ~ the 14 transistor; M15 ~ the 15 transistor; M16 ~ the 16 transistor; M17 ~ the 17 transistor; M18 ~ the 18 transistor; M19 ~ the 19 transistor; M20 ~ the 20 transistor; M21 ~ the 21 transistor; M22 ~ the 20 two-transistor; M23 ~ the 23 transistor; M24 ~ the 24 transistor; M25 ~ the 25 transistor; M26 ~ the 26 transistor; M27 ~ the 27 transistor; M28 ~ the 28 transistor; M29 ~ the 29 transistor; M30 ~ the 30 transistor; N1 ~ first node; N2 ~ Section Point; N3 ~ the 3rd node; N4 ~ the 4th node; N5 ~ the 5th node; N6 ~ the 6th node; N7 ~ the 7th node; N8 ~ the 8th node; N9 ~ the 9th node; N10 ~ protelum point; N11 ~ the 11 node; N12 ~ the 12 node; N13 ~ the 13 node; N14 ~ the 14 node; N15 ~ the 15 node; N16 ~ the 16 node; N17 ~ the 17 node; N18 ~ the 18 node; N19 ~ the 19 node; N20 ~ the 20 node; NC1 ~ the first Controlling vertex; NC2 ~ the second Controlling vertex; O1 ~ the first outputs signal; O2 ~ the second outputs signal; O3 ~ three outputs signal; OUT ~ output; R1 ~ the first resistor; R2 ~ the second resistor; R3 ~ the 3rd resistor; REX ~ device resistor; SA ~ initial signal; SB ~ stop signal; SC ~ control signal; T1 ~ very first time point; T2 ~ the second time point; VC ~ output signal; VDD ~ supply current potential; VREF ~ reference potential; VO ~ output potential; VSS ~ earthing potential.
Embodiment
For object of the present invention, feature and advantage can be become apparent, cited below particularly go out specific embodiments of the invention, and coordinate institute's accompanying drawings, be described in detail below.
Fig. 1 is the schematic diagram of the circuit for detecting 100 of display according to one embodiment of the invention.Circuit for detecting 100 can be applicable to a mobile device, such as: a smart mobile phone (Smartphone), a flat computer (TabletComputer), or a notebook (NotebookComputer).When an external device 120 is connected to mobile device (such as, by a micro universal serial bus (MicroUniversalSerialBus of mobile device, Micro-USB) port), arrangement for detecting 100 can detect a specific resistance value (such as, this external device 120 can be modeled as a device resistor REX) of external device 120.The kind of outer assembling device 120 can be judged according to specific resistance value by a processor (not shown).In the embodiment in figure 1, circuit for detecting 100 comprises one first resistor R1, one second resistor R2, one first transducer (Converter) 131,1 second transducer 132, device transducer 140,1 first current comparator (CurrentComparator) 151 and one second current comparator 152.First resistor R1 has one first resistance value.Second resistor R2 has one second resistance value.Second resistance value can be different from the first resistance value.First resistance value can be converted into one first electric current I 1 by the first transducer 131.Second resistance value can be converted into one second electric current I 2 by the second transducer 132.Specific resistance value can be converted into a specific currents IE by device transducer 140.First current comparator 151 makes comparisons specific currents IE and the first electric current I 1, and produces one first output signal O1 according to this.Second current comparator 152 makes comparisons specific currents IE and the second electric current I 2, and produces one second output signal O2 according to this.By reading the first output signal O1 and second output signal O2, processor can estimate the specific resistance value of external device 120, to obtain kind and the information of external device 120.
Fig. 2 is the schematic diagram of the circuit for detecting 200 of display according to one embodiment of the invention.Fig. 2 with Fig. 1 is similar, and both difference is, arrangement for detecting 200 also comprises one the 3rd resistor R3, one the 3rd transducer 133, the 3rd current comparator 153 and a power-saving circuit 160.3rd resistor R3 has one the 3rd resistance value.3rd resistance value can be neither same with the first resistance value, the second resistance value.3rd resistance value can be converted into one the 3rd electric current I 3 by the 3rd transducer 133.3rd current comparator 153 makes comparisons specific currents IE and the 3rd electric current I 3, and produces one the 3rd output signal O3 according to this.First output signal O1, the second output signal O2 and the 3rd output signal O3 used by processor, and for the specific resistance value that determines external device 120 and kind.It is to be understood that resistor, the transducer in previous embodiment, or the quantity of current comparator all non-be restrictive condition of the present invention.In other embodiments, circuit for detecting 200 also can comprise the current comparator of the resistor of more than three, the transducer of more than three and more than three, to estimate the specific resistance value of external device 120 more accurately.
Power-saving circuit 160 can produce a control signal SC, with optionally activation (Enable) and forbidden energy (Disable) device transducer 140, first transducer 131, second transducer 132 and the 3rd transducer 133.Control signal SC can according to carrying out an initial signal SA of a self processor and stop signal SB and producing.For example, the exportable initial signal SA of processor, to require that each current comparator produces output signal, then, when all success is received by processor output signal, processor exports stop signal SB again.Such as, whether processor periodically can produce initial signal SA (such as, each millisecond, or each second), have an external device 120 to be connected immediately to detect.Fig. 3 is the signal waveforms of display according to one embodiment of the invention, wherein horizontal axis plots time, and the potential level of longitudinal axis representation signal.At very first time point T1, when initial signal SA rises to high logic level (such as: logical one) by low logic level (such as: logical zero), control signal SC also rises to high logic level by low logic level.Then, at the second time point T2, when stop signal SB rises to high logic level by low logic level, control signal SC drops to low logic level by high logic level.Can be considered between a comparable period during very first time point T1 and the second time point T2, be maintained at high logic level in wherein control signal SC.Power-saving circuit 160 only in interior activation device transducer 140, first transducer 131, second transducer 132 of aforementioned comparable period and the 3rd transducer 133, thus can reduce the total power consumption value of circuit for detecting 200.
The structure of aforesaid transducer, current comparator will describe in detail in the following example.It is to be understood that these structures are used for citing, but not for limiting the scope of the invention.
Fig. 4 is device transducer 140, first transducer 131, second transducer 132 of display according to one embodiment of the invention, or the schematic diagram of the 3rd transducer 133.In the fig. 4 embodiment, each of device transducer 140, first transducer 131, second transducer 132 and the 3rd transducer 133 all at least comprises a first transistor (Transistor) M1, a transistor seconds M2, a third transistor M3 and the 4th transistor M4.The first transistor M1, transistor seconds M2, third transistor M3 and the 4th transistor M4 can be P-type mos field-effect transistor (P-channelMetal-Oxide-SemiconductorField-EffectTransistor, PMOSFET, is called for short PMOS transistor).The first transistor M1 has a control end, a first end and one second auspicious, wherein the control end of the first transistor M1 is coupled to a first node N1, the first end of the first transistor M1 is coupled to a supply current potential VDD, and second end of the first transistor M1 is coupled to a Section Point N2.Transistor seconds M2 has a control end, a first end and one second auspicious, wherein the control end of transistor seconds M2 is coupled to one the 3rd node N3, the first end of transistor seconds M2 is coupled to Section Point N2, and second end of transistor seconds M2 is coupled to the correspondence one of external device 120, first resistor R1, the second resistor R2 and the 3rd resistor R3.Such as, if Fig. 4 is the circuit structure for describing device transducer 140, then second end of transistor seconds M2 is coupled to an earthing potential VSS via external device 120, if Fig. 4 is the circuit structure for describing the first transducer 131, then second end of transistor seconds M2 is coupled to earthing potential VSS via the first resistor R1, and the rest may be inferred.Third transistor M3 has a control end, a first end and one second end, wherein the control end of third transistor M3 is coupled to first node N1, the first end of third transistor M3 is coupled to supply current potential VDD, and second end of third transistor M3 is coupled to one the 4th node N4.4th transistor M4 has a control end, a first end and one second end, wherein the control end of the 4th transistor M4 is coupled to the 3rd node N3, the first end of the 4th transistor M4 is coupled to the 4th node N4, and second end of the 4th transistor M4 is coupled to the 3rd node N3.3rd node N3 is for exporting the correspondence one of specific currents IE, the first electric current I 1, second electric current I 2 and the 3rd electric current I 3.Such as, if Fig. 4 is the circuit structure for describing device transducer 140, then the 3rd node N3 is for exporting specific currents IE, if Fig. 4 is the circuit structure for describing the first transducer 131, then the 3rd node N3 is for exporting the first electric current I 1, and the rest may be inferred.As from the foregoing, by operative installations transducer 140, first transducer 131, second transducer 132 and the 3rd transducer 133, then can by second resistance value of first resistance value of the specific resistance value of external device 120, the first resistor R1, the second resistor R2, and the 3rd resistance value of the 3rd resistor R3 is converted into specific currents IE, the first electric current I 1, second electric current I 2 and the 3rd electric current I 3 respectively.For each transducer, if the current value of output current is relatively little, then the relation between resistance value and output current can roughly represented by following equation (1):
I ≈ V D D - 2 × V t R ... ( 1 )
Wherein, I represents the correspondence one of specific currents IE, the first electric current I 1, second electric current I 2 and the 3rd electric current I 3, VDD representative supply current potential VDD, Vt represents the first transistor M1, transistor seconds M2, third transistor M3, or the 4th critical potential (ThresholdVoltage) of transistor M4, and R represents the correspondence one of specific resistance value, the first resistance value, the second resistance value and the 3rd resistance value.
In further embodiments, each of device transducer 140, first transducer 131, second transducer 132 and the 3rd transducer 133 all also comprises one the 5th transistor M5 and the 6th transistor M6, to form aforesaid power-saving circuit 160.5th transistor M5 can be P-type mos field-effect transistor, and the 6th transistor M6 can be N-type metal oxide semiconductcor field effect transistor (N-channelMetal-Oxide-SemiconductorField-EffectTransistor, NMOSFET, is called for short nmos pass transistor).5th transistor M5 has a control end, a first end and one second end, wherein the control end of the 5th transistor M5 is used for reception control signal SC, the first end of the 5th transistor M5 is coupled to supply current potential VDD, and second end of the 5th transistor M5 is coupled to first node N1.6th transistor M6 has a control end, a first end and one second end, wherein the control end of the 6th transistor M6 is used for reception control signal SC, the first end of the 6th transistor M6 is coupled to Section Point N2, and second end of the 6th transistor M6 is coupled to first node N1.When control signal SC is low logic level, the current potential of first node N1 is pulled up to high logic level by the 5th transistor M5, causes the first transistor M1 and third transistor M3 not conductings.In the case, electric current cannot flow through the first transistor M1 and third transistor M3, electric current is not had to be exported by second end of the 4th transistor M4 yet, therefore, device transducer 140, first transducer 131, second transducer 132 and the 3rd transducer 133 are all disabled (that is, be in a standby mode or a sleep pattern).Otherwise when control signal SC is high logic level, first node N1 is coupled to Section Point N2, the first transistor M1 and third transistor M3 is caused to form a current mirror (CurrentMirror).In the case, electric current can flow through the first transistor M1 and third transistor M3, therefore, device transducer 140, first transducer 131, second transducer 132 and the 3rd transducer 133 are all enabled (that is, be in a normal mode or a mode of operation).Output current according to equation (1) can be produced by aforementioned manner, and wherein output current corresponds to the resistance value of second end of transistor seconds M2.
It is to be understood that device transducer 140, first transducer 131, second transducer 132, second transducer 133 does not share any element (such as: the first transistor M1, transistor seconds M2 etc.) to each other.Use duplicate numbers to carry out marked element, be only and allow these circuit of reader's easy to understand have similar framework and the identical element of part.In fact, the element of device transducer 140, first transducer 131, second transducer 132, second transducer 133 is all mutually independently to each other, does not have reusable situation.
Fig. 5 A, 5B are first current comparator 151, second current comparator 152 of display according to one embodiment of the invention, or the schematic diagram of the 3rd current comparator 153.Please also refer to 5A, 5B figure, they demonstrate the first current comparator 151, second current comparator 152, or two parts be connected to each other of the 3rd current comparator 153.In the embodiment of Fig. 5 A, 5B, each of the first current comparator 151, second current comparator 152 and the 3rd current comparator 153 all comprises one first input branch road 510,1 second and inputs branch road 520,1 first and be sink to source (Sink-to-Source) branch road 511,1 second and be sink to source branch road 522,1 first and compare branch road 531,1 second and compare branch road 532, the 3rd and compare branch road 533 and the 4th and compare branch road 534.First input branch road 510 receives one first input current IX.First input current IX can be specific currents IE.Second input branch road 520 receives one second input current IY.Second input current IY can be the correspondence one of the first electric current I 1, second electric current I 2 and the 3rd electric current I 3.Such as, if Fig. 5 B is the circuit structure for describing the first current comparator 151, then the second input current IY is the first electric current I 1, if Fig. 5 B is the circuit structure for describing the second current comparator 152, then the second input current IY is the second electric current I 2, and the rest may be inferred.First input branch road 510 is sink to source branch road 511 via first and is coupled to first and compares branch road 531 and second and compare branch road 532.One first Controlling vertex NC1 is coupled to first and compares branch road 531 and second and compare between branch road 532.Second input branch road 520 is sink to source branch road 522 via second and is coupled to the 3rd and compares branch road 533 and the 4th and compare branch road 534.One second Controlling vertex NC2 is coupled to the 3rd and compares branch road 533 and the 4th and compare between branch road 534.Each of first current comparator 151, second current comparator 152 and the 3rd current comparator 153 all for comparing its first input current IX and the second input current IY, and produces the correspondence one of the first output signal O1, the second output signal O2 and the 3rd output signal O3 according to this.Such as, if the first input current IX is greater than the second input current IY, then corresponding output signal O1, O2, or O3 will be low logic level, if the first input current IX is less than the second input current IY, then corresponding output signal O1, O2, or O3 will be high logic level.
In certain embodiments, each of the first current comparator 151, second current comparator 152 and the 3rd current comparator 153 all also comprises one the 7th transistor M7, one the 8th transistor M8, one the 9th transistor M9,1 the tenth transistor M10 and one first inverter (Inverter) 561.7th transistor M7 and the 8th transistor M8 can be N-type metal oxide semiconductcor field effect transistor, and the 9th transistor M9 and the tenth transistor M10 can be P-type mos field-effect transistor.7th transistor M7 has a control end, a first end and one second end, wherein the control end of the 7th transistor M7 is coupled to the first Controlling vertex NC1, the first end of the 7th transistor M7 is coupled to earthing potential VSS, and second end of the 7th transistor M7 is coupled to one the 5th node N5.8th transistor M8 has a control end, a first end and one second end, wherein the control end of the 8th transistor M8 is coupled to the second Controlling vertex NC2, the first end of the 8th transistor M8 is coupled to earthing potential VSS, and second end of the 8th transistor M8 is coupled to one the 6th node N6.9th transistor M9 has a control end, a first end and one second end, wherein the control end of the 9th transistor M9 is coupled to the 6th node N6, the first end of the 9th transistor M9 is coupled to supply current potential VDD, and second end of the 9th transistor M9 is coupled to the 5th node N5.Tenth transistor M10 has a control end, a first end and one second end, wherein the control end of the tenth transistor M10 is coupled to the 5th node N5, the first end of the tenth transistor M10 is coupled to supply current potential VDD, and second end of the tenth transistor M10 is coupled to the 6th node N6.First inverter 561 has an input and an output, and wherein the input of the first inverter 561 is coupled to the 5th node N5.In one embodiment, the output of the first inverter 561 is for exporting the correspondence one of the first output signal O1, the second output signal O2 and the 3rd output signal O3, wherein, first inverter 561 also can be used as an output buffer (OutputBuffer), and to export the first output signal O1, the second output signal O2 and the 3rd outputs signal the correspondence one of O3 to processor.Such as, if Fig. 5 A is the circuit structure for describing the first current comparator 151, then the output of the first inverter 561 is for exporting the first output signal O1, if Fig. 5 A is the circuit structure for describing the second current comparator 152, then the output of the first inverter 561 is for exporting the second output signal O2, and the rest may be inferred.In another embodiment, the 6th node N6 can be used for the correspondence one that output first outputs signal O1, the second output signal O2 and the 3rd output signal O3, and now, the first inverter 561 can omit completely from circuit.
In certain embodiments, the first input branch road 510 comprises 1 the 11 transistor M11 and the tenth two-transistor M12.11 transistor M11 and the tenth two-transistor M12 can be N-type metal oxide semiconductcor field effect transistor.11 transistor M11 has a control end, a first end and one second end, wherein the control end of the 11 transistor M11 is coupled to one the 7th node N7, the first end of the 11 transistor M11 is coupled to one the 8th node N8, and second end of the 11 transistor M11 is coupled to the 7th node N7.Tenth two-transistor M12 has a control end, a first end and one second end, wherein the control end of the tenth two-transistor M12 is coupled to one the 9th node N9, the first end of the tenth two-transistor M12 is coupled to earthing potential VSS, and second end of the tenth two-transistor M12 is coupled to the 8th node N8.7th node N7 for receiving the first input current IX, such as: specific currents IE.First input branch road 510 is for being sink to source branch road 511 by the first input current IX mirror to the first.
In certain embodiments, first be sink to source branch road 511 and comprise 1 the 13 transistor M13,1 the 14 transistor M14,1 the 15 transistor M15 and 1 the 16 transistor M16.13 transistor M13 and the 14 transistor M14 can be P-type mos field-effect transistor, and the 15 transistor M15 and the 16 transistor M16 can be N-type metal oxide semiconductcor field effect transistor.13 transistor M13 has a control end, a first end and one second end, wherein the control end of the 13 transistor M13 is coupled to a protelum point N10, the first end of the 13 transistor M13 is coupled to supply current potential VDD, and second end of the 13 transistor M13 is coupled to 1 the 11 node N11.14 transistor M14 has a control end, a first end and one second end, wherein the control end of the 14 transistor M14 is coupled to 1 the 12 node N12, the first end of the 14 transistor M14 is coupled to the 11 node N11, and second end of the 14 transistor M14 is coupled to the 12 node N12.15 transistor M15 has a control end, a first end and one second end, wherein the control end of the 15 transistor M15 is coupled to the 7th node N7, the first end of the 15 transistor M15 is coupled to the 9th node N9, and second end of the 15 transistor M15 is coupled to the 12 node N12.16 transistor M16 has a control end, a first end and one second end, wherein the control end of the 16 transistor M16 is coupled to the 9th node N9, the first end of the 16 transistor M16 is coupled to earthing potential VSS, and second end of the 16 transistor M16 is coupled to the 9th node N9.First is sink to source branch road 511 for being first compare the sink current of branch road 531 and mirror is the 4th source electric current comparing branch road 534 by the sink current mirror from the first input branch road 510.
In certain embodiments, the second input branch road 520 comprises one the 21 transistor M21 and one the 20 two-transistor M22.21 transistor M21 and the 20 two-transistor M22 can be N-type metal oxide semiconductcor field effect transistor.21 transistor M21 has a control end, a first end and one second end, wherein the control end of the 21 transistor M21 is coupled to 1 the 16 node N16, the first end of the 21 transistor M21 is coupled to 1 the 17 node N17, and second end of the 21 transistor M21 is coupled to the 16 node N16.20 two-transistor M22 has a control end, a first end and one second end, wherein the control end of the 20 two-transistor M22 is coupled to 1 the 18 node N18, the first end of the 20 two-transistor M22 is coupled to earthing potential VSS, and second end of the 20 two-transistor M22 is coupled to the 17 node N17.16 node N16 for receiving the second input current IY, such as: the correspondence one of the first electric current I 1, second electric current I 2 and the 3rd electric current I 3.Second input branch road 520 is for being sink to source branch road 522 by the second input current IY mirror to the second.
In certain embodiments, second be sink to source branch road 522 and comprise one the 23 transistor M23, one the 24 transistor M24, one the 25 transistor M25 and one the 26 transistor M26.23 transistor M23 and the 24 transistor M24 can be P-type mos field-effect transistor, and the 25 transistor M25 and the 26 transistor M26 can be N-type metal oxide semiconductcor field effect transistor.23 transistor M23 has a control end, a first end and one second end, wherein the control end of the 23 transistor M23 is coupled to the 14 node N14, the first end of the 23 transistor M23 is coupled to supply current potential VDD, and second end of the 23 transistor M23 is coupled to 1 the 19 node N19.24 transistor M24 has a control end, a first end and one second end, wherein the control end of the 24 transistor M24 is coupled to the 15 node N15, the first end of the 24 transistor M24 is coupled to the 19 node N19, and second end of the 24 transistor M24 is coupled to the 15 node N15.25 transistor M25 has a control end, a first end and one second end, wherein the control end of the 25 transistor M25 is coupled to the 16 node N16, the first end of the 25 transistor M25 is coupled to the 18 node N18, and second end of the 25 transistor M25 is coupled to the 15 node N15.26 transistor M26 has a control end, a first end and one second end, wherein the control end of the 26 transistor M26 is coupled to the 18 node N18, the first end of the 26 transistor M26 is coupled to earthing potential VSS, and second end of the 26 transistor M26 is coupled to the 18 node N18.Second is sink to source branch road 522 for being the 3rd sink current comparing branch road 533 from the sink current mirror of the second input branch road 520, and mirror is the second source electric current comparing branch road 532.
In certain embodiments, first compares branch road 531 and comprises 1 the 17 transistor M17 and 1 the 18 transistor M18.17 transistor M17 and the 18 transistor M18 is N-type metal oxide semiconductcor field effect transistor.17 transistor M17 has a control end, a first end and one second end, wherein the control end of the 17 transistor M17 is coupled to the 7th node N7, the first end of the 17 transistor M17 is coupled to 1 the 13 node N13, and second end of the 17 transistor M17 is coupled to the first Controlling vertex NC1.18 transistor M18 has a control end, a first end and one second end, wherein the control end of the 18 transistor M18 is coupled to the 9th node N9, the first end of the 18 transistor M18 is coupled to earthing potential VSS, and second end of the 18 transistor M18 is coupled to the 13 node N13.First compares branch road 531 for conducting the sink current come by the first input current IX mirror, such as: specific currents IE.
In certain embodiments, second compares branch road 532 and comprises 1 the 19 transistor M19 and one the 20 transistor M20.19 transistor M19 and the 20 transistor M20 is P-type mos field-effect transistor.19 transistor M19 has a control end, a first end and one second end, wherein the control end of the 19 transistor M19 is coupled to 1 the 14 node N14, the first end of the 19 transistor M19 is coupled to supply current potential VDD, and second end of the 19 transistor M19 is coupled to the 14 node N14.20 transistor M20 has a control end, a first end and one second end, wherein the control end of the 20 transistor M20 is coupled to 1 the 15 node N15, the first end of the 20 transistor M20 is coupled to the 14 node N14, and second end of the 20 transistor M20 is coupled to the first Controlling vertex NC1.Second compares branch road 532 for conducting the source electric current come by the second input current IY mirror, such as: the correspondence one of the first electric current I 1, second electric current I 2 and the 3rd electric current I 3.
In certain embodiments, the 3rd compares branch road 533 and comprises one the 27 transistor M27 and one the 28 transistor M28.27 transistor M27 and the 28 transistor M28 is N-type metal oxide semiconductcor field effect transistor.27 transistor M27 has a control end, a first end and one second end, wherein the control end of the 27 transistor M27 is coupled to the 16 node N16, the first end of the 27 transistor M27 is coupled to one the 20 node N20, and second end of the 27 transistor M27 is coupled to the second Controlling vertex NC2.28 transistor M28 has a control end, a first end and one second end, wherein the control end of the 28 transistor M28 is coupled to the 18 node N18, the first end of the 28 transistor M28 is coupled to earthing potential VSS, and second end of the 28 transistor M28 is coupled to the 20 node N20.3rd compares branch road 533 for conducting the sink current come by the second input current IY mirror, such as: the correspondence one of the first electric current I 1, second electric current I 2 and the 3rd electric current I 3.
In certain embodiments, the 4th compares branch road 534 and comprises one the 29 transistor M29 and one the 30 transistor M30.29 transistor M29 and the 30 transistor M30 is P-type mos field-effect transistor.29 transistor M29 has a control end, a first end and one second end, wherein the control end of the 29 transistor M29 is coupled to protelum point N10, the first end of the 29 transistor M29 is coupled to supply current potential VDD, and second end of the 29 transistor M29 is coupled to protelum point N10.30 transistor M30 has a control end, a first end and one second end, wherein the control end of the 30 transistor M30 is coupled to the 12 node N12, the first end of the 30 transistor M30 is coupled to protelum point N10, and second end of the 30 transistor M30 is coupled to the second Controlling vertex NC2.4th compares branch road 534 for conducting the source electric current come by the first input current IX mirror, such as: specific currents IE.As shown in Fig. 5 A, 5B, when the first input current IX is greater than the second input current IY, tendency is drawn a net current by the control end of the 7th transistor M7 by the first Controlling vertex NC1, and the second Controlling vertex NC2 will be inclined to the control end place of output one net current to the 8th transistor M8.The usual convergence of resistance value due to the control end place of transistor is infinitely great, the current potential being positioned at the control end place of the 7th transistor M7 will decline rapidly, and the current potential being positioned at the control end place of the 8th transistor M8 will rise rapidly, the 5th node N5 is caused to become high logic level, and the output of the first inverter 561 (that is, the correspondence one of the first output signal O1, the second output signal O2 and the 3rd output signal O3) become low logic level.
It is to be understood that the first current comparator 151, second current comparator 152 and the 3rd current comparator 153 do not share any element (such as: the 11 transistor M11, the tenth two-transistor M12 etc.) to each other.Use duplicate numbers to carry out marked element, be only and allow these circuit of reader's easy to understand have similar framework and the identical element of part.In fact, the element of the first current comparator 151, second current comparator 152 and the 3rd current comparator 153 is all mutually independently to each other, does not have reusable situation.What another palpus was understood is, although the first input branch road 510, second in previous embodiment input that branch road 520, first is sink to that source branch road 511, second is sink to that source branch road 522, first compares that branch road 531, second compares that branch road 532, the 3rd compares that branch road 533 and the 4th compares branch road 534 each all use the two-transistor of serial connection mutually, in fact, each branch road can use the transistor of any amount respectively.What understand in addition is, although device transducer described in Fig. 4 140 (or the first transducer 131, or second transducer 132, or the 3rd transducer 133) implement to produce specific currents IE (or the first electric current I 1 in the mode of current source (CurrentSource), or second electric current I 2, or the 3rd electric current I 3), in other embodiments, the framework of its also available current heavy (CurrentSink), the circuit configurations being aided with Fig. 4,5A, 5B remake corresponding amendment (such as: the polarity in switched voltage source and change the kind of transistor).What another palpus was understood is, although flow through first to be sink to source branch road 511, first compares branch road 531 and the 4th, and to compare the electric current of branch road 534 identical with the first input current IX, and flow through second and be sink to source branch road 522, second compares branch road 532 and the 3rd, and to compare the electric current of branch road 533 identical with the second input current IY, but in other embodiments, flow through first and be sink to source branch road 511, first compare branch road 531 and the 4th compare the electric current of branch road 534 may be different from the first input current IX, its difference ratio can be decided by the length-width ratio of transistor used (AspectRatio), and flow through second be sink to source branch road 522, second compare branch road 532 and the 3rd compare the electric current of branch road 533 also may be different from the second input current IY, and its this identical difference ratio also can similarly be decided by the length-width ratio of transistor used.
Processor according to the output signal from current comparator, can remove the specific resistance value estimating external device 120.Such as, suppose that first resistance value of the first resistor R1 is 5k Ω, second resistance value of the second resistor R2 is 1k Ω, and the 3rd resistance value of the 3rd resistor R3 is 200 Ω, under this design, the relation between specific resistance value and output signal can as shown in the following Table I:
Table one: the relation between specific resistance value and output signal
Specific resistance value First output signal O1 Second output signal O2 3rd output signal O3
8kΩ 1 1 1
2kΩ 0 1 1
500Ω 0 0 1
200Ω 0 0 0
After detecting the scope of specific resistance value, processor also can judge the kind of external device 120 according to this.Such as, if the specific resistance value detected is about 8k Ω, then processor can judge that external device 120 may be a large-sized monitor, if the specific resistance value detected is about 500 Ω, then processor can judge that external device 120 may be a small-sized wrist-watch, and the rest may be inferred.
Fig. 6 is the schematic diagram of the circuit for detecting 600 of display according to another embodiment of the present invention.In the embodiment in fig 6, circuit for detecting 600 comprises a potential comparator (VoltageComparator) 610,1 first switch (Switch) 621,1 second switch 622, the 3rd switch 623,1 first resistor R1, one second resistor R2 and the 3rd resistor R3.When an external device 120 is connected to the mobile device comprising circuit for detecting 600, circuit for detecting 600 can detect a specific resistance value (such as, this external device 120 can be modeled as a device resistor REX) of external device 120.The detecting flow process of circuit for detecting 600 can comprise the following steps: conducting one by one first switch 621, second switch 622 and the 3rd switch 623; And the correspondence output signal VC sequentially recorded from potential comparator 610.The current potential being positioned at a positive input terminal of potential comparator 610 can be determined by supply current potential VDD and a voltage divider (VoltageDivider), and wherein voltage divider is controlled according to the first switch 621, second switch 622 and the 3rd switch 623 whichever conducting by the first resistor R1, the second resistor R2, the 3rd resistor R3 and device resistor REX.The current potential being positioned at the positive input terminal of potential comparator 610 compares mutually with a reference potential VREF of the negative input end being positioned at potential comparator 610, to produce corresponding output signal VC.In one embodiment, first resistance value of the first resistor R1 is 5k Ω, and second resistance value of the second resistor R2 is 1k Ω, and the 3rd resistance value of the 3rd resistor R3 is 200 Ω, and can detect those specific resistance values as aforementioned table one.At every turn when outputing signal VC and being recorded, namely it can be considered one in aforementioned output signals O1, O2, O3.Then, the kind of external device 120 can be done to judge according to each output signal VC by a processor (not shown).
The present invention proposes a kind of circuit for detecting design of novelty.In a word, the circuit for detecting carried, compared with conventional art, has following advantage at least: (1) replaces traditional potential comparator with current comparator; (2) design of traditional transistors switch device is omitted; (3) transistor size is reduced, and the gross area of micro circuit for detecting; (4) only within a signal period, i.e. the exportable all output signals representing the specific resistance value of external device; And (5) shorten the overall time of detecting spent by flow process.
Must be noted that above signal potential, signal code, resistance value and other component parameters etc. are not restrictive condition of the present invention.Designer can need according to difference and adjust these parameters.Circuit for detecting of the present invention is not limited in the configuration shown in Fig. 1-6.The present invention only can comprise any one or more features of any one or more embodiments of Fig. 1-6.In other words, and the illustrated feature of not all must be implemented in the middle of circuit for detecting of the present invention simultaneously.
Ordinal number in this specification and claim, such as " first ", " second ", " the 3rd " etc., do not have the precedence relationship in order each other, it only has the different elements of same name for indicating differentiation two.
The foregoing is only present pre-ferred embodiments; so itself and be not used to limit scope of the present invention; anyone familiar with this technology; without departing from the spirit and scope of the present invention; can do on this basis and further improve and change, the scope that therefore protection scope of the present invention ought define with claims of the application is as the criterion.

Claims (14)

1. a circuit for detecting, is characterized in that, for detecting an external device with a specific resistance value, and comprises:
One first resistor, has one first resistance value;
One second resistor, has one second resistance value;
One first transducer, is converted into one first electric current by this first resistance value;
One second transducer, is converted into one second electric current by this second resistance value;
One device transducer, is converted into a specific currents by this specific resistance value;
One first current comparator, makes comparisons this specific currents and this first electric current, and produces one first output signal according to this; And
One second current comparator, makes comparisons this specific currents and this second electric current, and produces one second output signal according to this;
Wherein this specific resistance value is judged out according to this first output signal and this second output signal.
2. circuit for detecting according to claim 1, is characterized in that, each of this device transducer, this first transducer and this second transducer comprises:
One the first transistor, have a control end, a first end and one second end, wherein this first end of this first transistor is coupled to a supply current potential;
One transistor seconds, there is a control end, a first end and one second end, wherein this first end of this transistor seconds is coupled to this second end of this first transistor, and this second end of this transistor seconds is coupled to the correspondence one of this external device, this first resistor and this second resistor;
One third transistor, have a control end, a first end and one second end, wherein this control end of this third transistor is coupled to this control end of this first transistor, and this first end of this third transistor is coupled to this supply current potential; And
One the 4th transistor, there is a control end, a first end and one second end, wherein this control end of the 4th transistor is coupled to this control end of this transistor seconds, this first end of 4th transistor is coupled to this second end of this third transistor, and this second end of the 4th transistor is coupled to this control end of the 4th transistor, to export the correspondence one of this specific currents, this first electric current and this second electric current.
3. circuit for detecting according to claim 2, is characterized in that, also comprises:
One power-saving circuit, produces a control signal, with optionally activation and this device transducer of forbidden energy, this first transducer and this second transducer.
4. circuit for detecting according to claim 3, is characterized in that, this device transducer, this first transducer and this second transducer are all periodically enabled, and is disabled after this first output signal and this second output signal produce.
5. circuit for detecting according to claim 3, is characterized in that, each of this device transducer, this first transducer and this second transducer also comprises:
One the 5th transistor, there is a control end, a first end and one second end, wherein this control end of the 5th transistor is for receiving this control signal, this first end of 5th transistor is coupled to this supply current potential, and this second end of the 5th transistor is coupled to this control end of this first transistor; And
One the 6th transistor, there is a control end, a first end and one second end, wherein this control end of the 6th transistor is for receiving this control signal, this first end of 6th transistor is coupled to this second end of this first transistor, and this second end of the 6th transistor is coupled to this control end of this first transistor.
6. circuit for detecting according to claim 1, is characterized in that, each of this first current comparator and this second current comparator comprises:
One the 7th transistor, have a control end, a first end and one second end, wherein this first end of the 7th transistor is coupled to an earthing potential;
One the 8th transistor, have a control end, a first end and one second end, wherein this first end of the 8th transistor is coupled to this earthing potential;
One the 9th transistor, there is a control end, a first end and one second end, wherein this control end of the 9th transistor is coupled to this second end of the 8th transistor, this first end of 9th transistor is coupled to a supply current potential, and this second end of the 9th transistor is coupled to this second end of the 7th transistor;
The tenth transistor, there is a control end, a first end and one second end, wherein this control end of the tenth transistor is coupled to this second end of the 7th transistor, this first end of tenth transistor is coupled to this supply current potential, and this second end of the tenth transistor is coupled to this second end of the 8th transistor;
One first inverter, has an input and an output, and wherein this input of this first inverter is coupled to this second end of the 7th transistor;
One first compares branch road, between this control end being coupled to this earthing potential and the 7th transistor, and for conducting the electric current come by this specific currents mirror;
One second compares branch road, between this control end being coupled to this supply current potential and the 7th transistor, and for conducting the electric current come by correspondence mirror of this first electric current and this second electric current;
One the 3rd compares branch road, between this control end being coupled to this earthing potential and the 8th transistor, and for conducting the electric current come by correspondence mirror of this first electric current and this second electric current; And
One the 4th compares branch road, between this control end being coupled to this supply current potential and the 8th transistor, and for conducting the electric current come by this specific currents mirror;
Wherein this output of this first inverter is for exporting the correspondence one of this first output signal and this second output signal.
7. circuit for detecting according to claim 6, is characterized in that, each of this first current comparator and this second current comparator also comprises:
One first is sink to source branch road, is coupled between this supply current potential and this earthing potential, and to this for this specific currents of mirror first compares branch road and the 4th and compare branch road; And
One second is sink to source branch road, is coupled between this supply current potential and this earthing potential, and to this for the correspondence one of this first electric current of mirror and this second electric current second compares branch road and the 3rd and compare branch road.
8. circuit for detecting according to claim 7, is characterized in that, each of this first current comparator and this second current comparator also comprises:
One first input branch road, receive this specific currents, and this specific currents of mirror first is sink to source branch road to this; And
One second input branch road, receives the correspondence one of this first electric current and this second electric current, and the correspondence one of this first electric current of mirror and this second electric current second is sink to source branch road to this.
9. circuit for detecting according to claim 8, is characterized in that, this first compares branch road and comprise:
The 17 transistor, have a control end, a first end and one second end, wherein this second end of the 17 transistor is coupled to this control end of the 7th transistor; And
The 18 transistor, have a control end, a first end and one second end, wherein this first end of the 18 transistor is coupled to this earthing potential, and this second end of the 18 transistor is coupled to this first end of the 17 transistor;
Wherein the 4th compares branch road and comprises:
One the 29 transistor, there is a control end, a first end and one second end, wherein this first end of the 29 transistor is coupled to this supply current potential, and this second end of the 29 transistor is coupled to this control end of the 29 transistor; And
One the 30 transistor, there is a control end, a first end and one second end, wherein this first end of the 30 transistor is coupled to this control end of the 29 transistor, and this second end of the 30 transistor is coupled to this control end of the 8th transistor.
10. circuit for detecting according to claim 9, is characterized in that, this first is sink to source branch road and comprises:
The 13 transistor, have a control end, a first end and one second end, wherein this control end of the 13 transistor is coupled to this control end of the 29 transistor, and this first end of the 13 transistor is coupled to this supply current potential;
The 14 transistor, there is a control end, a first end and one second end, wherein this control end of the 14 transistor is coupled to this control end of the 30 transistor, this first end of 14 transistor is coupled to this second end of the 13 transistor, and this second end of the 14 transistor is coupled to this control end of the 30 transistor;
The 15 transistor, there is a control end, a first end and one second end, wherein this control end of the 15 transistor is coupled to this control end of the 17 transistor, and this second end of the 15 transistor is coupled to this control end of the 30 transistor; And
The 16 transistor, there is a control end, a first end and one second end, wherein this control end of the 16 transistor is coupled to this control end of the 18 transistor, this first end of 16 transistor is coupled to this earthing potential, and this second end of the 16 transistor is coupled to this control end of the 16 transistor.
11. circuit for detecting according to claim 10, is characterized in that, this first input branch road comprises:
The 11 transistor, there is a control end, a first end and one second end, wherein this control end of the 11 transistor is coupled to this control end of the 15 transistor, and this second end of the 11 transistor is coupled to this control end of the 11 transistor; And
The tenth two-transistor, there is a control end, a first end and one second end, wherein this control end of the tenth two-transistor is coupled to this control end of the 16 transistor, this first end of tenth two-transistor is coupled to this earthing potential, and this second end of the tenth two-transistor is coupled to this first end of the 11 transistor;
Wherein this second end of the 11 transistor is for receiving this specific currents.
12. circuit for detecting according to claim 8, is characterized in that, this second compares branch road and comprise:
The 19 transistor, have a control end, a first end and one second end, wherein this first end of the 19 transistor is coupled to this supply current potential, and this second end of the 19 transistor is coupled to this control end of the 19 transistor; And
One the 20 transistor, there is a control end, a first end and one second end, wherein this first end of the 20 transistor is coupled to this second end of the 19 transistor, and this second end of the 20 transistor is coupled to this control end of the 7th transistor;
Wherein the 3rd compares branch road and comprises:
One the 27 transistor, have a control end, a first end and one second end, wherein this second end of the 27 transistor is coupled to this control end of the 8th transistor; And
One the 28 transistor, there is a control end, a first end and one second end, wherein this first end of the 28 transistor is coupled to this earthing potential, and this second end of the 28 transistor is coupled to this first end of the 27 transistor.
13. circuit for detecting according to claim 12, is characterized in that, this second is sink to source branch road and comprises:
One the 23 transistor, have a control end, a first end and one second end, wherein this control end of the 23 transistor is coupled to this control end of the 19 transistor, and this first end of the 23 transistor is coupled to this supply current potential;
One the 24 transistor, there is a control end, a first end and one second end, wherein this control end of the 24 transistor is coupled to this control end of the 20 transistor, this first end of 24 transistor is coupled to this second end of the 23 transistor, and this second end of the 24 transistor is coupled to this control end of the 24 transistor;
One the 25 transistor, there is a control end, a first end and one second end, wherein this control end of the 25 transistor is coupled to this control end of the 27 transistor, and this second end of the 25 transistor is coupled to this second end of the 24 transistor; And
One the 26 transistor, there is a control end, a first end and one second end, wherein this control end of the 26 transistor is coupled to this control end of the 28 transistor, this first end of 26 transistor is coupled to this earthing potential, and this second end of the 26 transistor is coupled to this control end of the 26 transistor.
14. circuit for detecting according to claim 13, is characterized in that, this second input branch road comprises:
One the 21 transistor, there is a control end, a first end and one second end, wherein this control end of the 21 transistor is coupled to this control end of the 25 transistor, and this second end of the 21 transistor is coupled to this control end of the 21 transistor; And
One the 20 two-transistor, there is a control end, a first end and one second end, wherein this control end of the 20 two-transistor is coupled to this control end of the 26 transistor, this first end of 20 two-transistor is coupled to this earthing potential, and this second end of the 20 two-transistor is coupled to this first end of the 21 transistor;
Wherein this second end of the 21 transistor is for receiving the correspondence one of this first electric current and this second electric current.
CN201510520030.XA 2015-04-24 2015-08-21 Circuit for detecting Active CN105207659B (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1834840A (en) * 2006-03-10 2006-09-20 崇贸科技股份有限公司 Controller of once controlled power source supplier for controlling output current
US20090009187A1 (en) * 2007-07-04 2009-01-08 Samsung Electronics Co. Ltd. Method for identifying connected device and electronic device using the same
CN102047129A (en) * 2008-04-04 2011-05-04 快捷半导体有限公司 A method and system that determines the value of a resistor in linear and non-linear resistor sets
US20140139281A1 (en) * 2012-11-21 2014-05-22 Fairchild Semiconductor Corporation Window reference trimming for accessory detection
CN104215353A (en) * 2013-05-29 2014-12-17 英特尔Ip公司 Input stage for temperature measurement system

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3503261A (en) * 1967-11-01 1970-03-31 Fischer & Porter Co Resistance to current converter
JPS53116857A (en) * 1977-03-22 1978-10-12 Hokushin Electric Works Electric resistanceecurrent transformer
JP2882163B2 (en) * 1992-02-26 1999-04-12 日本電気株式会社 Comparator
FR2760163A1 (en) * 1997-02-25 1998-08-28 Philips Electronics Nv TELECOMMUNICATION APPARATUS PROVIDED WITH DEVICE FOR RECOGNIZING PERIPHERALS
US6695837B2 (en) * 2002-03-13 2004-02-24 Starion Instruments Corporation Power supply for identification and control of electrical surgical tools

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1834840A (en) * 2006-03-10 2006-09-20 崇贸科技股份有限公司 Controller of once controlled power source supplier for controlling output current
US20090009187A1 (en) * 2007-07-04 2009-01-08 Samsung Electronics Co. Ltd. Method for identifying connected device and electronic device using the same
CN102047129A (en) * 2008-04-04 2011-05-04 快捷半导体有限公司 A method and system that determines the value of a resistor in linear and non-linear resistor sets
US20140139281A1 (en) * 2012-11-21 2014-05-22 Fairchild Semiconductor Corporation Window reference trimming for accessory detection
CN104215353A (en) * 2013-05-29 2014-12-17 英特尔Ip公司 Input stage for temperature measurement system

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