CN105161430A - Packaging method of semiconductor device - Google Patents
Packaging method of semiconductor device Download PDFInfo
- Publication number
- CN105161430A CN105161430A CN201510480352.6A CN201510480352A CN105161430A CN 105161430 A CN105161430 A CN 105161430A CN 201510480352 A CN201510480352 A CN 201510480352A CN 105161430 A CN105161430 A CN 105161430A
- Authority
- CN
- China
- Prior art keywords
- printed circuit
- bare board
- substrate
- semiconductor device
- colloid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 42
- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 239000000084 colloidal system Substances 0.000 claims abstract description 30
- 238000012856 packing Methods 0.000 claims description 15
- 238000005538 encapsulation Methods 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 8
- 238000007639 printing Methods 0.000 claims description 7
- 239000003292 glue Substances 0.000 claims description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 239000004568 cement Substances 0.000 claims description 3
- 239000006071 cream Substances 0.000 claims description 3
- 238000005520 cutting process Methods 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims description 2
- 239000007943 implant Substances 0.000 claims description 2
- 239000004033 plastic Substances 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 9
- 238000013461 design Methods 0.000 abstract description 7
- 238000012858 packaging process Methods 0.000 abstract 1
- 230000000149 penetrating effect Effects 0.000 abstract 1
- 238000003825 pressing Methods 0.000 abstract 1
- 238000012545 processing Methods 0.000 description 7
- 238000007789 sealing Methods 0.000 description 7
- 230000008901 benefit Effects 0.000 description 5
- 238000012423 maintenance Methods 0.000 description 3
- 238000004904 shortening Methods 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000007493 shaping process Methods 0.000 description 2
- 238000012356 Product development Methods 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000012945 sealing adhesive Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The invention discloses a packaging method of a semiconductor device. The method comprises the following steps of: preparing a substrate, wherein the substrate is divided into a plurality of packaging areas, and each packaging area is electrically connected with a plurality of electronic elements; preparing a printed circuit bare board, wherein the printed circuit bare board is provided with an accommodating hole penetrating through the upper and lower surfaces of the printed circuit bare board; pasting the printed circuit bare board to the substrate, enabling the printed circuit bare board to be arranged outside the packaging areas in a surrounding manner, and enabling the electronic elements to be accommodated in the accommodating hole; and filling the accommodating hole of the printed circuit bare board with a colloid so as to cover the electronic elements. Thus, the manufacturing of the semiconductor device is respectively flexible in design and is suitable for small-scale production. According to the invention, the combination of an upper cover and an outer frame is realized by one step of pressing and is finished in one process, and wiring of the semiconductor elements is finished before the outer frame is arranged, so that the limits of the wiring are eliminated, the packaging process is shortened, and the production efficiency is improved.
Description
Technical field
The present invention relates to a kind of method for packaging semiconductor, refer to especially and a kind ofly mould need not be used to carry out sealing and be applicable to a small amount of semiconductor packages method of producing, belong to technical field of semiconductors.
Background technology
Current method for packing semiconductor is that the routing carrying out electronic component (as chip) on a substrate engages the encapsulation step such as (wire-bonding), sealing and cutting.Wherein, in the step of sealing, be generally the mode using mold (Molding), namely utilize a dies with epoxy compound pressure on the substrate, and the die cavity correspondence of this dies with epoxy compound cover above all electronic components, to form an independently packing space.Afterwards, the colloid (such as epoxy resin) of molten condition is filled in die cavity.Then, after hot setting program, make colloid shaping and electronic component and the wire be connected between this substrate and electronic component are sealed up.
But the above-mentioned sealing mode of mold that utilizes has following problem:
1. change design not easily, namely more nonelastic in design, especially when producing on a small quantity, do not meet economic benefit.
2. wire can be caused because of the fusing flowing of colloid in injection process to subside the phenomenon of (wiresweep) for small interconnect (interconnectwires), thus cause line short and encapsulating products was subsequently lost efficacy.
3. the expense of mould and relevant device costly, causes the maintenance cost of manufacturing cost and equipment all higher.
4. can produce a large amount of material scrap things, as demoulding glue, waste material (MoldingCompound) etc., cause the pollution of environment, therefore do not meet environmental protection.
And in prior art, the setting of housing and the covering of light-passing board, can need complete through twice processing procedure.In addition, in wafer line process, because housing is shaped before this, so certainly will restriction be caused when line, usually a reserved safe distance between wafer and housing, can not encounter housing when so just can guarantee line, can affect the size of encapsulation volume thus.
Therefore, industry is badly in need of providing a kind of reasonable in design and effectively improve the technical scheme of the problems referred to above.
Summary of the invention
In order to overcome the technological deficiency existed in above-mentioned prior art, the object of the present invention is to provide one to shorten encapsulation procedure, and enhancing productivity, go for the semiconductor packages method of small lot batch manufacture.
In order to realize foregoing invention object, technical scheme of the present invention is as follows:
A method for packing for semiconductor device, comprises the following steps:
Prepare a substrate, this substrate zone is divided into multiple packaging area, and each packaging area is provided with multiple electronic component in the mode be electrically connected;
Prepare a printed circuit bare board, this printed circuit bare board has the containing hole that runs through this printed circuit bare board upper and lower surface;
This printed circuit bare board is sticked on this substrate, this printed circuit bare board is around in outside described packaging area, and make described electronic component be placed in this containing hole; And
Colloid is circulated in the containing hole of this printed circuit bare board, with coated described electronic component.
Wherein, after the step this colloid being poured into this containing hole, also comprise the step of this colloid of baking, this colloid is solidified.
Wherein, after the step of this colloid of baking, also comprise this substrate of a cutting to form the step of multiple semiconductor package part.
Wherein, when pasting the step of this printed circuit bare board, this printed circuit bare board sticks in this substrate by insulating cement material or tin cream.
Wherein, this colloid is being circulated in the containing hole step of this printed circuit bare board, is first calculating the glue amount needed for this colloid, and adopting a point gum machine or a printing machine that this colloid is poured into this containing hole.
Wherein preferred, the method is also included on a substrate carries out the following step:
Implant semiconductor element;
Carry out the link process of this semiconductor element;
Carry out the one step press process of a housing and a upper cover, to complete the encapsulation of semiconductor element.
Wherein, be positioned on described substrate surface and also comprise several conductors, in order to connect described semiconductor element.
Wherein, described substrate is plastic rubber substrate, or ceramic base material, or printed circuit board (PCB).
Wherein, described semiconductor element is a light sensing wafer.
Wherein, described light sensing wafer is image sensing wafer.
Compared with prior art, the invention has the beneficial effects as follows:
1. can design applicable printed circuit bare board according to the sealing height of product, therefore compared with tool elasticity and flexible and changeableization in design, and go for small lot batch manufacture.
2. more not easily cause the phenomenon that wire subsides.
3. because not needing customized mould, and make the cost of manufacturing cost and maintenance of equipment lower.
4. can not produce a large amount of material scrap things.
5. the combination of light-passing board and housing is taked the mode of one step press, complete in one processing procedure, accelerate processing time; Wafer line completes before housing is inserted in addition, can remove the limitation on above-mentioned line.Such shortening encapsulation procedure, and improve production efficiency.
Embodiment
Below in conjunction with specific embodiment, further detailed description explanation is done to technical scheme of the present invention.
The invention provides a kind of method for packing of semiconductor device, can be applicable to various semiconductor package part, such as: system-in-package module (SysteminPackageModule).The method comprises the following steps:
(1) prepare a substrate, this substrate zone is divided into multiple packaging area, and each packaging area is provided with multiple electronic component, to be provided with three electronic components in each packaging area in the mode be electrically connected.Wherein, electronic component is determined by the requirement of practical application, and its kind is not limit, and can be chip, passive device or its combination etc.Wire can be used between electronic component and each packaging area to reach electric connection.Preferably, each substrate has nine packaging areas, but does not limit.
(2) prepare a printed circuit bare board, this printed circuit bare board has the containing hole that runs through this printed circuit bare board upper and lower surface.Wherein this printed circuit bare board and containing hole overall dimension according to encapsulate sealing needed for described electronic component highly with area and designing.In addition, use multiple substrate and printed circuit bare board, and described substrate is connected in a row, and described printed circuit bare board is also connected in a row.
(3) then, this printed circuit bare board is sticked on this substrate, this printed circuit bare board is around in outside described packaging area, and described electronic component is placed in this containing hole.Wherein when pasting this printed circuit bare board, this printed circuit bare board is sticked in this surface by adhesive agent such as application insulating cement material or tin cream etc.
(4) colloid is circulated in the containing hole of this printed circuit bare board, with coated described electronic component.Wherein in the step of encapsulating, first calculate the glue amount of this colloid, and adopt a point gum machine or a printing machine to be poured in this containing hole by this colloid.Therefore, the present invention can adopt a glue (Dispensing) or printing (Printing) mode to be inserted by the colloid of liquid state, possesses the advantage of automation thus, with continuously and produce in large quantities.
(5), after, baking (VacuumBaking) this colloid, makes this colloid solidify (Curing) and shaping, and is lived by described electronic component encapsulation.
(6) (PackageSawing) this substrate is cut to form multiple semiconductor package part.
In addition, it should be noted that this colloid can produce stress after solidifying in conventional sealing adhesive process, and cause substrate warp (Warpage) to be out of shape, and then affect subsequent technique and yield.But the present invention can offset the stress produced after this colloid solidifies by means of the rigidity of printed circuit bare board itself and intensity, therefore can not cause the phenomenon (Warpageissue) of warpage.
More existing semiconductor packaging and method for packaging semiconductor proposed by the invention, clearly, this invention takes one step press mode, complete in processing procedure together with the covering of the setting of housing (Frame) and light-passing board, and obtain the object of " shortening processing procedure ".Except the shortening of processing procedure, the present invention also has an advantage to be that the line (WireBonding) carrying out semiconductor element is when processing, larger working space can be obtained, this can have a clear understanding of from the opportunity of line (WireBonding): line (WireBonding) carries out in groove, and therefore working space is limited to the inner edge of housing (Frame); Line (WireBonding) operation, carry out before housing (Frame) is arranged, without the working space restriction met with in prior art, thus larger operating space is had for the machine carrying out line (WireBonding), and the contact of line (WireBonding) on substrate and housing (Frame) distance also more flexible, machine operation can not be blocked because of housing (Frame) inner edge, and make contact on substrate must comparatively away from housing (Frame) inner edge.
The present invention is encapsulated as example with LCC (LeadlessChipCarrier), and technology of the present invention can be applied to the encapsulation of other field certainly, such as ball lattice array BGA (BallGridArray) etc.
So method for packaging semiconductor of the present invention has following feature and function:
1. according to the sealing height of product or other demand used, and the profile of printed circuit bare board can be revised at any time, therefore compared with tool elasticity and flexible and changeableization in design, and when being applicable to produce on a small quantity or the product development initial stage, possess preferably economic benefit.
2. can put glue (Dispensing) or liquid state colloid is inserted by printing (Printing) mode, make to have more than 10mil spacing at least between this colloid and wire, wire can be avoided to subside (wiresweep) problem.
3. the expense of printed circuit bare board only about hundred yuan, can reduce manufacturing cost, and produce without any equipment maintenance cost.
4. can not produce a large amount of material scrap things.
5. the present invention possesses the advantage of automation, can produce in a large number continuously.
6. can not cause the phenomenon (Warpageissue) of warpage.
It should be noted that, above preferred embodiment is used for illustrative purposes only, but not limitation of the present invention, person skilled in the relevant technique, without departing from the spirit and scope of the present invention, done various conversion or modification, all belong to category of the present invention.
Claims (10)
1. a method for packing for semiconductor device, is characterized in that, comprises the following steps:
Prepare a substrate, this substrate zone is divided into multiple packaging area, and each packaging area is provided with multiple electronic component in the mode be electrically connected;
Prepare a printed circuit bare board, this printed circuit bare board has the containing hole that runs through this printed circuit bare board upper and lower surface;
This printed circuit bare board is sticked on this substrate, this printed circuit bare board is around in outside described packaging area, and make described electronic component be placed in this containing hole; And
Colloid is circulated in the containing hole of this printed circuit bare board, with coated described electronic component.
2. the method for packing of semiconductor device as claimed in claim 1, is characterized in that, after the step this colloid being poured into this containing hole, also comprise the step of this colloid of baking, this colloid is solidified.
3. the method for packing of semiconductor device as claimed in claim 2, is characterized in that, after the step of this colloid of baking, also comprises this substrate of a cutting to form the step of multiple semiconductor package part.
4. the method for packing of semiconductor device as claimed in claim 1, it is characterized in that, when pasting the step of this printed circuit bare board, this printed circuit bare board sticks in this substrate by insulating cement material or tin cream.
5. the method for packing of semiconductor device as claimed in claim 1, it is characterized in that, this colloid is being circulated in the containing hole step of this printed circuit bare board, is first calculating the glue amount needed for this colloid, and adopting a point gum machine or a printing machine that this colloid is poured into this containing hole.
6. the method for packing of semiconductor device as claimed in claim 1, it is characterized in that, the method is also included on a substrate carries out the following step:
Implant semiconductor element;
Carry out the link process of this semiconductor element;
Carry out the one step press process of a housing and a upper cover, to complete the encapsulation of semiconductor element.
7. the method for packing of semiconductor device as claimed in claim 1, is characterized in that, be positioned on described substrate surface and also comprise several conductors, in order to connect described semiconductor element.
8. the method for packing of semiconductor device as claimed in claim 1, it is characterized in that, described substrate is plastic rubber substrate, or ceramic base material, or printed circuit board (PCB).
9. the method for packing of semiconductor device as claimed in claim 1, it is characterized in that, described semiconductor element is a light sensing wafer.
10. the method for packing of semiconductor device as claimed in claim 9, it is characterized in that, described light sensing wafer is image sensing wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510480352.6A CN105161430A (en) | 2015-08-08 | 2015-08-08 | Packaging method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510480352.6A CN105161430A (en) | 2015-08-08 | 2015-08-08 | Packaging method of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105161430A true CN105161430A (en) | 2015-12-16 |
Family
ID=54802247
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510480352.6A Pending CN105161430A (en) | 2015-08-08 | 2015-08-08 | Packaging method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105161430A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107369626A (en) * | 2016-05-12 | 2017-11-21 | 无锡华润安盛科技有限公司 | A kind of pasting method of multiclass cake core |
-
2015
- 2015-08-08 CN CN201510480352.6A patent/CN105161430A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107369626A (en) * | 2016-05-12 | 2017-11-21 | 无锡华润安盛科技有限公司 | A kind of pasting method of multiclass cake core |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20151216 |