CN111640730B - Adapter plate easy for SIP packaging bottom filling and manufacturing method thereof - Google Patents
Adapter plate easy for SIP packaging bottom filling and manufacturing method thereof Download PDFInfo
- Publication number
- CN111640730B CN111640730B CN202010316241.2A CN202010316241A CN111640730B CN 111640730 B CN111640730 B CN 111640730B CN 202010316241 A CN202010316241 A CN 202010316241A CN 111640730 B CN111640730 B CN 111640730B
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- Prior art keywords
- water
- copper column
- adapter plate
- mounting element
- temperature
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 34
- 229910052802 copper Inorganic materials 0.000 claims abstract description 34
- 239000010949 copper Substances 0.000 claims abstract description 34
- 239000002195 soluble material Substances 0.000 claims abstract description 23
- 239000003989 dielectric material Substances 0.000 claims abstract description 9
- 238000003466 welding Methods 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 10
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 9
- 238000001746 injection moulding Methods 0.000 claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 5
- 239000005022 packaging material Substances 0.000 claims description 5
- 238000001723 curing Methods 0.000 claims description 4
- 238000013035 low temperature curing Methods 0.000 claims description 4
- 239000007787 solid Substances 0.000 claims description 4
- 238000003486 chemical etching Methods 0.000 claims description 3
- 238000001816 cooling Methods 0.000 claims description 3
- 238000011010 flushing procedure Methods 0.000 claims description 3
- 238000005520 cutting process Methods 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8134—Bonding interfaces of the bump connector
- H01L2224/81345—Shape, e.g. interlocking features
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
The invention relates to an adapter plate easy to SIP packaging bottom filling and a manufacturing method thereof, wherein the adapter plate comprises copper column layers (1), patterns of the copper column layers (1) correspond to patterns of welding pads at the bottom of a follow-up mounting element, dielectric materials (2) are filled between the copper column layers (1), and the dielectric materials (2) are made of water-soluble materials. The adapter plate easy to fill the bottom of the SIP package and the manufacturing method thereof can raise the gap at the bottom of the surface mount device, so that the adapter plate is easier to fill plastic package materials.
Description
Technical Field
The invention relates to an adapter plate easy to SIP packaging bottom filling and a manufacturing method thereof, belonging to the technical field of semiconductor packaging.
Background
At present, some large SIP products directly carry out surface mounting on QFN or LGA products with larger sizes and directly carry out bottom filling by using plastic packaging materials, the bottom spacing after surface mounting of the products is generally smaller than 50um, the plastic packaging materials are difficult to completely fill the bottom, the problem of insufficient filling is caused, and the subsequent products possibly fail.
Disclosure of Invention
The invention aims to solve the technical problem of providing an adapter plate easy to fill the bottom of a SIP package and a manufacturing method thereof aiming at the prior art, which can raise the gap at the bottom of a surface mount device so as to facilitate the filling of plastic packaging materials.
The invention solves the problems by adopting the following technical scheme: the pinboard comprises copper column layers, wherein the patterns of the copper column layers correspond to the patterns of bonding pads at the bottom of a mounting element, dielectric materials are filled between the copper column layers, and the dielectric materials are water-soluble materials.
The water-soluble material has low-temperature curing characteristic, is solid at low temperature after curing, and is softened at high temperature to be easily dissolved by water.
The size of the adapter plate is the same as that of the mounting element.
A method of manufacturing a interposer for easy SIP package underfill, the method comprising the steps of:
firstly, taking a copper base material, and forming a copper column layer by using a chemical etching or mechanical stamping mode, wherein the pattern of the copper column layer is the same as the pattern and the size of a welding pad at the bottom of a subsequent mounting element;
performing low-temperature injection molding on the copper column layers by using water-soluble materials, filling gaps among the copper column layers by using the water-soluble materials, and cooling and solidifying after injection molding to form a whole transfer plate structure;
and thirdly, cutting the whole adapter plate into a single structure.
Preferably, the injection molding temperature in the second step is 100 ℃.
A method of using a interposer for facilitating SIP package underfilling, the method comprising the steps of:
firstly, attaching a adapting plate on a circuit board;
mounting the mounting element on the adapter plate, wherein the bottom welding pad of the mounting element is aligned with the pattern of the copper column layer of the adapter plate;
heating the mounted product to 150 ℃ through a heating plate, softening the water-soluble material, flushing the softened water-soluble material with high temperature water, and removing the water-soluble material;
and fourthly, integrally plastic packaging the surface of the circuit board, the adapter plate and the mounting element, wherein the plastic packaging material is completely filled into the space between the bottom of the mounting element and the circuit board.
Compared with the prior art, the invention has the advantages that:
1. the adapter plate is arranged at the bottom of the mounting element, so that the height of the bottom of the mounting element is increased on the premise of ensuring that a product can normally run, the filling space is increased, the bottom of the mounting element is ensured to be completely filled, and the reliability of the product is ensured;
2. the invention can control the height of the copper column layer to adapt to the mounting elements with different sizes.
Drawings
Fig. 1 and 2 are schematic structural views of an interposer for facilitating SIP package underfill according to the present invention, wherein fig. 2 is A-A cross-sectional view of fig. 1.
Fig. 3 to 5 are schematic views of the process flows of the manufacturing method of the interposer for easily performing SIP package underfill according to the present invention.
Fig. 6 to 9 are schematic views of the flow chart of each procedure of the method for using the interposer for easily filling the SIP package according to the present invention.
Wherein:
copper pillar layer 1
A dielectric material 2.
Detailed Description
The invention is described in further detail below with reference to the embodiments of the drawings.
Referring to fig. 1 and 2, the interposer for easy SIP package bottom filling of the present invention includes a copper pillar layer 1, wherein the pattern of the copper pillar layer 1 corresponds to the pattern of the bonding pad at the bottom of the mounting element, a dielectric material 2 is filled between the copper pillar layers 1, and the dielectric material 2 is made of a water-soluble material;
the water-soluble material has low-temperature curing characteristic, is solid at low temperature after curing, and is softened at high temperature to be easily dissolved by water;
the size of the adapter plate is the same as that of the mounting element.
The manufacturing method comprises the following steps:
step one, referring to fig. 3, a copper base material is taken, a copper column layer is formed by using a chemical etching or mechanical stamping mode, and the pattern and the size of the copper column layer are the same as those of a bonding pad at the bottom of a mounting element;
step two, referring to fig. 4, the copper column layers are subjected to low-temperature injection molding by using a water-soluble material, gaps among the copper column layers are filled by the water-soluble material, the injection molding temperature is about 100 ℃, and the injection molding is carried out, and then cooling and solidifying are carried out to form a whole transfer plate structure;
step three, referring to fig. 5, the whole patch panel is cut into a single structure.
The using method comprises the following steps:
step one, referring to fig. 6, mounting a adapting board on a circuit board in an SMT manner;
step two, referring to fig. 7, mounting the mounting element on the adapter plate, wherein the bottom welding pad of the mounting element is aligned with the pattern of the copper column layer of the adapter plate;
step three, referring to fig. 8, heating the mounted product to 150 ℃ through a heating plate, softening the water-soluble material, then flushing the softened water-soluble material with high-temperature water, and removing the water-soluble material;
after water washing, the water-soluble material of the adapter plate is dissolved in water, a copper column layer is left, and the bottom filling space of the mounting element can be increased;
fourth, referring to fig. 9, the surface of the circuit board, the adapter plate and the mounting component are integrally encapsulated, and the plastic package material can be completely filled into the space between the bottom of the mounting component and the circuit board because the bottom of the mounting component is raised by the adapter plate.
In addition to the above embodiments, the present invention also includes other embodiments, and all technical solutions formed by equivalent transformation or equivalent substitution should fall within the protection scope of the claims of the present invention.
Claims (4)
1. An interposer for easy SIP package underfill, characterized in that: the copper column structure comprises copper column layers (1), wherein the patterns of the copper column layers (1) correspond to the patterns of welding pads at the bottom of a follow-up mounting element, dielectric materials (2) are filled between the copper column layers (1), the dielectric materials (2) are water-soluble materials, the water-soluble materials have low-temperature curing characteristics, are solid at low temperature after curing, and are softened at high temperature so as to be easily dissolved by water.
2. The SIP package underfill-facilitated interposer of claim 1, wherein: the size of the adapter plate is the same as that of the mounting element.
3. A method of manufacturing a interposer for easy SIP package underfill, the method comprising the steps of:
firstly, taking a copper base material, and forming a copper column layer by using a chemical etching or mechanical stamping mode, wherein the pattern of the copper column layer is the same as the pattern and the size of a welding pad at the bottom of a subsequent mounting element;
performing low-temperature injection molding on the copper column layers by using water-soluble materials, filling gaps among the copper column layers by using the water-soluble materials, and cooling and solidifying after injection molding to form a whole transfer plate structure; the water-soluble material has low-temperature curing characteristic, is solid at low temperature after curing, and is softened at high temperature to be easily dissolved by water;
and thirdly, cutting the whole adapter plate into a single structure.
4. A method of using the SIP package underfill-prone interposer according to claim 1, wherein the method comprises the steps of:
firstly, attaching a adapting plate on a circuit board;
mounting the mounting element on the adapter plate, wherein the bottom welding pad of the mounting element is aligned with the pattern of the copper column layer of the adapter plate;
heating the mounted product to 150 ℃ through a high-temperature carrier plate, softening the water-soluble material, flushing with high-temperature water, and removing the water-soluble material;
and fourthly, integrally plastic packaging the surface of the circuit board, the adapter plate and the mounting element, wherein the plastic packaging material is completely filled into the space between the bottom of the mounting element and the circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010316241.2A CN111640730B (en) | 2020-04-21 | 2020-04-21 | Adapter plate easy for SIP packaging bottom filling and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010316241.2A CN111640730B (en) | 2020-04-21 | 2020-04-21 | Adapter plate easy for SIP packaging bottom filling and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111640730A CN111640730A (en) | 2020-09-08 |
| CN111640730B true CN111640730B (en) | 2023-08-18 |
Family
ID=72330812
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010316241.2A Active CN111640730B (en) | 2020-04-21 | 2020-04-21 | Adapter plate easy for SIP packaging bottom filling and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111640730B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104966695A (en) * | 2015-07-14 | 2015-10-07 | 华进半导体封装先导技术研发中心有限公司 | TSV back outcrop formation method |
| CN106298550A (en) * | 2015-06-29 | 2017-01-04 | 意法半导体公司 | For making method and the related device of the semiconductor device with side walls collapse |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014091744A (en) * | 2012-10-31 | 2014-05-19 | 3M Innovative Properties Co | Underfill composition, semiconductor device and manufacturing method thereof |
| US10249515B2 (en) * | 2016-04-01 | 2019-04-02 | Intel Corporation | Electronic device package |
-
2020
- 2020-04-21 CN CN202010316241.2A patent/CN111640730B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106298550A (en) * | 2015-06-29 | 2017-01-04 | 意法半导体公司 | For making method and the related device of the semiconductor device with side walls collapse |
| CN104966695A (en) * | 2015-07-14 | 2015-10-07 | 华进半导体封装先导技术研发中心有限公司 | TSV back outcrop formation method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111640730A (en) | 2020-09-08 |
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