CN105157772A - Timing terminating method, circuit and ultrasonic testing system based on circuit - Google Patents
Timing terminating method, circuit and ultrasonic testing system based on circuit Download PDFInfo
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- CN105157772A CN105157772A CN201510402543.0A CN201510402543A CN105157772A CN 105157772 A CN105157772 A CN 105157772A CN 201510402543 A CN201510402543 A CN 201510402543A CN 105157772 A CN105157772 A CN 105157772A
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Abstract
The invention relates to the technical field of ultrasonic wave fluid flow detection and in particular relates to a timing terminating method. The method comprises the following steps of (A) amplifying an amplitude of an original echo signal V0 to acquire an amplified echo signal V1, (B) conducting phase translation of the amplified echo signal V1 to acquire a translated echo signal V2, (C) detecting the amplified echo signal V1, the translated echo signal V2 to acquire half-wave envelope signal V3, V4, (D) comparing amplitudes of the two half-eave envelope signal V3, V4 to acquire a negative pulse width signal V5, and outputting a timing stop pulse to a time-digital conversion chip. The invention further discloses a circuit and an ultrasonic testing system based on the circuit. With the processed echo signal, a stop timing moment of the time-digital conversion chip is only related to circuit existing parameters and has nothing to do with input signal features, so deficiencies of background technology is avoided; timing precision is improved; and flow detection precision is further guaranteed.
Description
Technical field
The present invention relates to ultrasonic fluid flow detection technical field, particularly a kind of timer expiration Method and circuits and the ultrasonic wave detecting system based on this circuit.
Background technology
Supersonic wave metering instrument is a kind of full electronic fluid flow measuring instrument adopting ultrasonic detection technology.Ultrasonic propagation time difference method realizes technical implementation way simple, with low cost as a kind of, is widely used in the products such as ultrasonic water meter, ultrasonic calorimeter, ultrasonic wave gas meter and ultrasonic flow meter at present.The flow metering precision of supersonic wave metering instrument depends primarily on the accuracy of detection of circuit to the travel-time of ultrasound wave in fluid media (medium).At present, time m-digital conversion (TDC) dedicated IC chip can reach 20ps ~ 50ps for the accuracy of timekeeping of time, use this kind of chip can solve the accuracy of timekeeping problem of ultrasonic propagation time, but initial, the stop timing of timing still need external circuit to determine.
The original excitation signal of ultrasonic sensor is generally the digital signal of squared pulse trains, even if can directly for circuit provides timing initial time, and timing initial time can the specific pulse edge precise synchronization of pulse train therewith.The echoed signal of ultrasonic sensor is the simulating signal of sinusoidal envelope, cannot directly for timing circuit provides the timer expiration moment, comparator circuit is mostly adopted original echoed signals to be shaped as pulse train, according to the edge determination timing stop timing of this pulse train at present.Adopt this kind of method to exist following not enough: one, adopts Zero-cross comparator method, the pulse train width after the interference of outside noise can cause shaping converts, and then the timing stop timing is changed; Its two, adopt threshold value comparison method, although can solve outside noise interference problem, the temperature drift characteristic of transducer impedance can cause the change of echoed signal amplitude, and under making different water temperature condition, the timing stop timing changes; Its three, adopt the method that is combined with Zero-cross comparator of threshold value, above noise and temperature drift problems can be solved, but to the impedance consistance of transducer and threshold value dynamic conditioning software algorithm proposition high requirement.
Summary of the invention
Primary and foremost purpose of the present invention is to provide a kind of timer expiration method, improves measuring accuracy.
For realizing above object, the technical solution used in the present invention is: a kind of timer expiration method, comprises the steps: that original echoed signals V0 is carried out amplitude and amplifies the echoed signal V1 after being amplified by (A); (B) the echoed signal V1 after amplification is carried out phase shift and obtain dephased echoed signal V2; (C) detection is carried out respectively to echoed signal V1, the dephased echoed signal V2 after amplification and obtain half-wave envelope signal V3, V4; (D) two-way half-wave envelope signal V3, V4 are carried out m-digital conversion chip when amplitude com parison obtains negative pulse width signal V5 and exports to as timing stop pulse.
Compared with prior art, there is following technique effect in the present invention: by the process to echoed signal, time m-digital conversion chip stopping timer time only parameter intrinsic to circuit is relevant, have nothing to do with the characteristic of input signal, avoid the deficiency addressed in background technology, improve accuracy of timekeeping, the precision that further guaranteed flow detects.
Another object of the present invention is to provide a kind of timer expiration circuit, improves measuring accuracy.
For realizing above object, the technical solution used in the present invention is: a kind of timer expiration circuit, comprise amplifying circuit, amplifying circuit exports phase-shift circuit and the first detecting circuit to after original echoed signals is carried out amplitude amplification, phase-shift circuit exports the second detecting circuit to after the echoed signal after amplification is carried out phase shift, first and second detecting circuit exports the positive and negative phase input end of comparator circuit to after carrying out detection to the signal received respectively, the output terminal of comparator circuit with time m-digital conversion chip be connected.
Compared with prior art, there is following technique effect in the present invention: by the process to echoed signal, time m-digital conversion chip stopping timer time only parameter intrinsic to circuit is relevant, have nothing to do with the characteristic of input signal, avoid the deficiency addressed in background technology, improve accuracy of timekeeping, the precision that further guaranteed flow detects.
Another object of the present invention is to provide a kind of ultrasonic wave detecting system based on aforementioned circuit, the accuracy that guaranteed flow detects.
For realizing above object, the technical solution used in the present invention is: a kind of ultrasonic wave detecting system based on aforementioned circuit, comprise exiting signal generating circuit, analog switch, upstream ultrasonic transducer, downstream ultrasonic transducer and time m-digital conversion chip, the square wave excitation signal that exiting signal generating circuit produces exports upstream ultrasonic transducer or downstream ultrasonic transducer to through analog switch, m-digital conversion chip enable timing when the square wave excitation signal that exiting signal generating circuit produces exports to, the echoed signal that downstream ultrasonic transducer or upstream ultrasonic transducer export is successively through analog switch, when timer expiration circuit exports to, m-digital conversion chip stops timing.
Compared with prior art, there is following technique effect in the present invention: by the process to echoed signal, time m-digital conversion chip stopping timer time only parameter intrinsic to circuit is relevant, have nothing to do with the characteristic of input signal, avoid the deficiency addressed in background technology, improve accuracy of timekeeping, the precision that further guaranteed flow detects.
Accompanying drawing explanation
Fig. 1 is theory diagram of the present invention;
Fig. 2 is each signal waveforms of the present invention;
Fig. 3 is the circuit diagram of timer expiration circuit of the present invention.
Embodiment
Below in conjunction with Fig. 1 to Fig. 3, the present invention is described in further detail.
Consult Fig. 1, Fig. 2, a kind of timer expiration method, comprise the steps: that original echoed signals V0 is carried out amplitude and amplifies the echoed signal V1 after being amplified by (A); (B) the echoed signal V1 after amplification is carried out phase shift and obtain dephased echoed signal V2; (C) detection is carried out respectively to echoed signal V1, the dephased echoed signal V2 after amplification and obtain half-wave envelope signal V3, V4; (D) two-way half-wave envelope signal V3, V4 are carried out m-digital conversion chip 80 when amplitude com parison obtains negative pulse width signal V5 and exports to as timing stop pulse.In Fig. 2 with a kind of echoed signal for example, describe the oscillogram obtained handled by each step in detail, in the method, as can be seen from oscillogram we also, the negative edge moment of negative pulse width signal V5 is determined by the time delay between two-way half-wave envelope signal V3, V4, and the time delay of two-way half-wave envelope signal V3, V4 is determined by the phase-shift characterisitc of the phase-shift circuit 52 carrying out phase shift in step B, therefore, after a series of process, time m-digital conversion chip 80 the stopping timer time only intrinsic relating to parameters with circuit, with input signal characteristics have nothing to do.
Enlargement factor is too small, unsuitable follow-up process, and enlargement factor is excessive, easily produces distortion, and in therefore preferably described in the present embodiment steps A, enlargement factor is 4 ~ 9 times.In described step B, the echoed signal V1 after amplification and the phase differential between dephased echoed signal V2 are π/64 ~ π/32.
Consult Fig. 1, Fig. 3, the invention also discloses a kind of timer expiration circuit, comprise amplifying circuit 51, amplifying circuit 51 exports phase-shift circuit 52 and the first detecting circuit 53 to after original echoed signals is carried out amplitude amplification, phase-shift circuit 52 exports the second detecting circuit 54 to after the echoed signal after amplification is carried out phase shift, first and second detecting circuit 53,54 exports the positive and negative phase input end of comparator circuit 55 to after carrying out detection to the signal received respectively, the output terminal of comparator circuit 55 with time m-digital conversion chip 80 be connected.Here the setting of each circuit, realize each middle process in preceding method exactly, comprise amplitude amplification, phase shift, detection, compare, original echoed signals is after the process of electronic circuit each in timer expiration circuit, export a negative pulse width signal to time m-digital conversion chip 80 stop timing, ensure the accuracy of timing.
Particularly, described amplifying circuit 51 comprises operational amplifier U1A, U1B; The normal phase input end of operational amplifier U1A receives echoed signal, normal phase input end is also by resistance R7 ground connection, the inverting input of operational amplifier U1A is successively by resistance R1, electric capacity C3 ground connection, and inverting input is also connected with the output terminal of operational amplifier U1A respectively by resistance R2, electric capacity C1; The normal phase input end of operational amplifier U1B is connected with the output terminal of operational amplifier U1A, the inverting input of operational amplifier U1B is successively by resistance R3, electric capacity C4 ground connection, inverting input is also connected with the output terminal of operational amplifier U1B respectively by resistance R4, electric capacity C2, and the output terminal of operational amplifier U1B is connected with phase-shift circuit 52, first detecting circuit 53.Here by two operational amplifiers U1A, UAB, composition two-stage amplifying circuit, undistorted amplitude amplification is carried out to the echoed signal exported, enlargement factor is determined by the resistance configured, capacitance parameter, the enlargement factor of general single amplifying circuit is between 2-3 times, and the enlargement factor of whole amplifying circuit 51 is between 4-9 times.
Particularly, described phase-shift circuit 52 comprises voltage comparator U3, the normal phase input end of voltage comparator U3 is connected with the inverting input of voltage comparator U3 by resistance R15, R16 successively, draws a branch road and be connected with the output terminal of operational amplifier U1B between resistance R15, R16; The normal phase input end of voltage comparator U3 is by electric capacity C10 ground connection, and be connected with resistance R18 between the inverting input of voltage comparator U3 and output terminal, the output terminal of voltage comparator U3 is connected with the second detecting circuit 54.In phase-shift circuit 52, its input sinusoidal signal and the phase differential exported between sinusoidal signal are decided by the parameter of the electric capacity C10 configured and feedback resistance R18, and general phase differential is π/64 ~ π/32.
Particularly, the first described detecting circuit 53 comprises triode Q1, the base stage of triode Q1 is connected with the output terminal of operational amplifier U1B by electric capacity C6, the collector of triode Q1 is connected with the base stage of triode Q1 respectively by resistance R6, be connected with power supply by resistance R5, by electric capacity C5 ground connection, the emitter of triode Q1 is by resistance R10 ground connection, the emitter of triode Q1, also successively by electric capacity C7, resistance R8, electric capacity C8 ground connection, is drawn a branch road and is connected with the normal phase input end of comparator circuit through resistance R11 between resistance R8 and electric capacity C8; Second detecting circuit 54 is arranged between the inverting input of the output terminal of voltage comparator U3, comparator circuit 55, and the second detecting circuit 54 is formed with the components and parts of the first detecting circuit 53 and annexation is identical.By triode i.e. peripheral resistance, the electric capacity formation sinusoidal signal envelope detection circuit connected, the envelope waveform of exportable amplification or dephased echoed signal.
Particularly, described comparator circuit 55 comprises voltage comparator U2, is connected with resistance R9 between the power end of voltage comparator U2, output terminal, the output terminal of voltage comparator U2 with time m-digital conversion chip 80 be connected.
Above the concrete structure of each circuit be in the present invention preferred embodiment, other can realize amplification, phase shift, detection, comparing function circuit be also fine.
Present invention also offers a kind of ultrasonic wave detecting system based on aforementioned circuit, here the aforementioned circuit said is exactly the timer expiration circuit 50 addressed above, this ultrasonic wave detecting system comprises exiting signal generating circuit 10, analog switch 20, upstream ultrasonic transducer 30, downstream ultrasonic transducer 40 and time m-digital conversion chip 80, the square wave excitation signal that exiting signal generating circuit 10 produces exports upstream ultrasonic transducer 30 or downstream ultrasonic transducer 40 to through analog switch 20, when the square wave excitation signal that exiting signal generating circuit 10 produces exports to, m-digital conversion chip 80 starts timing, the echoed signal that downstream ultrasonic transducer 30 or upstream ultrasonic transducer 40 export is successively through analog switch 20, when timer expiration circuit 50 exports to, m-digital conversion chip 80 stops timing.When detecting, first exiting signal generating circuit 10 produces square wave excitation signal, when this square wave excitation signal one tunnel exports to, m-digital conversion chip 80 starts timing, another road exports upstream ultrasonic transducer 30 or downstream ultrasonic transducer 40 to through analog switch 20, produces ultrasonic signal after upstream ultrasonic transducer 30 or downstream ultrasonic transducer 40 receive square wave excitation signal.When detecting hyperacoustic following current duration, upstream ultrasonic transducer 30 sends ultrasound wave, and downstream ultrasonic transducer 40 receives ultrasound wave and produces echoed signal; When detecting hyperacoustic adverse current duration, downstream ultrasonic transducer 40 sends ultrasound wave, and upstream ultrasonic transducer 30 receives ultrasound wave and produces echoed signal.After upstream ultrasonic transducer 30 or downstream ultrasonic transducer 40 receive echoed signal, when analog switch 20, timer expiration circuit 50 export to, m-digital conversion chip 80 stops timing.Due to echoed signal here have passed through timer expiration circuit 50 process after export to again time m-digital conversion chip 80, during guarantee, m-digital conversion chip 80 can stop timing in time, avoids the impact of outside noise interference and ultrasonic sensor impedance operator.
Preferably, comprise first, second triple gate 60,70, the output terminal of exiting signal generating circuit 10 is connected with the common port of analog switch 20, the output terminal of exiting signal generating circuit 10 by the first triple gate 60 with time m-digital conversion chip 80 be connected, the common port of analog switch 20 pass through successively timer expiration circuit 50, second triple gate 70 with time m-digital conversion chip 80 be connected.By arranging two triple gates, by export high-impedance state cut off invalid signal: when exiting signal generating circuit 10 produce square wave excitation signal to time m-digital conversion chip 80 start timing, the second triple gate 70 is high-impedance states; When echoed signal m-digital conversion chip 80 when analog switch 20, timer expiration circuit 50 export to stops timing, the first triple gate 60 is high-impedance states.
Claims (10)
1. a timer expiration method, comprises the steps:
(A) original echoed signals V0 is carried out amplitude and amplify the echoed signal V1 after being amplified;
(B) the echoed signal V1 after amplification is carried out phase shift and obtain dephased echoed signal V2;
(C) detection is carried out respectively to echoed signal V1, the dephased echoed signal V2 after amplification and obtain half-wave envelope signal V3, V4;
(D) two-way half-wave envelope signal V3, V4 are carried out m-digital conversion chip (80) when amplitude com parison obtains negative pulse width signal V5 and exports to as timing stop pulse.
2. timer expiration method as claimed in claim 1, it is characterized in that: in described steps A, enlargement factor is 4 ~ 9 times.
3. timer expiration method as claimed in claim 1, it is characterized in that: in described step B, the echoed signal V1 after amplification and the phase differential between dephased echoed signal V2 are π/64 ~ π/32.
4. a timer expiration circuit, it is characterized in that: comprise amplifying circuit (51), amplifying circuit (51) exports phase-shift circuit (52) and the first detecting circuit (53) to after original echoed signals is carried out amplitude amplification, phase-shift circuit (52) exports the second detecting circuit (54) to after the echoed signal after amplification is carried out phase shift, first, two detecting circuits (53, 54) just comparator circuit (55) is being exported respectively to after detection being carried out to the signal received, inverting input, the output terminal of comparator circuit (55) with time m-digital conversion chip (80) be connected.
5. timer expiration circuit as claimed in claim 4, is characterized in that: described amplifying circuit (51) comprises operational amplifier U1A, U1B; The normal phase input end of operational amplifier U1A receives echoed signal, normal phase input end is also by resistance R7 ground connection, the inverting input of operational amplifier U1A is successively by resistance R1, electric capacity C3 ground connection, and inverting input is also connected with the output terminal of operational amplifier U1A respectively by resistance R2, electric capacity C1; The normal phase input end of operational amplifier U1B is connected with the output terminal of operational amplifier U1A, the inverting input of operational amplifier U1B is successively by resistance R3, electric capacity C4 ground connection, inverting input is also connected with the output terminal of operational amplifier U1B respectively by resistance R4, electric capacity C2, and the output terminal of operational amplifier U1B is connected with phase-shift circuit (52), the first detecting circuit (53).
6. timer expiration circuit as claimed in claim 5, it is characterized in that: described phase-shift circuit (52) comprises voltage comparator U3, the normal phase input end of voltage comparator U3 is connected with the inverting input of voltage comparator U3 by resistance R15, R16 successively, draws a branch road and be connected with the output terminal of operational amplifier U1B between resistance R15, R16; The normal phase input end of voltage comparator U3 is by electric capacity C10 ground connection, and be connected with resistance R18 between the inverting input of voltage comparator U3 and output terminal, the output terminal of voltage comparator U3 is connected with the second detecting circuit (54).
7. timer expiration circuit as claimed in claim 6, it is characterized in that: described the first detecting circuit (53) comprises triode Q1, the base stage of triode Q1 is connected with the output terminal of operational amplifier U1B by electric capacity C6, the collector of triode Q1 is connected with the base stage of triode Q1 respectively by resistance R6, be connected with power supply by resistance R5, by electric capacity C5 ground connection, the emitter of triode Q1 is by resistance R10 ground connection, the emitter of triode Q1 is also successively by electric capacity C7, resistance R8, electric capacity C8 ground connection, draw a branch road between resistance R8 and electric capacity C8 to be connected with the normal phase input end of comparator circuit through resistance R11, second detecting circuit (54) is arranged between the inverting input of the output terminal of voltage comparator U3, comparator circuit (55), and the second detecting circuit (54) is formed with the components and parts of the first detecting circuit (53) and annexation is identical.
8. timer expiration circuit as claimed in claim 7, it is characterized in that: described comparator circuit (55) comprises voltage comparator U2, be connected with resistance R9 between the power end of voltage comparator U2, output terminal, the output terminal of voltage comparator U2 with time m-digital conversion chip (80) be connected.
9. the ultrasonic wave detecting system based on circuit described in claim 4, comprise exiting signal generating circuit (10), analog switch (20), upstream ultrasonic transducer (30), downstream ultrasonic transducer (40) and time m-digital conversion chip (80), the square wave excitation signal that exiting signal generating circuit (10) produces exports upstream ultrasonic transducer (30) or downstream ultrasonic transducer (40) to through analog switch (20), it is characterized in that: when the square wave excitation signal that exiting signal generating circuit (10) produces exports to, m-digital conversion chip (80) starts timing, the echoed signal that downstream ultrasonic transducer (30) or upstream ultrasonic transducer (40) export is successively through analog switch (20), when timer expiration circuit (50) exports to, m-digital conversion chip (80) stops timing.
10. ultrasonic wave detecting system as claimed in claim 9, it is characterized in that: comprise first, second triple gate (60,70), the output terminal of exiting signal generating circuit (10) is connected with the common port of analog switch (20), the output terminal of exiting signal generating circuit (10) by the first triple gate (60) with time m-digital conversion chip (80) be connected, the common port of analog switch (20) pass through successively timer expiration circuit (50), the second triple gate (70) with time m-digital conversion chip (80) be connected.
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| CN201510402543.0A CN105157772B (en) | 2015-07-10 | 2015-07-10 | Timer expiration method and circuit and ultrasonic wave detecting system based on the circuit |
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| CN201510402543.0A CN105157772B (en) | 2015-07-10 | 2015-07-10 | Timer expiration method and circuit and ultrasonic wave detecting system based on the circuit |
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| CN105157772B CN105157772B (en) | 2018-09-25 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107478305A (en) * | 2017-07-10 | 2017-12-15 | 辽宁航宇星物联仪表科技有限公司 | Ultrasonic wave gas meter measurement apparatus based on TDC7200 and TDC1000 |
| CN108847827A (en) * | 2018-09-03 | 2018-11-20 | 浙江蓝宝石仪表科技有限公司 | A kind of continuous variable gain amplifying circuit applied to ultrasonic wave gas meter |
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