CN105141562A - Communication system and synchronization method thereof - Google Patents
Communication system and synchronization method thereof Download PDFInfo
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- CN105141562A CN105141562A CN201510349738.3A CN201510349738A CN105141562A CN 105141562 A CN105141562 A CN 105141562A CN 201510349738 A CN201510349738 A CN 201510349738A CN 105141562 A CN105141562 A CN 105141562A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
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- H04L27/2655—Synchronisation arrangements
Abstract
The invention relates to a communication system and a synchronization method thereof. A sending end sends data frames including a first training sequence A, a second training sequence C, a third training sequence D, a circulation prefix CP and data symbols; and a receiving end receives the data frames and implements the following steps that S1) the first training sequence A is used to detect the data frames in a parallel code phase searching algorithm, obtains an estimated coarse frequency offset value to correct the coarse frequency offset value, and further obtains a data symbol after coarse frequency offset correction; S2) the second training sequence C is used for estimation of fine frequency offset to correct the fine frequency offset value, and further obtains a data symbol after fine frequency offset correction; and S3) the second training sequence C and the third training sequence D are used for symbol timing estimation. According to the system and method, influence of noises can be effectively resisted, sufficiently large frequency offset can be corrected within a large carrier frequency offset detection range, the complexity of hardware realization and resource consumption of FPGA algorithm realization can be reduced, and the synchronization precision can be sufficiently high.
Description
Technical field
The present invention relates to the communications field, more particularly, relate to a kind of communication system and synchronous method thereof.
Background technology
Along with the development of the low-power reception technology of anti-fading technology and wireless signal, under following Low SNR, the research of SC-FDE will become a focus, particularly " weightless " (a kind of wide area technology of Internet of things standard of low-power consumption) using the prevailing transmission scheme of SC-FDE technology as physical layer.Under Low SNR, realize M2M, not only need to average out between signal to noise ratio and data throughput and compromise, also requirement can realize the anti-multipath transmission of signal in 15 kilometers.For low signal-to-noise ratio M2M (MachinetoMachine, machine and inter-machine communication) digital communication system, it is synchronously a very important problem.
Before and after traditional SC-FDE system synchronization algorithm multiplex Received signal strength itself, two parts are correlated with the design carrying out algorithm, and the algorithm based on this thought is insensitive to frequency deviation size, and also can solve the problem that signal Multipath Transmission brings to a certain extent.But these synchronized algorithms are all towards comparatively high s/n ratio substantially, and synchronization accuracy is poor, trace it to its cause mainly very sensitive to noise because utilize Received signal strength itself to do relevant method, when signal to noise ratio is poor, net synchronization capability is very poor.When the signal to noise ratio of Received signal strength is lower, when simultaneously carrier wave frequency deviation scope is larger again, traditional synchronized algorithm is often difficult to the synchronous of the degree of precision of settling signal.
Therefore, need to develop a kind of simultaneous techniques towards low signal-to-noise ratio wireless communication receiver system.
Summary of the invention
The technical problem to be solved in the present invention is, for the defect of the net synchronization capability difference of SC-FDE system synchronization algorithm traditional under the Low SNR of prior art, there is provided a kind of communication system synchronization method and adopt the communication system of this synchronous method, it can realize the precise synchronization of signal.
The technical solution adopted for the present invention to solve the technical problems is: provide
A kind of communication system synchronization method, the transmitting terminal of this communication system sends the Frame comprising the first training sequence A, the second training sequence C, the 3rd training sequence D, cyclic prefix CP and data symbol, and receiving terminal receives described Frame and performs following steps:
S1. the first training sequence A is utilized to adopt parallel code phase search algorithm carry out the detection of Frame and acquire coarse frequency offset value to correct thick frequency deviation value thus to obtain the data symbol after thick correcting frequency deviation;
S2. the second training sequence C is utilized to carry out thin frequency deviation estimation, to correct thin frequency deviation value thus to obtain the data symbol after meticulous correcting frequency deviation; And
S3. the second training sequence C and the 3rd training sequence D is utilized to carry out Symbol Timing estimation;
Wherein,
Described first training sequence A by Cycle Length be L1 ZC sequence repeat form for T1 time, wherein, L1 and T1 is positive integer, and 4≤L1≤12,3000≤T1≤5000, wherein the value of T1 depends on L1, maximum frequency deviation scope and signal to noise ratio;
Described second training sequence C by Cycle Length be L3 ZC sequence repeat form for T3 time, wherein, L3 and T3 is positive integer, and 128≤L3≤512,12≤T3≤48;
Described 3rd training sequence D is repeat T4 time after the ZC sequence negate of L3 to form by Cycle Length, and wherein, T4 is positive integer, and T3/8≤T4≤T3/4.
In communication system synchronization method of the present invention, being arranged so that of the length of described cyclic prefix CP introduces a lead Ng to Symbol Timing estimation point in step s3, and for main footpath be not the first footpath multipath channel described in the size of lead Ng be at least greater than the maximum delay in main footpath and the first footpath.
In communication system synchronization method of the present invention, step S1 comprises:
S1-1. the quadrature carrier that the signal received and digital oscillator (NCO) produce is carried out mixing operation, then the output of mixing and local training sequence are utilized FFT (fast fourier transform) module and IFFT (invert fast fourier transformation) module to carry out related operation, obtain the result of related operation;
S1-2. utilize the mode of periodic accumulation to realize the coherent integration of predetermined length to the result of described related operation, modulo operation is exported to I and the Q two-way after coherent integration and after summed square, obtains final detection decision content V;
S1-3. the threshold value Vt of described detection decision content V and setting is compared, to determine whether Frame to be detected; And
When Frame being detected, frame detection module quits work and provides DDS frequency values now as described coarse frequency offset value;
When Frame not detected, upgrading the frequency values of DDS and repeating step S1-1 and re-start search to step S1-3, until Frame detected.
In communication system synchronization method of the present invention,
The length N of described FFT (fast fourier transform) is 1024 points, and the length of described cyclic prefix CP is greater than 91 points, the time interval T of transmitting terminal adjacent-symbol
sbe 0.2 μ s; And, in described first training sequence A, L1=8, T1=3800; In described second training sequence C, L2=256, T2=24; In described 3rd training sequence D, T3=4.
In communication system synchronization method of the present invention,
Step S2 comprises: utilize local training sequence to carry out related operation with the second training sequence C received, and the result of related operation added up 8 times, estimates with the thin frequency deviation of carrying out carrier wave;
Step S3 comprises: utilize the result of local training sequence and the second training sequence C received and the 3rd training sequence D related operation to carry out Symbol Timing estimation to data symbol; And
The length of described cyclic prefix CP is 128 points, the signal to noise ratio of described communication system is low to moderate-15dB and maximum normalization carrier wave frequency deviation value is 1.2.
In communication system synchronization method of the present invention, the result of related operation is utilized to add up in step S2 to carry out for 8 times the thin frequency deviation of carrier wave to estimate to comprise further:
The correlation peak point that continuous print 16 sub-sequence pair in second training sequence C are answered is divided into front and back two parts, and then front 8 values and rear 8 values calculate thin frequency deviation estimated value after being added respectively, and formula is as follows:
Wherein:
Wherein r (d) represents the data symbol after thick correcting frequency deviation, and m (d) represents local training sequence,
represent thin frequency deviation estimated value.
In communication system synchronization method of the present invention, step S3 comprises: utilize the output of following time measure function to obtain peak point, and the index calculation recycling described peak point goes out the position of the 3rd training sequence D, thus completes Symbol Timing estimation,
Wherein, r (d) represents the data symbol after thick correcting frequency deviation, and m (d) represents local training sequence.
The present invention solves another technical scheme that its technical problem adopts: construct a kind of communication system, it comprises the synchronizer being arranged at receiving terminal, the data frame packet that the transmitting terminal of described communication system sends contains the first training sequence A, the second training sequence C, the 3rd training sequence D, cyclic prefix CP and data symbol, and described synchronizer comprises:
Frame detection module, it utilizes the first training sequence A to adopt parallel code phase search algorithm carry out the detection of Frame and acquire coarse frequency offset value to correct thick frequency deviation value thus to obtain the data symbol after thick correcting frequency deviation;
Thin correcting frequency deviation module, it utilizes the second training sequence C to carry out thin frequency deviation estimation, to correct thin frequency deviation value thus to obtain the data symbol after meticulous correcting frequency deviation; And
Symbol Timing module, it utilizes the second training sequence C and the 3rd training sequence D to carry out Symbol Timing estimation;
Wherein,
Described first training sequence A by Cycle Length be L1 ZC sequence repeat form for T1 time, wherein, L1 and T1 is positive integer, and 4≤L1≤12,3000≤T1≤5000, wherein the value of T1 depends on L1, maximum frequency deviation scope and signal to noise ratio;
Described second training sequence C by Cycle Length be L3 ZC sequence repeat form for T3 time, wherein, L3 and T3 is positive integer, and 128≤L3≤512,12≤T3≤48
Described 3rd training sequence D is repeat T4 time after the ZC sequence negate of L3 to form by Cycle Length, and wherein, T4 is positive integer, and T3/8≤T4≤T3/4; And,
The length of described cyclic prefix CP be arranged so that described Symbol Timing module introduces a lead Ng to Symbol Timing estimation point, and for main footpath be not the first footpath multipath channel described in the size of lead Ng be at least greater than the maximum delay in main footpath and the first footpath.
In communication system of the present invention, described frame detection module comprises:
Frequency mixing module, carries out mixing for the quadrature carrier signal received and digital oscillator (NCO) produced;
One FFT (fast fourier transform) module, for carrying out fast fourier transform to the output of mixing;
2nd FFT (fast fourier transform) module, for carrying out fast fourier transform to local training sequence;
Conjugate module, for carrying out complex conjugate computing to the output of the 2nd FFT module;
IFFT (invert fast fourier transformation) module, carrying out invert fast fourier transformation for exporting the mixing of fast fourier transform computing and complex conjugate computing, obtaining the I component after related operation and Q component;
I component coherent integration module, utilizes the mode of periodic accumulation to carry out the coherent integration of predetermined length to the I component after related operation;
Q component coherent integration module, utilizes the mode of periodic accumulation to carry out the coherent integration of predetermined length to the Q component after related operation;
I component delivery and squaring module, for the I component modulo operation after coherent integration and square, obtain I
2;
Q component delivery and squaring module, for the Q component modulo operation after coherent integration and square, obtain Q
2;
Addition module, for I
2and Q
2carry out add operation, obtain detecting decision content V;
Comparison module, compares the threshold value Vt of described detection decision content V and setting, to determine whether Frame to be detected.
In communication system of the present invention,
Described thin correcting frequency deviation module utilizes local training sequence to carry out related operation with the second training sequence C received, and the thin frequency deviation of carrying out carrier wave for 8 times that the result of related operation added up is estimated;
Described Symbol Timing module utilizes the result of local training sequence and the second training sequence C received and the 3rd training sequence D related operation to carry out Symbol Timing estimation to data symbol.
Implement the present invention, there is following beneficial effect: for low signal-to-noise ratio communication system, such as low signal-to-noise ratio SC-FDE system, ofdm system etc., the present invention is owing to have employed parallel code phase search algorithm and Frame has sufficiently long first training sequence A, thus effectively antimierophonic impact can be supported, and larger carrier wave frequency deviation detection range can be realized, correct enough large frequency deviation, the high-precise synchronization of settling signal; Solve the problem of the net synchronization capability difference of conventional synchronization algorithm under Low SNR, good net synchronization capability can be obtained under Low SNR.
Have again, length due to the cyclic prefix CP in Frame is arranged to introduce a lead Ng to Symbol Timing estimation point, ensure that the accuracy that final Symbol Timing is estimated, thus solve the problem causing demodulation losses large because timing point is delayed when the main footpath of wireless fading channel is not the first footpath.
Estimate and Symbol Timing estimation because the present invention utilizes training sequence C and training sequence D to combine thin frequency deviation, hard-wired complexity can be reduced, reduce the length of correlator, thus the resource that algorithm FPGA realizes consuming can be greatly reduced, be easy to actual popularization.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the invention will be further described, in accompanying drawing:
Fig. 1 is the structural representation of the Frame adopted in communication system synchronization method of the present invention;
Fig. 2 is the flow chart of communication system synchronization method of the present invention;
Fig. 3 is the flow chart adopting parallel code phase search algorithm in communication system synchronization method of the present invention;
Fig. 4 is the structural representation of the Frame adopted in communication system synchronization method according to an embodiment of the invention;
Fig. 5 adopts the detection peak of parallel code phase search algorithm with the schematic diagram of the change of carrier wave frequency deviation in communication system synchronization method of the present invention;
Under Figure 6 shows that awgn channel condition, the schematic diagram of the result that the second training sequence C related operation is also cumulative;
Under Fig. 7 a is depicted as noise free conditions, the schematic diagram of the result (relevant real part) of the second training sequence C and the 3rd training sequence D related operation;
Under Fig. 7 b is depicted as noise free conditions, the schematic diagram of the result (relevant imaginary part) of the second training sequence C and the 3rd training sequence D related operation;
Under Figure 8 shows that awgn channel condition, the time measure schematic diagram of synchronized algorithm of the present invention;
Fig. 9 a is depicted as the discrete impulse response figure that main footpath is the multipath channel in the first footpath;
Fig. 9 b is depicted as the discrete impulse response figure that main footpath is not the multipath channel in the first footpath.
Embodiment
The present invention relates to a kind of low signal-to-noise ratio SC-FDE (SingleCarrierFrequencyDomainEqualization in wide area Internet of Things M2M communication system, single carrier frequency domain equalization) system synchronization algorithm, be applicable to the low signal-to-noise ratio SC-FDE system that long distance of signal transmission, efficiency requirements are not high, also extend in other communication systems, such as ofdm system.
Fig. 1 is the structural representation of the Frame adopted in communication system synchronization method of the present invention.As shown in Figure 1, in the present invention, adopted data frame packet is communicated between the transmitting terminal of communication system and receiving terminal containing training sequence, cyclic prefix CP and load (i.e. data symbol).Wherein, this training sequence comprises the first training sequence A, the second training sequence C and the 3rd training sequence D, and the ZC sequence that the first training sequence A is L1 by Cycle Length repeats to form for T1 time, the ZC sequence that second training sequence C is L2 by Cycle Length repeats to form for T2 time, and the 3rd training sequence D is repeat T3 time after the ZC sequence negate of L2 to form by Cycle Length.L1 and T1 is positive integer, and 4≤L1≤12,3000≤T1≤5000, wherein the value of T1 depends on the size of L1, maximum frequency deviation scope and signal to noise ratio; L2 and T2 is positive integer, and 128≤L2≤512,12≤T2≤48; T3 is positive integer, and T2/8≤T3≤T2/4.
In the communication process of communication system of the present invention, transmitting terminal sends the Frame of above-mentioned frame format, and receiving terminal receives this Frame and carries out signal simultaneous operation.Wherein the synchronous method of communication system is performed by synchronizer, and this synchronizer comprises frame detection module, thin correcting frequency deviation module and Symbol Timing module.
Fig. 2 is the flow chart of communication system synchronization method of the present invention.As shown in Figure 2, the step S2 that communication system synchronization method of the present invention comprises the step S1 performed by the frame detection module of the synchronizer in receiving terminal, thin correcting frequency deviation module performs and the step S3 that Symbol Timing module performs, each step is specific as follows:
Step S1: utilize the first training sequence A to adopt parallel code phase search algorithm to carry out the detection (namely carrying out frame-grab) of Frame, thus acquire coarse frequency offset value in order to correct thick frequency deviation value, then obtain the data symbol after thick correcting frequency deviation.
Step S2: utilize the second training sequence C to carry out thin frequency deviation estimation, obtain thin frequency deviation estimated value, in order to correct thin frequency deviation value thus to obtain the data symbol after meticulous correcting frequency deviation.
Step S3: utilize the second training sequence C and the 3rd training sequence D to carry out Symbol Timing estimation, to carry out Timing Synchronization.
Below step S1-S3 is described in detail respectively.
First the frame detection in step S1 and coarse frequency offset are described.
When the signal to noise ratio of Received signal strength is lower, when simultaneously carrier wave frequency deviation scope is larger again, traditional synchronized algorithm is often difficult to the synchronous of the degree of precision of settling signal.In the step S1 of synchronous method of the present invention, Frame detects the parallel code phase search algorithm adopted and has used for reference signal search algorithm in GPS to complete the detection of Frame.For GPS, it is generally the search utilizing sufficiently long training sequence in transmitter to complete code sequence, carrier frequency and code phase three-dimensional to satellite-signal, due to be used in communication system of the present invention frame detect training sequence A be fixing, so only need the two-dimensional search Unit Design algorithm in carrier frequency and code phase.The principle of this joint detection algorithm is simple, as long as and in theory training sequence long enough just effectively can support antimierophonic impact, and larger frequency deviation detection range can be realized.Consider the length of training sequence A and the complexity of algorithm, the present invention adopts parallel code phase search algorithm.
In some embodiments of the invention, the step S1 performed by frame detection module in communication system synchronization method adopt the flow process of parallel code phase search algorithm as shown in Figure 3.
Wherein:
In step S1-1, the quadrature carrier that the signal received and digital oscillator (NCO) produce carries out mixing operation, then the output of mixing and local training sequence are utilized FFT (fast fourier transform) module and IFFT (invert fast fourier transformation) module to carry out related operation, obtain the result of related operation;
In step S1-2, utilize the mode of periodic accumulation to realize the coherent integration of predetermined length to the result of the related operation that step S1-1 obtains, modulo operation is exported to I and the Q two-way after coherent integration and after summed square, obtains final detection decision content V;
In step S1-3, the threshold value Vt detecting decision content V and setting is compared, to determine whether Frame to be detected; And
When Frame being detected, frame detection module quits work and provides DDS frequency values now as described coarse frequency offset value; When Frame not detected, upgrading the frequency values of DDS and repeating step S1-1 and re-start search to step S1-3, until Frame detected.
Fig. 3 also show the structure of example frame detection module, and it comprises:
Frequency mixing module, carries out mixing for the quadrature carrier signal received and digital oscillator (NCO) produced;
One FFT (fast fourier transform) module, for carrying out fast fourier transform to the output of mixing;
2nd FFT (fast fourier transform) module, for carrying out fast fourier transform to local training sequence;
Conjugate module, for carrying out complex conjugate computing to the output of the 2nd FFT module;
IFFT (invert fast fourier transformation) module, invert fast fourier transformation is carried out in the output for the mixing to fast fourier transform computing and complex conjugate computing, obtains the I component after related operation and Q component;
I component coherent integration module, utilizes the mode of periodic accumulation to carry out the coherent integration of predetermined length to the I component after related operation;
Q component coherent integration module, utilizes the mode of periodic accumulation to carry out the coherent integration of predetermined length to the Q component after related operation;
I component delivery and squaring module, for the I component modulo operation after coherent integration and square, obtain I
2;
Q component delivery and squaring module, for the Q component modulo operation after coherent integration and square, obtain Q
2;
Addition module, for I
2and Q
2carry out add operation, obtain detecting decision content V;
Comparison module, compares the threshold value Vt of described detection decision content V and setting, to determine whether Frame to be detected.
For ease of understanding the present invention, below by way of an embodiment, the algorithm in communication system synchronization method of the present invention is described.In this embodiment, the several important technical indicator of communication system is as follows:
(1) FFT (FastFourierTransform, fast fourier transform) length N is 1024 points, and Cyclic Prefix (CyclicPrefix is called for short CP) length is 128 points, and mark space Ts equals 0.2 μ s;
(2) signal to noise ratio is low to moderate-15dB, and maximum normalization carrier wave frequency deviation value is 1.2;
(3) two kinds of multipath channel models are as shown in table 1;
(4) the training sequence configuration parameter in Frame as shown in table 2 and Fig. 4, namely in the first training sequence A, L1=8, T1=3800; In described second training sequence C, L2=256, T2=24; In 3rd training sequence D, L2=256, T3=4.
Table 1 multipath channel models
Table 2 training sequence parameter configuration
Adopt parallel code phase search algorithm to realize the detection of Frame, need to determine frequency search stepping f
binwith coherent integration time T
cohtwo parameters.I and Q two-way output signal after coherent integration can be expressed as:
I(n)＝aR(τ)sinc(f
eT
coh)cosφ
e+n
I(1)
Q(n)＝aR(τ)sinc(f
eT
coh)sinφ
e+n
Q(2)
In formula, a represents the amplitude of input signal, and τ is the phase difference between training sequence and local training sequence received, f
erepresent the carrier frequency of Received signal strength and the difference of local carrier frequency, φ
efor phase difference between the two, T
cohrepresent the time of coherent integration, R (t) represents the ZC sequence auto-correlation function that maximum is 1, n
iand n
qrepresent the noise on I road and Q road respectively.Do not consider noise effect, then when training sequence A being detected (τ=0), detection decision content now can be expressed as:
V＝I
2+Q
2＝a
2|sinc(f
eT
coh)|
2(3)
Can be found out by above formula, carrier frequency offset f
ecan introduce final time measure | sinc (f
et
coh) |
2the loss of multiple, this can increase the loss of signal and reduce the sensitivity of signal capture.In order to reduce the probability that loss event occurs, the difference of General Requirements Received signal strength carrier frequency and local carrier frequency controls within 3dB, because
so the absolute value of frequency error should be no more than 0.443/T in theory
coh, i.e. frequency search stepping f
bin<0.886/T
coh.And in actual applications, then require that the searching strip width values of frequency is less, to reduce loss further, so final design general satisfaction:
Here coefficient 2/3 can make the overlap that exists between adjacent two three dB bandwidths to a certain degree, and above formula also show frequency search stepping f
binwith coherent integration time T
cohbetween be inversely proportional to.Consider the scope that in follow-up step S2, thin frequency deviation is estimated, after algorithm requires that thick frequency deviation value is corrected, the maximum normalization carrier wave frequency deviation value of signal is limited within 0.25, i.e. f
bin<0.25/NT
s, the coherent integration training sequence length that after converting, known single frequency band is corresponding is at least (T
coh/ T
s) >8N/3 ≈ 2730 point, namely Cycle Length L1 be 8 subsequence at least need repetition 341 times.Because the maximum normalization carrier wave frequency deviation value of system is 1.2, so only need with the centre frequency f of signal in theory
efor frequency totally 11 frequency bands, so in the present embodiment, total number of repetition T1 of algorithm design is 3800 times, is greater than 341 × 11=3751 time.In other embodiments of the invention, Cycle Length L1 and total number of repetition T1 can need flexible design by reality, mainly carrys out design parameter according to maximum frequency deviation scope and signal to noise ratio.
Fig. 5 adopts the detection peak of parallel code phase search algorithm with the schematic diagram of the change of carrier wave frequency deviation in communication system synchronization method of the present invention, it is at AWGN (AdditiveWhiteGaussianNoise, additive white Gaussian noise) under channel condition, when emulation signal to noise ratio is-15dB, the simulation result that parallel code phase search algorithm detection peak changes with carrier wave frequency deviation.Can be found out by analogous diagram, when searching correct frequency band, the peak value that frame detects, much larger than the testing result of nearby frequency bands, as long as so reasonably can arrange acquisition threshold just can ensure that Frame can be properly detected, also meets the requirement of coarse frequency offset precision simultaneously.
Next, estimate to be described to the thin frequency deviation of step S2.
In step S2, utilize local training sequence to carry out related operation with the second training sequence C received, and the result of related operation is added up 8 times, estimate with the thin frequency deviation of carrying out carrier wave.
Because the subsequence Cycle Length L2 of training sequence C only has 256, therefore only utilize the result of a related operation, obvious correlation peak cannot be obtained when signal to noise ratio is lower.In order to obtain good Detection results, the algorithm that synchronous method of the present invention adopts is by supporting antimierophonic impact 8 times to the correlated results of training sequence C is cumulative.What Fig. 6 represented is under awgn channel condition, during SNR=-15dB, after local training sequence is relevant to the training sequence C received and the simulation result of cumulative 8 times.Can being found out by analogous diagram, as long as by reasonably arranging detection threshold, just training sequence C can be detected accurately, the original position of certain subsequence of training sequence C can be determined simultaneously.But now can not determine the original position of training sequence C, this is because along with the difference emulating signal to noise ratio, it is different for detecting the subsequence number consumed, but at most only consumes 8 subsequences when can know and training sequence C be detected.
The thin frequency deviation estimation of this synchronized algorithm is directly realized by the phase difference that calculating twice correlation peak point is corresponding, but the length due to training sequence directly determines scope and the precision of thin Nonlinear Transformation in Frequency Offset Estimation, so in order to obtain good thin frequency offset estimation accuracy, after training sequence C being detected, the result of back to back 16 subsequence related operations can be utilized to complete thin frequency deviation and to estimate.Concrete calculation process is: the correlation peak point that continuous print 16 sub-sequence pair are answered is divided into front and back two parts, and then front 8 values and rear 8 values are added respectively, so just can obtain being equal to two correlations in structure 1, and can be expressed as:
Wherein:
Here r (d) represents the data symbol after thick correcting frequency deviation, and m (d) represents local training sequence.Utilize computational methods above, just can obtain enough thin Nonlinear Transformation in Frequency Offset Estimation precision in theory.
Finally, estimate to be described to step S3 Symbol Timing.
In step S3, the result of local training sequence and the second training sequence C received and the 3rd training sequence D related operation is utilized to carry out Symbol Timing estimation to data symbol.When the subsequence that the sequence detected four is training sequence C, 4 is the subsequence of training sequence D, then now due to both contrary characteristics, can occur a very large correlation peak, thus the position of training D can be found, complete corresponding Symbol Timing and estimate.
Owing to being contrary relation between the second training sequence C and the 3rd training sequence D, and after meticulous correcting frequency deviation, the inherent spurious frequency deviation of data symbol is very little, just superpose a random phase place, now again training sequence C and D and local training sequence are carried out the simulation result that related operation just can obtain as shown in figs. 7 a and 7b, wherein Fig. 7 a is depicted as relevant live, and Fig. 7 b is depicted as relevant imaginary part.It should be noted that, in order to show the comparison between these two training sequence correlation calculation result clearly, this emulation obtains not having noisy situation, and in fact at about SNR<-2dB, the correlation peak of training sequence can substantially all be flooded by noise.The time measure function of algorithm design is:
What Fig. 8 represented is under awgn channel condition, when emulation signal to noise ratio is-15dB, and the time measure simulation result of this algorithm.As can be seen from analogous diagram, the now output of the time measure function of this algorithm can obtain a peak point clearly, utilizes the index of this peak point just accurately can calculate the position of training sequence D, thus completes Symbol Timing estimation.
That is, in communication system synchronization method of the present invention, can only sequence C be detected, but can not determine its original position.It is carry out related operation according to training sequence C and D and local training sequence that its Symbol Timing is estimated, utilize the time measure function of algorithm design to export and obtain a peak point clearly, the index recycling this peak point accurately calculates the position of training sequence D, thus completes Symbol Timing estimation.
Finally, the problem that the Symbol Timing point caused when the main footpath considering Received signal strength is not its first footpath is delayed, also needs to revise the position of timing point.As previously mentioned, step S3 utilizes the result of local training sequence and the training sequence C received and D related operation to carry out Symbol Timing estimation to data symbol.But some communication systems such as SC-FDE system nature is a kind of system of anti-multipath, the design of various synchronized algorithm must ensure still can realize the synchronous of degree of precision under multi-path channel conditions.The algorithm utilizing local training sequence and the result of training sequence related operation received to realize Symbol Timing to estimate, key is the delayed problem of the Symbol Timing point that causes when to solve the main footpath of Received signal strength be not its first footpath, because timing point is delayed will cause very large demodulation losses.The discrete impulse response of what Fig. 9 a and 9b represented is two kinds of typical multipath channel, the multipath channel wherein in Fig. 9 a represents that main footpath is the multipath channel in the first footpath, and Fig. 9 b represents that main footpath is not the multipath channel in the first footpath.In fact the two kinds of channel models provided in table 1 just represent the multipath channel of these two kinds of different qualities respectively.
In radio communication, the main footpath of most of multipath channel is all its first footpath, and for the multipath channel that main footpath is not the first footpath, time delay is between the two general also very little.Suppose that the Symbol Timing point index determined by main footpath is N
uas long as then shift to an earlier date N to it
gpoint just can ensure that Symbol Timing estimation point can not lag behind the first footpath.If the position of revised Symbol Timing point is Nv, then it can be expressed as:
N
v＝N
u-N
g(8)
N in formula
gsize at least must be greater than the maximum delay in main footpath and the first footpath, so just can ensure the arrival moment in advanced first footpath, revised Symbol Timing point position.Simultaneously in order to make Symbol Timing estimation point can not exceed without ISI district, the length of CP also will meet certain requirement.Because the exact symbol timing estimation point of SC-FDE and ofdm system is all a scope, as long as so it is accurately that the length suitably increasing Cyclic Prefix just can ensure that final Symbol Timing is estimated.
Therefore, in the present invention, in the design of data frame structure, being arranged so that of the length of cyclic prefix CP introduces a lead Ng to Symbol Timing estimation point in step s3, and is not the maximum delay that the size of the multipath channel lead Ng in the first footpath is at least greater than main footpath and the first footpath for main footpath.
Such as with kind of the multipath channel models of two in table 1 as a reference, the main footpath of the second multipath channel is 2.4 μ s relative to the peak signal time delay in the first footpath, the first channel model comprehensive, this can be understood as wireless signal after the transmission of reality, and the time in delayed first footpath, main footpath is between 0 to 2.4 μ s.The time interval due to transmitting terminal adjacent-symbol is 0.2 μ s, considers limiting case, as long as in fact meet N
g>=12 just can ensure that Symbol Timing point can not lag behind the first footpath.First footpath of signal and the time of delay in last footpath are 15.8 μ s as can be seen from the table simultaneously, namely corresponding 79 symbolic points, consider the loss that Symbol Timing is estimated to bring, as long as the length meeting CP is greater than at 91, and in the present embodiment, the CP length set in system is 128 points, obviously meets the requirement of design.
In some embodiments of the present invention, the length of CP and the length of FFT be all according to 2 integral number power calculate.Obtain N point data after calling fft (x, N), in fact this N point data is exactly the sample frequency from 0Hz to 5120Hz, adjacent data point frequency phase-difference 1/Ts=5120/NHz, N=5120*Ts=1024; In table 1, the time of delay in the first footpath and last footpath is 15.8us, and main footpath is 2.4 μ s relative to the peak signal time delay in the first footpath, transmitting terminal adjacent-symbol time be divided into 0.2 μ s, the length of CP is greater than 15.8/0.2+2.4/0.2=91.Therefore the integral number power being only greater than 91 2 all meets above requirement.
What communication system synchronization method of the present invention proposed utilizes training sequence C and training sequence D to combine the estimation of thin frequency deviation and Symbol Timing estimation, hard-wired complexity can be reduced, reduce the length of correlator, thus the resource that algorithm FPGA realizes consuming can be greatly reduced, sufficiently high synchronization accuracy can be obtained simultaneously, be easy to actual popularization.
By the pluses and minuses of more current common SC-FDE system synchronization algorithm, and the limitation under Low SNR, the present invention proposes the synchronized algorithm of communication system under above-mentioned Low SNR, it is applicable to the not high low signal-to-noise ratio SC-FDE system of long distance of signal transmission, efficiency requirements, also extend in other communication systems, such as ofdm system.Because the synchronized algorithm of current most of SC-FDE system is all itself carry out related calculation based on the training sequence received to design, so synchronization accuracy is very poor when signal to noise ratio is lower.The present invention proposes to utilize the training sequence of training sequence and this locality received to carry out related calculation, and reduces the impact of noise for signal synchronization accuracy, and the problem that the Symbol Timing point caused when the main footpath solving Received signal strength is not its first footpath is delayed.Communication system simultaneous techniques of the present invention is using for reference OFDM (OrthogonalFrequencyDivisionMultiplexing, orthogonal frequency division multiplexi) synchronized algorithm and GPS the existing algorithm idea such as signal search algorithm basis on, a kind of communication system simultaneous techniques proposed, is applicable to the M2M communication under Low SNR.
Above embodiment, only for technical conceive of the present invention and feature are described, its object is to person skilled in the art can be understood content of the present invention and implement accordingly, can not limit the scope of the invention.All equalizations done with the claims in the present invention scope change and modify, and all should belong to the covering scope of the claims in the present invention.
Claims (10)
1. a communication system synchronization method, is characterized in that, transmitting terminal sends the Frame comprising the first training sequence A, the second training sequence C, the 3rd training sequence D, cyclic prefix CP and data symbol, and receiving terminal receives described Frame and performs following steps:
S1. the first training sequence A is utilized to adopt parallel code phase search algorithm carry out the detection of Frame and acquire coarse frequency offset value to correct thick frequency deviation value thus to obtain the data symbol after thick correcting frequency deviation;
S2. the second training sequence C is utilized to carry out thin frequency deviation estimation, to correct thin frequency deviation value thus to obtain the data symbol after meticulous correcting frequency deviation; And
S3. the second training sequence C and the 3rd training sequence D is utilized to carry out Symbol Timing estimation;
Wherein,
Described first training sequence A by Cycle Length be L1 ZC sequence repeat form for T1 time, wherein, L1 and T1 is positive integer, and 4≤L1≤12,3000≤T1≤5000, wherein the value of T1 depends on L1, maximum frequency deviation scope and signal to noise ratio;
Described second training sequence C by Cycle Length be L2 ZC sequence repeat form for T2 time, wherein, L2 and T2 is positive integer, and 128≤L2≤512,12≤T2≤48;
Described 3rd training sequence D is repeat T3 time after the ZC sequence negate of L2 to form by Cycle Length, and wherein, T3 is positive integer, and T2/8≤T3≤T2/4.
2. communication system synchronization method according to claim 1, it is characterized in that, being arranged so that of the length of described cyclic prefix CP introduces a lead Ng to Symbol Timing estimation point in step s3, and for main footpath be not the first footpath multipath channel described in the size of lead Ng be at least greater than the maximum delay in main footpath and the first footpath.
3. communication system synchronization method according to claim 2, is characterized in that, step S1 comprises:
S1-1. the quadrature carrier that the signal received and digital oscillator (NCO) produce is carried out mixing operation, then the output of mixing and local training sequence are utilized FFT (fast fourier transform) module and IFFT (invert fast fourier transformation) module to carry out related operation, obtain the result of related operation;
S1-2. utilize the mode of periodic accumulation to realize the coherent integration of predetermined length to the result of described related operation, modulo operation is exported to I and the Q two-way after coherent integration and after summed square, obtains final detection decision content V;
S1-3. the threshold value Vt of described detection decision content V and setting is compared, to determine whether Frame to be detected; And
When Frame being detected, frame detection module quits work and provides DDS frequency values now as described coarse frequency offset value;
When Frame not detected, upgrading the frequency values of DDS and repeating step S1-1 and re-start search to step S1-3, until Frame detected.
4. communication system synchronization method according to claim 3, is characterized in that,
The length N of described FFT (fast fourier transform) is 1024 points, and the length of described cyclic prefix CP is greater than 91 points, the time interval T of transmitting terminal adjacent-symbol
sbe 0.2 μ s; And, in described first training sequence A, L1=8, T1=3800; In described second training sequence C, L2=256, T2=24; In described 3rd training sequence D, T3=4.
5. communication system synchronization method according to claim 4, is characterized in that,
Step S2 comprises: utilize local training sequence to carry out related operation with the second training sequence C received, and the result of related operation added up 8 times, estimates with the thin frequency deviation of carrying out carrier wave;
Step S3 comprises: utilize the result of local training sequence and the second training sequence C received and the 3rd training sequence D related operation to carry out Symbol Timing estimation to data symbol; And
The length of described cyclic prefix CP is 128 points, the signal to noise ratio of described communication system is low to moderate-15dB and maximum normalization carrier wave frequency deviation value is 1.2.
6. communication system synchronization method according to claim 5, is characterized in that, utilizes the result of related operation to add up to carry out for 8 times the thin frequency deviation of carrier wave to estimate to comprise further in step S2:
The correlation peak point that continuous print 16 sub-sequence pair in second training sequence C are answered is divided into front and back two parts, and then front 8 values and rear 8 values calculate thin frequency deviation estimated value after being added respectively, and formula is as follows:
Wherein:
Wherein r (d) represents the data symbol after thick correcting frequency deviation, and m (d) represents local training sequence,
represent thin frequency deviation estimated value.
7. communication system synchronization method according to claim 5, is characterized in that,
Step S3 comprises: utilize the output of following time measure function to obtain peak point, and the index calculation recycling described peak point goes out the position of the 3rd training sequence D, thus completes Symbol Timing estimation,
Wherein, r (d) represents the data symbol after thick correcting frequency deviation, and m (d) represents local training sequence.
8. a communication system, it comprises the synchronizer being arranged at receiving terminal, it is characterized in that, the data frame packet that the transmitting terminal of described communication system sends contains the first training sequence A, the second training sequence C, the 3rd training sequence D, cyclic prefix CP and data symbol, and described synchronizer comprises:
Frame detection module, it utilizes the first training sequence A to adopt parallel code phase search algorithm carry out the detection of Frame and acquire coarse frequency offset value to correct thick frequency deviation value thus to obtain the data symbol after thick correcting frequency deviation;
Thin correcting frequency deviation module, it utilizes the second training sequence C to carry out thin frequency deviation estimation, to correct thin frequency deviation value thus to obtain the data symbol after meticulous correcting frequency deviation; And
Symbol Timing module, it utilizes the second training sequence C and the 3rd training sequence D to carry out Symbol Timing estimation;
Wherein,
Described first training sequence A by Cycle Length be L1 ZC sequence repeat form for T1 time, wherein, L1 and T1 is positive integer, and 4≤L1≤12,3000≤T1≤5000, wherein the value of T1 depends on L1, maximum frequency deviation scope and signal to noise ratio;
Described second training sequence C by Cycle Length be L2 ZC sequence repeat form for T2 time, wherein, L2 and T2 is positive integer, and 128≤L2≤512,12≤T2≤48;
Described 3rd training sequence D is repeat T3 time after the ZC sequence negate of L2 to form by Cycle Length, and wherein, T3 is positive integer, and T2/8≤T3≤T2/4; And,
The length of described cyclic prefix CP be arranged so that described Symbol Timing module introduces a lead Ng to Symbol Timing estimation point, and for main footpath be not the first footpath multipath channel described in the size of lead Ng be at least greater than the maximum delay in main footpath and the first footpath.
9. communication system according to claim 8, is characterized in that, described frame detection module comprises:
Frequency mixing module, carries out mixing for the quadrature carrier signal received and digital oscillator (NCO) produced;
One FFT (fast fourier transform) module, for carrying out fast fourier transform to the output of mixing;
2nd FFT (fast fourier transform) module, for carrying out fast fourier transform to local training sequence;
Conjugate module, for carrying out complex conjugate computing to the output of the 2nd FFT module;
IFFT (invert fast fourier transformation) module, carrying out invert fast fourier transformation for exporting the mixing of fast fourier transform computing and complex conjugate computing, obtaining the I component after related operation and Q component;
I component coherent integration module, utilizes the mode of periodic accumulation to carry out the coherent integration of predetermined length to the I component after related operation;
Q component coherent integration module, utilizes the mode of periodic accumulation to carry out the coherent integration of predetermined length to the Q component after related operation;
I component delivery and squaring module, for the I component modulo operation after coherent integration and square, obtain I
2;
Q component delivery and squaring module, for the Q component modulo operation after coherent integration and square, obtain Q
2;
Addition module, for I
2and Q
2carry out add operation, obtain detecting decision content V;
Comparison module, compares the threshold value Vt of described detection decision content V and setting, to determine whether Frame to be detected.
10. communication system according to claim 9, is characterized in that,
Described thin correcting frequency deviation module utilizes local training sequence to carry out related operation with the second training sequence C received, and the thin frequency deviation of carrying out carrier wave for 8 times that the result of related operation added up is estimated;
Described Symbol Timing module utilizes the result of local training sequence and the second training sequence C received and the 3rd training sequence D related operation to carry out Symbol Timing estimation to data symbol.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106789791A (en) * | 2017-02-28 | 2017-05-31 | 北京科技大学 | GSM carrier frequency bias estimation based on conjugation symmetric training sequence |
| CN109597687A (en) * | 2018-10-31 | 2019-04-09 | 东软集团股份有限公司 | Data synchronous resource allocation methods, device, storage medium and electronic equipment |
| CN112087406A (en) * | 2019-06-14 | 2020-12-15 | 普天信息技术有限公司 | LTE (Long term evolution) coarse frequency offset estimation method and device |
| CN112702296A (en) * | 2020-12-18 | 2021-04-23 | 上海微波技术研究所（中国电子科技集团公司第五十研究所） | FPGA (field programmable Gate array) realization method and system for data synchronization parallelization in millimeter wave communication |
| CN113890804A (en) * | 2021-10-21 | 2022-01-04 | 成都中科微信息技术研究院有限公司 | High-performance synchronization method suitable for large frequency offset scene |
| CN114079606A (en) * | 2020-08-17 | 2022-02-22 | 海能达通信股份有限公司 | Air interface time alignment method and device and electronic equipment |
| CN114079604A (en) * | 2020-08-10 | 2022-02-22 | 广州海格通信集团股份有限公司 | Communication signal receiving method, communication signal receiving device, computer equipment and storage medium |
| CN116405354A (en) * | 2022-09-14 | 2023-07-07 | 北京奕斯伟计算技术股份有限公司 | Carrier frequency offset estimation method, device, chip and computer readable storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101547174A (en) * | 2009-04-30 | 2009-09-30 | 中国电子科技集团公司第五十四研究所 | Method for phase and symbol synchronization, channel estimation and frequency domain equalization of SC-FDE system |
| CN102594745A (en) * | 2011-12-29 | 2012-07-18 | 东南大学 | Synchronization method for single carrier frequency domain equalization system and realization circuit thereof |
| WO2013104184A1 (en) * | 2012-01-09 | 2013-07-18 | 中兴通讯股份有限公司 | Method, device and system for signal processing based on single carrier-frequency domain equalization(sc-fde) |
-
2015
- 2015-06-23 CN CN201510349738.3A patent/CN105141562B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101547174A (en) * | 2009-04-30 | 2009-09-30 | 中国电子科技集团公司第五十四研究所 | Method for phase and symbol synchronization, channel estimation and frequency domain equalization of SC-FDE system |
| CN102594745A (en) * | 2011-12-29 | 2012-07-18 | 东南大学 | Synchronization method for single carrier frequency domain equalization system and realization circuit thereof |
| WO2013104184A1 (en) * | 2012-01-09 | 2013-07-18 | 中兴通讯股份有限公司 | Method, device and system for signal processing based on single carrier-frequency domain equalization(sc-fde) |
Non-Patent Citations (4)
| Title |
|---|
| 刘然,江修富,郝建华: ""利用训练符号进行SC-FDE系统粗定时同步算法的研究"", 《国外电子测量技术》 * |
| 刘顺兰，赵晓菲: ""SC-FDE系统中改进的粗定时同步技术"", 《计算机工程》 * |
| 章坚武，陈权，张磊: ""一种改进的SC-FDE系统定时同步算法"", 《电路与系统学报》 * |
| 钟涛: ""SC-FDE系统帧同步算法的研究"", 《电脑知识与技术》 * |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106789791B (en) * | 2017-02-28 | 2019-08-20 | 北京科技大学 | Mobile communication system carrier frequency bias estimation based on conjugation symmetric training sequence |
| CN106789791A (en) * | 2017-02-28 | 2017-05-31 | 北京科技大学 | GSM carrier frequency bias estimation based on conjugation symmetric training sequence |
| CN109597687A (en) * | 2018-10-31 | 2019-04-09 | 东软集团股份有限公司 | Data synchronous resource allocation methods, device, storage medium and electronic equipment |
| CN109597687B (en) * | 2018-10-31 | 2020-11-13 | 东软集团股份有限公司 | Resource allocation method and device for data synchronization, storage medium and electronic equipment |
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| CN114079604B (en) * | 2020-08-10 | 2023-12-12 | 广州海格通信集团股份有限公司 | Communication signal receiving method, device, computer equipment and storage medium |
| CN114079606B (en) * | 2020-08-17 | 2023-10-24 | 海能达通信股份有限公司 | Air interface time alignment method and device and electronic equipment |
| CN114079606A (en) * | 2020-08-17 | 2022-02-22 | 海能达通信股份有限公司 | Air interface time alignment method and device and electronic equipment |
| CN112702296A (en) * | 2020-12-18 | 2021-04-23 | 上海微波技术研究所（中国电子科技集团公司第五十研究所） | FPGA (field programmable Gate array) realization method and system for data synchronization parallelization in millimeter wave communication |
| CN113890804A (en) * | 2021-10-21 | 2022-01-04 | 成都中科微信息技术研究院有限公司 | High-performance synchronization method suitable for large frequency offset scene |
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