CN105141116A - Method for reducing low-frequency ripple voltage of intermediate direct current link of single-phase inverter - Google Patents
Method for reducing low-frequency ripple voltage of intermediate direct current link of single-phase inverter Download PDFInfo
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- CN105141116A CN105141116A CN201510479481.3A CN201510479481A CN105141116A CN 105141116 A CN105141116 A CN 105141116A CN 201510479481 A CN201510479481 A CN 201510479481A CN 105141116 A CN105141116 A CN 105141116A
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Abstract
The invention discloses a method for reducing low-frequency ripple voltage of an intermediate direct current link of a single-phase inverter. According to the method, in the single-phase inverter which is formed by connecting a fore-stage direct current-to-direct current conversion circuit and a post-stage direct current-to-alternating current inverter circuit, output power po of the inverter is introduced into a controller of the fore-stage direct current-to-direct current conversion circuit, and is adjusted as a command signal iin* of input current iin of the fore-stage direct current-to-direct current conversion circuit, so that the input current iin of the fore-stage direct current-to-direct current conversion circuit also comprises required low-frequency alternating current components; and the difference value between input power pin and the output power po is reduced, so that the low-frequency ripple voltage component of intermediate direct current busbar voltage ub is reduced. The method for reducing the low-frequency ripple voltage of the intermediate direct current link of the two-stage single-phase inverter disclosed by the invention is suitable for a direct current-to-direct current-to-alternating current single-phase inverter; and the circuit cost does not need to increase.
Description
Technical field
The present invention relates to a kind of method reducing single-phase inverter intermediate DC link low-frequency ripple voltage, belong to single-phase inverter technical field.
Background technology
Usually adopt directly-straight-two-stage circuit structure of handing over by the battery-powered single-phase inverter of lead acid storage battery, as shown in Figure 1, straight-straight translation circuit of prime will input low-voltage u
inraise into the intermediate dc busbar voltage u meeting rear class demand
b, namely usually said intermediate DC link.Rear class is straight-and hand over inverter circuit by intermediate dc busbar voltage u
bbe reverse into alternating voltage u
oexport.From input and output, the input of straight-straight translation circuit of prime is direct voltage u
inwith direct current i
in, produce input direct-current power p
in; Rear class is straight-hand over inverter circuit output AC voltage u
owith alternating current i
o, power output p
ocontaining flip-flop and two times of a-c cycle compositions.Fig. 2 is an output frequency is 50Hz, and amplitude is the several main waveform of the two-stage type inverter of 220VAC, visible power output p
ocomprise flip-flop and 100Hz alternating component two parts.Although when ignoring circuit loss, the effective value of input power and power output is equal.But the input current i of straight-straight translation circuit of prime
inusual control is stable DC quantity, so input power p
indC quantity, input power p
inwith power output p
oinstantaneous value unequal, its difference is exactly the alternating component of 100Hz, and this just has to by intermediate dc bus to provide the AC power of the 100Hz required for output.Intermediate dc bus is generally by large capacitance electrochemical capacitor C
bform, so at these electrochemical capacitors C
bon can produce the low-frequency ripple voltage of 100Hz, i.e. intermediate dc busbar voltage u
bon there is the low-frequency ripple voltage of 100Hz, this is at the figure u of Fig. 2
bon also obviously can see.This low-frequency ripple voltage magnitude depends on inverter load and intermediate bus bar electrochemical capacitor C
bcapacitance, inverter load current i
olarger, 100Hz low-frequency ripple voltage magnitude is larger; Otherwise it is also anti-.Intermediate bus bar electrochemical capacitor C
bless, 100Hz low-frequency ripple voltage magnitude is larger; Otherwise it is also anti-.When this low-frequency ripple voltage is too large, intermediate bus bar electrochemical capacitor C can be reduced
blife-span, and design is just had to improve intermediate-bus voltage u
bdirect voltage command value u
b *, which increase the risk of late-class circuit; Or just need to increase electrochemical capacitor C
bcapacitance, which again increases volume and the cost of device.
Summary of the invention
Object of the present invention aims to provide a kind of method reducing the low-frequency ripple voltage of two-stage type single-phase inverter intermediate DC link, to reduce intermediate dc bus electrolytic capacitor C
bcapacitance demand, extends its life-span, reduces device volume and cost.
A kind of method reducing the low-frequency ripple voltage of two-stage type single-phase inverter intermediate DC link of the present invention is achieved through the following technical solutions: prime straight-straight translation circuit serial connection rear class straight-single-phase inverter of handing over inverter circuit to form in, by inverter output power p
obe incorporated in the controller of straight-straight translation circuit of prime, as straight-straight translation circuit input current i of prime after regulating
ina command signal i
in *, make straight-straight translation circuit input current i of prime
inalso comprise required low-frequency ac composition, reduce input power p
inwith power output p
odifference, thus reduce intermediate dc busbar voltage u
blow-frequency ripple voltage component.
The controller of straight-straight translation circuit of described prime is the dual-loop controller that an outer voltage current inner loop is formed, as shown in Figure 3.By voltage instruction value u
b *, voltage instantaneous value u
b, current signal i
in, output voltage u
owith output current i
ofive input signals; Subtracter 301 and subtracter 302; Voltage loop controller Gv (s) and current loop controller Gi (s), proportional amplifier Kp; Multiplier; Pulses generation and drive circuit are formed.Subtracter 301 connects subtracter 302 by Voltage loop controller; Subtracter 302 connects pulses generation and drive circuit by current loop controller; Multiplier passing ratio amplifier connects subtracter 302; Voltage instruction value u
b *with instantaneous value u
binput to subtracter 301; Current signal i
ininput to subtracter 302; Output voltage u
owith output current i
oinput to multiplier.
Described voltage instruction value u
b *with voltage instantaneous value u
berror signal (u is obtained through subtracter 301
b *-u
b), this signal times obtains Current adjustment command signal i with Voltage loop controller Gv (s)
f *.
Described output voltage u
owith output current i
obe multiplied through multiplier and obtain power output p
o, then through scale amplifying Kp link, obtain current-order i
in *.
Described Current adjustment command signal i
f *, input current i
inwith current-order i
in *error signal (i is obtained through subtracter 302
in *+ i
f *-i
in), this signal times obtains control signal u with current loop control signal Gi (s)
c.
Described control signal u
cits break-make of switch controlled of straight-straight translation circuit of Direct driver prime after pulses generation and drive circuit again.
The present invention proposes a kind of implementation method reducing the low-frequency ripple voltage of two-stage type single-phase inverter intermediate DC link, tool has the following advantages, (1) do not need to increase extra main circuit device, (2) can reduce required intermediate dc bus electrolytic capacitor, can reduce electric capacity volume weight.A kind of method reducing two-stage type single-phase inverter intermediate DC link low-frequency ripple voltage that the present invention proposes, without the need to increasing circuit cost, is applicable to straight-straight-friendship type single-phase inverter.
Accompanying drawing explanation
Fig. 1 is two-stage type inverter circuit block diagram;
Fig. 2 is several key waveforms of two-stage type inverter;
The control method block diagram of Fig. 3 front stage circuits;
The main circuit diagram of Fig. 4 case study on implementation;
Fig. 5 is pulses generation and the drive circuit figure of Fig. 4 inverter circuit;
Fig. 6 is the oscillogram of institute's extracting method case study on implementation;
Fig. 7 is the oscillogram of traditional control method.
Embodiment
Below in conjunction with a specific embodiment of accompanying drawing 4, the present invention is described in further detail.The present embodiment is illustrated in figure 4 a straight-straight-friendship type single-phase inverter.
Straight-straight translation circuit of inverter prime is a voltage boosting dc translation circuit, rear class is straight-and hand over inverter circuit to be a full-bridge single-phase inversion circuit.
Voltage boosting dc translation circuit realizes the input voltage u of 200V
inraise the intermediate dc busbar voltage u converting 380V to
b, 380V direct voltage is converted to 220V sine voltage and exports by full-bridge single-phase inversion circuit realiration.
Voltage boosting dc converter is by input power V
bat, switching tube Q1, diode D1, filter inductance L1 and intermediate dc bus capacitor C1 are formed.Input power V
batpositive pole connect the left end of filter inductance L1, the right-hand member of inductance L 1 connects the drain electrode of switching tube Q1 and the anode of diode D1, the negative electrode of diode D1 connects the positive pole of intermediate dc bus capacitor C1, and the source electrode of switching tube Q1 meets negative pole and the input power V of intermediate dc bus capacitor C1
batnegative pole.
Full-bridge single-phase inversion circuit is made up of intermediate dc bus capacitor C1, switching tube Q2 ~ Q5 and each reflexive and diode D2 ~ D5, filter inductance Lo, filter capacitor Co, load resistance Ro.The anode of electric capacity C1 connects the collector electrode of switching tube Q2 and Q4 and the negative electrode of diode D2 and D4; The emitter of Q2 and the anode of diode D2 connect the negative electrode of the left end of inductance L 2 and the collector electrode of switching tube Q3 and diode D3; The emitter of Q4 and the anode of diode D4 connect the collector electrode of switching tube Q5 and the negative electrode of diode D5, and together with the lower end of C2 with Ro ground connection gnd2; The right termination capacitor C2 of inductance L 2 and the upper end of resistance Ro.The voltage at electric capacity C2 two ends is exactly output voltage u
o.
The voltage u of input power Vbat
infor 200V, inductance L 1 is 1800 μ H, electric capacity C1 is 500 μ F, and inductance L 2 is 400 μ H, electric capacity C2 be 25 μ F, resistance Ro is 50 ohm, output voltage u
ofor 220VAC.
The voltage boosting dc translation circuit of Fig. 4 adopts the controller of Fig. 3.Intermediate-bus voltage command value u
b *be set to 380V, wherein:
Gv(s)=150(0.1592s+1)/[s(0.017958s+1)];
Gi(s)=50(0.00007958s+1)/[s(0.000003979s+1)];
Kp=1/220;
As shown in Figure 5, by comparator IC1, triode Q9 and Q10, pull-up resistor Ru, base resistance Rb, drive resistance Rg, accessory power supply Vcc and triangular signal Vs is formed for pulses generation and drive circuit.The control voltage uc that controller produces connects the positive terminal of comparator IC1; Triangular signal Vs connects the negative phase end of comparator IC1; The output of comparator connects the lower end of pull-up resistor Ru, and the left end of base resistance Rb; The upper termination accessory power supply Vcc of pull-up resistor Ru; The right-hand member of base resistance Rb connects the base stage of triode Q9 and Q10; The collector electrode of triode Q9 connects power Vcc, and the emitter of triode Q9 and the emitter of Q10 connect the left end driving resistance Rg jointly; The collector electrode of Q10 meets the ground Gnd of power Vcc.Driving between the right-hand member of resistance Rg and Gnd is exactly drive voltage signal, the grid of power tube Q1 and source electrode in map interlinking 4.Wherein accessory power supply Vcc amplitude+12VDC; Triangular wave Vs peak value is 4V, and valley is 0V, and rising and falling edges is all 25 μ s, and namely the switching frequency of circuit is 20kHz.
Below in conjunction with present case, operation principle of the present invention is described.Key of the present invention is the power output amount p of straight for rear class-alternating current road outlet side
obe incorporated in the controller of straight-straight circuit of prime, Kp wherein equals 1/u
in, ignore the impact of circuit efficiency, p
o* Kp just equals the input current of front stage circuits, and it can be used as the input current command value i of front stage circuits
in *.Consider the efficiency of circuit, Kp value can adjust slightly.Instruction i
in *introducing do not affect the design of Voltage loop controller Gv (s), because i
in *that reflect is total input current instruction (i
in *+ i
f *) in foundation power output estimate out direct current and the second harmonic amount sum of input current in real time, and the latter i
f *what reflect is in order to control u
breach command value u
b *total input current instruction in need the dynamic current operation part of supplementing.Current i
f *value is much smaller than i
in*.The design of the current loop controller Gi (s) in controller is consistent with traditional double-loop control.
Fig. 6 is the oscillogram of the implementation case, as seen at output voltage 220VAC, and intermediate dc busbar voltage u under output current 4.57A
blow-frequency ripple Voltage Peak peak value be 1V.
By the i in Fig. 3
in *remove, become traditional control program, be equally the waveform that obtains of Fig. 4 circuit as shown in Figure 7, intermediate dc busbar voltage u under same load
blow-frequency ripple Voltage Peak peak value reach 17.5V.This contrast reflects the validity of this circuit.
Claims (6)
1. reduce a method for single-phase inverter intermediate DC link low-frequency ripple voltage, it is characterized in that, described method prime straight-straight translation circuit serial connection rear class straight-single-phase inverter of handing over inverter circuit to form in, by inverter output power p
obe incorporated in the controller of straight-straight translation circuit of prime, as straight-straight translation circuit input current i of prime after regulating
ina command signal i
in *, make straight-straight translation circuit input current i of prime
inalso comprise required low-frequency ac composition, reduce input power p
inwith power output p
odifference, thus reduce intermediate dc busbar voltage u
blow-frequency ripple voltage component.
2. the method for reduction single-phase inverter intermediate DC link low-frequency ripple voltage according to claim 1, is characterized in that, the controller of straight-straight translation circuit of described prime is by voltage instruction value u
b *, voltage instantaneous value u
b, current signal i
in, output voltage u
owith output current i
ofive input signals, subtracter 301 and subtracter 302, Voltage loop controller Gv (s) and current loop controller Gi (s), proportional amplifier Kp, multiplier, pulses generation and drive circuit are formed; Described subtracter 301 connects subtracter 302 by Voltage loop controller; Described subtracter 302 connects pulses generation and drive circuit by current loop controller; Described multiplier passing ratio amplifier connects subtracter 302; Described voltage instruction value u
b *with instantaneous value u
binput to subtracter 301; Described current signal i
ininput to subtracter 302; Described output voltage u
owith output current i
oinput to multiplier.
3. the method for reduction single-phase inverter intermediate DC link low-frequency ripple voltage according to claim 2, is characterized in that, described voltage instruction value u
b *with voltage instantaneous value u
berror signal (u is obtained through subtracter 301
b *-u
b), this signal times obtains Current adjustment command signal i with Voltage loop controller Gv (s)
f *.
4. the method for reduction single-phase inverter intermediate DC link low-frequency ripple voltage according to claim 2, is characterized in that, described output voltage u
owith output current i
obe multiplied through multiplier and obtain power output p
o, then through scale amplifying Kp link, obtain current-order i
in *.
5. the method for reduction single-phase inverter intermediate DC link low-frequency ripple voltage according to claim 3, is characterized in that, described Current adjustment command signal i
f *, input current i
inwith current-order i
in *error signal (i is obtained through subtracter 302
in *+ i
f *-i
in), this signal times obtains control signal u with current loop control signal Gi (s)
c.
6. the method for reduction single-phase inverter intermediate DC link low-frequency ripple voltage according to claim 5, is characterized in that, described control signal u
cits break-make of switch controlled of straight-straight translation circuit of Direct driver prime after pulses generation and drive circuit again.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510479481.3A CN105141116B (en) | 2015-08-07 | 2015-08-07 | The method for reducing single-phase inverter intermediate DC link low-frequency ripple voltage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510479481.3A CN105141116B (en) | 2015-08-07 | 2015-08-07 | The method for reducing single-phase inverter intermediate DC link low-frequency ripple voltage |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105141116A true CN105141116A (en) | 2015-12-09 |
| CN105141116B CN105141116B (en) | 2017-12-26 |
Family
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510479481.3A Expired - Fee Related CN105141116B (en) | 2015-08-07 | 2015-08-07 | The method for reducing single-phase inverter intermediate DC link low-frequency ripple voltage |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112234808A (en) * | 2020-09-09 | 2021-01-15 | 西安交通大学 | Double-frequency ripple suppression circuit and suppression method of single-phase inverter |
| CN113726210A (en) * | 2021-07-30 | 2021-11-30 | 西安交通大学 | Two-stage double-active-bridge grid-connected inverter direct-current bus low-frequency ripple suppression circuit and method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101345484A (en) * | 2008-05-06 | 2009-01-14 | 西安爱科电子有限责任公司 | Input current low frequency fluctuation controller of low frequency dynamic power supply |
| US20140153302A1 (en) * | 2010-10-27 | 2014-06-05 | Perfect Galaxy International Limited | Automatic ac bus voltage regulation for power distribution grids |
| CN104038030A (en) * | 2014-06-04 | 2014-09-10 | 华为技术有限公司 | Method for controlling bus ripple, device and system |
-
2015
- 2015-08-07 CN CN201510479481.3A patent/CN105141116B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101345484A (en) * | 2008-05-06 | 2009-01-14 | 西安爱科电子有限责任公司 | Input current low frequency fluctuation controller of low frequency dynamic power supply |
| US20140153302A1 (en) * | 2010-10-27 | 2014-06-05 | Perfect Galaxy International Limited | Automatic ac bus voltage regulation for power distribution grids |
| CN104038030A (en) * | 2014-06-04 | 2014-09-10 | 华为技术有限公司 | Method for controlling bus ripple, device and system |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112234808A (en) * | 2020-09-09 | 2021-01-15 | 西安交通大学 | Double-frequency ripple suppression circuit and suppression method of single-phase inverter |
| CN113726210A (en) * | 2021-07-30 | 2021-11-30 | 西安交通大学 | Two-stage double-active-bridge grid-connected inverter direct-current bus low-frequency ripple suppression circuit and method |
| CN113726210B (en) * | 2021-07-30 | 2024-01-12 | 西安交通大学 | Low-frequency ripple suppression circuit and method for direct-current bus of two-stage double-active-bridge grid-connected inverter |
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|---|---|
| CN105141116B (en) | 2017-12-26 |
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Granted publication date: 20171226 Termination date: 20190807 |