CN104038030A - Method for controlling bus ripple, device and system - Google Patents

Method for controlling bus ripple, device and system Download PDF

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CN104038030A
CN104038030A CN201410244286.8A CN201410244286A CN104038030A CN 104038030 A CN104038030 A CN 104038030A CN 201410244286 A CN201410244286 A CN 201410244286A CN 104038030 A CN104038030 A CN 104038030A
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axis
current
feedforward
voltage
phase
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CN104038030B (en
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邹建龙
方晓厅
梁向辉
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Huawei Digital Power Technologies Co Ltd
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Huawei Technologies Co Ltd
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Abstract

The embodiment of the invention discloses a method for controlling bus ripple, a device and a system. The method comprises the following steps: acquiring first feed-forward current according to rectified input voltage, inverted output voltage and inverted output current, performing coordinate transformation on the first feed-forward current to obtain second feed-forward current, performing rectification control by adopting the second feed-forward current to obtain first feed-forward voltage, and performing coordinate transformation on the first feed-forward voltage to obtain second feed-forward voltage; modulating the second feed-forward voltage to generate a pulse signal, and inputting the pulse signal into a rectifier. According to the embodiment, power consumed by power units such as an inverter is directly fed forward into the rectifier, thereby effectively reducing bus ripple, and effectively increasing the control efficiency of bus ripple.

Description

Method, device and system for controlling bus ripple
Technical Field
The present invention relates to the field of communications, and in particular, to a method, an apparatus, and a system for controlling bus ripple.
Background
An Uninterruptible Power Supply (UPS) System can provide stable and uninterrupted Power supply for Power electronic equipment, and is widely used in Power supply in various fields because it can effectively cope with abnormal situations such as Power failure, continuous undervoltage, continuous overvoltage, and the like. The voltage stabilizing function of the UPS system is usually performed by a rectifier, and the frequency stabilization is performed by an inverter.
The rectifier provides stable direct-current voltage for power units such as an inverter, and when the inverter is loaded with unbalanced load, the bus capacitor voltage has voltage fluctuation consistent with the output voltage frequency (for example, 50hz or 60hz), that is, bus ripple exists. When the bus ripple is too large, the quality of the output voltage is affected, and the lifetime of the filter capacitor itself is reduced.
In the prior art, in order to reduce the bus ripple, a balancing circuit is added on the bus. Referring specifically to fig. 1, fig. 1 is a schematic circuit diagram of a UPS system. The balancing circuit used in the UPS is shown within the dashed box in fig. 1. When the inverter is loaded with an unbalanced load, such as a single-phase 50hz load, the positive bus voltage VbusP and the negative bus voltage VbusN will have a 50hz ripple. In the negative half cycle of the output current, Vbus P is large, Vbus N is small, when Vbus P is larger than a certain threshold value, the switching device PWM4A is turned on, positive bus capacitance discharges through PWM4A and inductance L to enable Vbus P to be reduced, Vbus N rises to reduce bus ripple, and on the contrary, when Vbus N is smaller than a certain threshold value, the switching device PWM4B is turned on, negative bus capacitance discharges through PWM4B and inductance L to enable Vbus P to be reduced, Vbus N rises to reduce bus ripple.
In the prior art, at least two switching devices (PWM 4A and PWM4B in fig. 1) and at least one inductor L are required, the devices increase the hardware cost and the volume, and the addition of a balancing circuit on a bus causes switching loss and iron loss of the inductor, so that the efficiency of the whole machine is lost.
Disclosure of Invention
The embodiment of the invention provides a method, a device and a system for controlling bus ripples, which can effectively reduce the bus ripples and improve the control efficiency of the bus ripples.
In a first aspect, the present invention provides a method for controlling bus ripple, which may include:
acquiring a rectification input voltage, an inversion output voltage and an inversion output current;
obtaining a first feedforward current according to the obtained rectified input voltage, the obtained inverted output voltage and the obtained inverted output current;
performing coordinate transformation on the first feedforward current to obtain a second feedforward current;
performing rectification control by adopting a second feedforward current to obtain a first feedforward voltage;
performing coordinate transformation on the first feedforward voltage to obtain a second feedforward voltage;
and modulating the second feedforward voltage to generate a pulse signal, and inputting the pulse signal into the rectifier to control the voltage of the bus capacitor.
In a first possible implementation manner of the first aspect, the second feed-forward current includes: current values for D, Q and Z axis feed forward, the first feed forward voltage comprising: voltage values fed forward by a D axis, a Q axis and a Z axis; wherein, adopt the second feedforward electric current to carry out rectification control, obtain first feedforward voltage, specifically include: carrying out bus voltage control on the D axis by adopting the D axis feedforward current value in the second feedforward current to obtain a D axis feedforward voltage value; performing reactive current control on the Q axis by adopting a Q axis feedforward current value in the second feedforward current to obtain a Q axis feedforward voltage value; and carrying out bus difference control on the Z axis by adopting the current value of the Z axis feedforward in the second feedforward current to obtain the voltage value of the Z axis feedforward.
In a second possible implementation manner of the first aspect, the second feed-forward current includes: a Z-axis feed forward current value, the first feed forward voltage comprising: a Z-axis feed-forward voltage value; wherein, adopt the second feedforward electric current to carry out rectification control, obtain first feedforward voltage, specifically include: and carrying out bus difference control on the Z axis by adopting the current value of the Z axis feedforward in the second feedforward current to obtain the voltage value of the Z axis feedforward.
With reference to the first possible implementation manner of the first aspect, in a third possible implementation manner, before the step of performing rectification control by using the second feed-forward current, the method further includes: acquiring rectified input current, and performing coordinate transformation on the rectified input current to obtain rectified input current of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
correspondingly, adopt the current value of the D axle feedforward in the second feedforward current to carry out bus voltage control on the D axle, obtain the voltage value of D axle feedforward, specifically include: subtracting the preset bus voltage value and the current bus voltage value to obtain a bus voltage difference, and adjusting the bus voltage difference to obtain a first input current; superposing the first input current and the current value of D-axis feedforward to obtain a first reference current; inputting the first reference current into a D-axis current loop, so that the first reference current and the D-axis rectified input current are subjected to subtraction operation to obtain a first output current, and regulating the first output current to obtain a first input voltage; and superposing the first input voltage and the D-axis rectified input voltage to obtain a D-axis feedforward voltage value.
With reference to the first possible implementation manner or the third possible implementation manner of the first aspect, in a fourth possible implementation manner, before the step of performing rectification control by using the second feed-forward current, the method further includes: acquiring rectified input current, and performing coordinate transformation on the rectified input current to obtain rectified input current of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
correspondingly, the reactive current control is carried out on the Q axis by adopting the current value of the Q axis feedforward in the second feedforward current, so as to obtain the voltage value of the Q axis feedforward, and the method specifically comprises the following steps: obtaining reactive current, and superposing the reactive current and the current value of Q-axis feedforward to obtain second reference current; inputting a second reference current into the Q-axis current loop, so that the second reference current and the Q-axis rectified input current are subjected to subtraction operation to obtain a second output current, and regulating the second output current to obtain a second input voltage; and superposing the second input voltage and the Q-axis rectification input voltage to obtain a Q-axis feedforward voltage value.
With reference to any one of the first to fourth possible implementation manners of the first aspect, in a fifth possible implementation manner, before the step of performing the rectification control by using the second feed-forward current, the method further includes: acquiring rectified input current, and performing coordinate transformation on the rectified input current to obtain rectified input current of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
carrying out bus difference control on the Z axis by adopting the current value of the Z axis feedforward in the second feedforward current to obtain the voltage value of the Z axis feedforward, and specifically comprising the following steps: acquiring a positive bus voltage difference and a negative bus voltage difference according to the positive bus voltage and the negative bus voltage, and adjusting the positive bus voltage difference and the negative bus voltage difference to obtain a second input current; superposing the second input current with the current value of Z-axis feedforward to obtain a third reference current; inputting a third reference current into the Z-axis current loop, so that the third reference current and the Z-axis rectified input current are subjected to subtraction operation to obtain a third output current, and adjusting the third output current to obtain a third input voltage; and superposing the third input voltage and the Z-axis rectified input voltage to obtain a Z-axis feedforward voltage value.
With reference to the first aspect and any one of the first to fifth possible implementation manners of the first aspect, in a sixth possible implementation manner, a first feedforward current is obtained according to the obtained rectified input voltage, the obtained inverted output voltage, and the obtained inverted output current, where the first feedforward current includes instantaneous current values of a-phase feedforward, a B-phase feedforward, and a C-phase feedforward, and specifically includes:
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveA</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVA</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Aactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECA</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>A</mi> <mi>INV</mi> </msub> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveB</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVB</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Bactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECB</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>B</mi> <mi>INV</mi> </msub> <mo>;</mo> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveC</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVC</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Cactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECC</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>C</mi> <mi>INV</mi> </msub> </mrow> </math>
wherein iInvActiveA、iInvActiveBAnd iInvActiveCInstantaneous current values of phase A, phase B and phase C feedforward respectively;
uINVA、uINVBand uINVCThe inverter output voltages of the phase A, the phase B and the phase C are respectively;
uRECA、uRECBand uRECCRectified input voltages of phase A, phase B and phase C respectively;
iAactive、iBactiveand iCactiveThe inverter output currents of the phase A, the phase B and the phase C are respectively;
CosAINV、CosBINVand CosCINVThe cosine values of the phase angles of the A-phase, B-phase and C-phase inverse output voltages are respectively.
With reference to the sixth possible implementation manner of the first aspect, in a seventh possible implementation manner, when the second feed-forward current includes: current values for D, Q and Z axis feed forward, the first feed forward voltage comprising: d-axis, Q-axis and Z-axis feedforward voltage values, D-axis feedforward current value id feedforward=iInvActiveACurrent value of Q-axis feedforward iq feedforward=iInvActiveBZ-axis feed-forward current value iz feedforward=iInvActiveC
With reference to the sixth possible implementation manner of the first aspect, in an eighth possible implementation manner, when the second feedforward current includes: a Z-axis feed forward current value, the first feed forward voltage comprising: current value i of Z-axis feedforwardz feedforwardComprises the following steps:
i zfeedforward = i InvActiveA + i InvActiveB + i InvActiveC 3 .
in a second aspect, the present invention provides an apparatus for controlling bus ripple, which may include:
the detection unit is used for acquiring a rectification input voltage, an inversion output voltage and an inversion output current;
the data processing unit is used for obtaining a first feedforward current according to the rectified input voltage, the inversion output voltage and the inversion output current obtained by the detection unit;
the first coordinate transformation unit is used for carrying out coordinate transformation on the first feedforward current to obtain a second feedforward current;
the rectification loop control unit is used for carrying out rectification control by adopting the second feedforward current to obtain a first feedforward voltage;
the second coordinate transformation unit is used for carrying out coordinate transformation on the first feedforward voltage to obtain a second feedforward voltage;
and the modulation wave-generating unit is used for modulating the second feedforward voltage to generate a pulse signal, and the pulse signal is input into the rectifier to control the voltage of the bus capacitor.
In a first possible implementation manner of the second aspect, the second feedforward current includes current values of D-axis, Q-axis and Z-axis feedforward, and the first feedforward voltage includes voltage values of D-axis, Q-axis and Z-axis feedforward; the rectification loop control unit includes: the system comprises a bus voltage control module, a reactive current control module and a first bus difference control module;
the bus voltage control module is specifically used for carrying out bus voltage control on a D axis by adopting a D axis feedforward current value in second feedforward current to obtain a D axis feedforward voltage value; the reactive current control module is used for performing reactive current control on the Q axis by adopting the current value of the Q axis feedforward in the second feedforward current to obtain the voltage value of the Q axis feedforward; and the first bus difference control module is used for carrying out bus difference control on the Z axis by adopting the current value of the Z axis feedforward in the second feedforward current to obtain the voltage value of the Z axis feedforward.
In a second possible implementation manner of the second aspect, the second feed-forward current includes: a Z-axis feed forward current value, the first feed forward voltage comprising: a Z-axis feed-forward voltage value; the rectification loop control unit includes: and the second bus difference control module is used for carrying out bus difference control on the Z axis by adopting the Z axis feedforward current value in the second feedforward current to obtain the Z axis feedforward voltage value.
With reference to the first possible implementation manner of the second aspect, in a third possible implementation manner, the detection unit is further configured to obtain a rectified input current; the device also includes: the third coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain the rectified input current of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
the bus voltage control module is used for subtracting a preset bus voltage value from a current bus voltage value to obtain a bus voltage difference, and regulating the bus voltage difference to obtain a first input current; superposing the first input current and the current value of D-axis feedforward to obtain a first reference current; inputting the first reference current into a D-axis current loop, so that the first reference current and the D-axis rectified input current are subjected to subtraction operation to obtain a first output current, and regulating the first output current to obtain a first input voltage; and superposing the first input voltage and the D-axis rectified input voltage to obtain a D-axis feedforward voltage value.
With reference to the first possible implementation manner or the third possible implementation manner of the second aspect, in a fourth possible implementation manner, the detection unit is further configured to obtain a rectified input current; the device also includes: the fourth coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain the rectified input current of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
the reactive current control module is used for acquiring reactive current and superposing the reactive current and the current value of the Q-axis feedforward to obtain second reference current; inputting a second reference current into the Q-axis current loop, so that the second reference current and the Q-axis rectified input current are subjected to subtraction operation to obtain a second output current, and regulating the second output current to obtain a second input voltage; and superposing the second input voltage and the Q-axis rectification input voltage to obtain a Q-axis feedforward voltage value.
With reference to the first possible implementation manner, the third possible implementation manner, or the fourth possible implementation manner of the second aspect, in a fifth possible implementation manner, the detection unit is further configured to obtain a rectified input current; the device also includes: the fifth coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain rectified input currents of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
the first bus difference control module is used for acquiring a positive bus voltage difference and a negative bus voltage difference according to the positive bus voltage and the negative bus voltage, and regulating the positive bus voltage difference and the negative bus voltage difference to obtain a second input current; superposing the second input current with the current value of Z-axis feedforward to obtain a third reference current; inputting a third reference current into the Z-axis current loop, so that the third reference current and the Z-axis rectified input current are subjected to subtraction operation to obtain a third output current, and adjusting the third output current to obtain a third input voltage; and superposing the third input voltage and the Z-axis rectified input voltage to obtain a Z-axis feedforward voltage value.
With reference to the second possible implementation manner of the second aspect, in a sixth possible implementation manner, the detection unit is further configured to obtain a rectified input current;
the device further comprises: the sixth coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain rectified input currents of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
the second bus difference control module is used for acquiring a positive bus voltage difference and a negative bus voltage difference according to the positive bus voltage and the negative bus voltage, and regulating the positive bus voltage difference and the negative bus voltage difference to obtain a second input current; superposing the second input current with the current value of Z-axis feedforward to obtain a third reference current; inputting a third reference current into the Z-axis current loop, so that the third reference current and the Z-axis rectified input current are subjected to subtraction operation to obtain a third output current, and adjusting the third output current to obtain a third input voltage; and superposing the third input voltage and the Z-axis rectified input voltage to obtain a Z-axis feedforward voltage value.
With reference to the second aspect or any one of the first to sixth possible implementation manners of the second aspect, in a seventh possible implementation manner, the first feedforward current includes instantaneous current values of a-phase feedforward, a B-phase feedforward and a C-phase feedforward, where the data processing unit is specifically configured to perform the following data processing:
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveA</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVA</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Aactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECA</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>A</mi> <mi>INV</mi> </msub> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveB</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVB</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Bactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECB</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>B</mi> <mi>INV</mi> </msub> <mo>;</mo> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveC</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVC</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Cactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECC</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>C</mi> <mi>INV</mi> </msub> </mrow> </math>
wherein iInvActiveA、iInvActiveBAnd iInvActiveCInstantaneous current values of phase A, phase B and phase C feedforward respectively;
uINVA、uINVBand uINVCThe inverter output voltages of the phase A, the phase B and the phase C are respectively;
uRECA、uRECBand uRECCRectified input voltages of phase A, phase B and phase C respectively;
iAactive、iBactiveand iCactiveThe inverter output currents of the phase A, the phase B and the phase C are respectively;
CosAINV、CosBINVand CosCINVThe cosine values of the phase angles of the A-phase, B-phase and C-phase inverse output voltages are respectively.
With reference to the seventh possible implementation manner of the second aspect, in an eighth possible implementation manner, when the second feed-forward current includes: current values for D, Q and Z axis feed forward, the first feed forward voltage comprising: d-axis, Q-axis and Z-axis feedforward voltage values, D-axis feedforward current value id feedforward=iInvActiveACurrent value of Q-axis feedforward iq feedforward=iInvActiveBZ-axis feed-forward current value iz feedforward=iInvActiveC
With reference to the seventh possible implementation manner of the second aspect, in a ninth possible implementation manner, when the second feed-forward current includes: a Z-axis feed forward current value, the first feed forward voltage comprising: current value i of Z-axis feedforwardz feedforwardComprises the following steps:
i zfeedforward = i InvActiveA + i InvActiveB + i InvActiveC 3 .
in a third aspect, the present invention provides a system for controlling bus ripple, which may include: a rectifier, an inverter and an apparatus for controlling bus ripple as provided in the second aspect.
According to the technical scheme, the embodiment of the invention has the following advantages:
according to the embodiment of the invention, a first feedforward current can be obtained according to the rectified input voltage, the inverted output voltage and the inverted output current, then the coordinate transformation is carried out on the first feedforward current to obtain a second feedforward current, then the second feedforward current is adopted to carry out rectification control to obtain a first feedforward voltage, and the coordinate transformation is carried out on the first feedforward voltage to obtain a second feedforward voltage; and finally, modulating the second feedforward voltage to generate a pulse signal, and inputting the pulse signal into the rectifier. According to the embodiment of the invention, the power consumed by the power units such as the inverter is directly fed forward to the rectifier, so that the N-line currents of the rectifier and the inverter are basically the same, namely the current flowing from the midpoint of the bus capacitor to the N line of the inverter is the minimum, the bus ripple is effectively reduced, the dynamic performance of the rectifier is improved, and the control efficiency of the bus ripple is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic circuit diagram of a prior art uninterruptible power supply system;
FIG. 2 is a schematic flow chart of a method for controlling bus ripple according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a coordinate transformation performed on a first feed forward current according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a coordinate transformation performed on the first feedforward voltage in accordance with an embodiment of the present invention;
FIG. 5 is a schematic diagram of a second embodiment of the present invention for controlling the rectification of the second feed forward current;
FIG. 6 is a schematic diagram of coordinate transformation for transforming the rectified input current according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of coordinate transformation for transforming the rectified input voltage according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of another coordinate transformation performed on the first feedforward current in an embodiment of the present invention;
FIG. 9 is a schematic diagram of a coordinate transformation performed on the first feedforward voltage in accordance with an embodiment of the present invention;
FIG. 10 is a schematic diagram of another embodiment of the present invention for controlling the rectification of the second feed forward current;
fig. 11 is a schematic structural diagram of an apparatus for controlling bus ripple according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a system for controlling bus ripple according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The embodiment of the invention provides a method for controlling bus ripples, which can effectively reduce the bus ripples and improve the control efficiency of the bus ripples. In addition, a corresponding device for controlling the bus ripple and a related system for controlling the bus ripple are also provided. The following are detailed descriptions of the respective embodiments.
The method for controlling the bus ripple provided by the embodiment of the present invention may be applied to an inverter System, such as an Uninterruptible Power Supply (UPS), and the method is analyzed and explained by taking the application to the UPS as an example, and does not limit the present invention. The UPS may include at least a rectifier and an inverter, where the rectifier provides a stable dc voltage to power units such as the inverter, and the inverter converts the dc voltage into an ac voltage and outputs the ac voltage to a load. When the inverter is loaded with unbalanced load, the bus capacitor voltage has ripple, and in order to control the bus ripple, the embodiment of the invention feeds the power consumed by the power units such as the inverter and the like forward to the control of the rectifier.
Embodiments of the present invention provide a method for controlling a bus ripple, wherein for convenience of description, the description will be made in terms of an apparatus for controlling a bus ripple. The method for controlling the bus ripple can obtain a first feedforward current according to a rectification input voltage, an inversion output voltage and an inversion output current, then perform coordinate transformation on the first feedforward current to obtain a second feedforward current, perform rectification control by adopting the second feedforward current to obtain a first feedforward voltage, and perform coordinate transformation on the first feedforward voltage to obtain a second feedforward voltage; and modulating the second feedforward voltage to generate a pulse signal, and inputting the pulse signal into the rectifier. According to the embodiment of the invention, the power consumed by the power units such as the inverter and the like is directly fed forward to the rectifier, so that the N-line currents of the rectifier and the inverter are basically the same, namely the current flowing from the midpoint of the bus capacitor to the N line of the inverter is the minimum, the bus ripple is effectively reduced, and the control efficiency of the bus ripple is improved.
Referring to fig. 2, fig. 2 is a schematic flow chart of a method for controlling a bus ripple according to an embodiment of the present invention, where the method for controlling the bus ripple may include:
step 101, acquiring a rectification input voltage, an inversion output voltage and an inversion output current;
the device for controlling the bus ripple in the embodiment of the invention can be connected between a power grid end and a load end and is used for detecting the rectified input voltage, the inversion output voltage and the inversion output current in real time. It should be noted that the present invention is described in detail by taking an application in a three-phase power grid as an example. Correspondingly, the device for controlling the bus ripple can obtain the rectified input voltages of the A phase, the B phase and the C phase, the inverted output voltages of the A phase, the B phase and the C phase and the inverted output currents of the A phase, the B phase and the C phase.
102, obtaining a first feedforward current according to the obtained rectification input voltage, the obtained inversion output voltage and the obtained inversion output current, and carrying out coordinate transformation on the first feedforward current to obtain a second feedforward current; for example, the following may be specifically mentioned:
according to the rectified input voltage, the inverted output voltage and the inverted output current detected in step 101, a first feed-forward current can be calculated.
In a three-phase grid, the first feed-forward current multiplied by the rectified input voltage is equal to the product of the inverted output voltage and the inverted output current, and the bus ripple can be controlled to be at a minimum value. Specifically, the first feedforward current comprises an instantaneous current value i of A-phase feedforwardInvActiveAInstantaneous current value i of B-phase feedforwardInvActiveBInstantaneous current value i of C-phase feedforwardInvActiveCThe calculation formula may be as follows:
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveA</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVA</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Aactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECA</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>A</mi> <mi>INV</mi> </msub> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveB</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVB</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Bactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECB</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>B</mi> <mi>INV</mi> </msub> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveC</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVC</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Cactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECC</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>C</mi> <mi>INV</mi> </msub> </mrow> </math>
wherein iInvActiveA、iInvActiveBAnd iInvActiveCInstantaneous current values of phase A, phase B and phase C feedforward respectively;
uINVA、uINVBand uINVCThe inverter output voltages of the phase A, the phase B and the phase C are respectively;
uRECA、uRECBand uRECCRectified input voltages of phase A, phase B and phase C respectively;
iAactive、iBactiveand iCactiveThe inverter output currents of the phase A, the phase B and the phase C are respectively;
CosAINV、CosBINVand CosCINVThe cosine values of the phase angles of the A-phase, B-phase and C-phase inverse output voltages are respectively.
After the first feedforward current is obtained, the obtained first feedforward current needs to be fed forward to the control of the rectifier, but since the first feedforward current cannot be directly fed forward to the rectifier, the first feedforward current needs to be controlled by a device for controlling bus ripple so that the first feedforward current can be fed forward to an algorithm of the rectifier. Obtaining instantaneous current value i of A-phase feedforwardInvActiveAInstantaneous electricity of B phase feed forwardFlow value iInvActiveBInstantaneous current value i of C-phase feedforwardInvActiveCThen, i can beInvActiveA、iInvActiveBAnd iInvActiveCAnd performing ABC/DQZ coordinate transformation to obtain a second feed-forward current, wherein the second feed-forward current comprises: current values fed forward on the D, Q and Z axes.
It should be understood that the detailed implementation of performing the coordinate transformation of ABC/DQZ can refer to the prior art and will not be described herein.
103, performing rectification control by adopting a second feedforward current to obtain a first feedforward voltage, and performing coordinate transformation on the first feedforward voltage to obtain a second feedforward voltage; for example, the following may be specifically mentioned:
after obtaining the current values of the D-axis feedforward, the Q-axis feedforward and the Z-axis feedforward in the step 102, respectively carrying out rectification control on the current values of the D-axis feedforward, the Q-axis feedforward and the Z-axis feedforward on the D-axis feedforward, the Q-axis feedforward and the Z-axis feedforward of the rotating coordinate to obtain a first feedforward voltage, wherein the first feedforward voltage comprises: d-axis, Q-axis and Z-axis feed forward voltage values.
It should be noted that, before step 103, the method may further include: acquiring rectified input current, and performing coordinate transformation on the rectified input current to obtain rectified input current of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: the rectified input voltage comprises rectified input voltages of the A phase, the B phase and the C phase.
The second feedforward current is used for rectification control, for example, bus voltage control, reactive current control and bus difference control may be respectively performed on a D axis, a Q axis and a Z axis of a rotation coordinate, so as to obtain feedforward voltage values of the D axis, the Q axis and the Z axis. For example, bus voltage control may be performed on the D axis, reactive current control may be performed on the Q axis, and bus differential control may be performed on the Z axis, and specific implementation thereof will be described in detail in the following embodiments, and will not be described herein again. It should be understood that the bus voltage control, the reactive current control or the bus difference control is not particularly limited to each axis of rotation, and is not intended to limit the present invention.
After the voltage values of the D-axis feedforward, the Q-axis feedforward and the Z-axis feedforward are obtained, DQZ/ABC coordinate transformation can be performed on the voltage values of the D-axis feedforward, the Q-axis feedforward and the Z-axis feedforward to obtain a second feedforward voltage, wherein the second feedforward voltage comprises: and the feedforward voltage values of the A phase, the B phase and the C phase.
It should be understood that the specific implementation of DQZ/ABC coordinate transformation can refer to the prior art and will not be described herein.
And 104, modulating the second feedforward voltage to generate a pulse signal, and inputting the pulse signal into the rectifier to control the voltage of the bus capacitor.
And modulating the second feedforward voltage to obtain a modulation wave, and then generating a pulse signal through a modulation algorithm. It should be noted that, the process of how to modulate the voltage to obtain the modulated wave and generate the pulse signal through the modulation algorithm is not limited, and the specific implementation thereof may refer to the prior art, and is not described herein again.
The generated Pulse signal may be a Pulse Width Modulation (PWM) Pulse signal. Then, modulating the second feedforward voltage to generate the pulse signal may specifically include: and performing pulse width modulation on the feedforward voltage values of the phase A, the phase B and the phase C to obtain a PWM pulse signal.
The generated PWM pulse signal is sent to the rectifier, and the midpoint voltage of a bridge arm of the rectifier can be controlled, so that the amplitude and the phase of the current of the inductor L between the power grid side and the rectifier are controlled, the input power factor of the rectifier is ensured to be 1, and the sum of the bus voltage and the bus voltage difference are ensured.
As can be seen from the above, in the embodiment of the present invention, the first feedforward current may be obtained according to the rectified input voltage, the inverted output voltage, and the inverted output current, then the coordinate transformation is performed on the first feedforward current to obtain the second feedforward current, then the second feedforward current is adopted to perform the rectification control to obtain the first feedforward voltage, and the coordinate transformation is performed on the first feedforward voltage to obtain the second feedforward voltage; and finally, modulating the second feedforward voltage to generate a pulse signal, and inputting the pulse signal into the rectifier. According to the embodiment of the invention, the power consumed by the power units such as the inverter is directly fed forward to the rectifier, so that the N-line currents of the rectifier and the inverter are basically the same, namely the current flowing from the midpoint of the bus capacitor to the N line of the inverter is the minimum, the bus ripple is effectively reduced, the dynamic performance of the rectifier is improved, and the control efficiency of the bus ripple is improved.
It should be understood that the bus ripple can be controlled by instantaneous power feed-forward and N-line current feed-forward, wherein the instantaneous power feed-forward is to perform bus voltage control, reactive current control and bus difference control on the D-axis, the Q-axis and the Z-axis respectively, that is, the D-axis, the Q-axis and the Z-axis of the rotation coordinate are all transformed and are not 0. The N-line current feed-forward performs only the bus bar difference control on the Z-axis and only converts the Z-axis of the rotation coordinate.
In order to better understand the above solutions, the present invention respectively describes the above solutions in detail with specific application examples:
when instantaneous power feedforward is performed, the method specifically comprises the following steps:
step 201, respectively obtaining uINVA、uINVB、uINVC、uRECA、uRECB、uRECC、iAactive、iBactiveAnd iCactive
Wherein u isINVA、uINVBAnd uINVCThe inverter output voltages u of the A phase, the B phase and the C phase respectivelyRECA、uRECBAnd uRECCRectified input voltages, i, of phase A, B and C, respectivelyAactive、iBactiveAnd iCactiveThe inverter output currents of the A phase, the B phase and the C phase are respectively.
Step 202, calculate iInvActiveA、iInvActiveBAnd iInvActiveCThe calculation formula is as follows:
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveA</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVA</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Aactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECA</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>A</mi> <mi>INV</mi> </msub> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveB</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVB</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Bactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECB</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>B</mi> <mi>INV</mi> </msub> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveC</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVC</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Cactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECC</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>C</mi> <mi>INV</mi> </msub> </mrow> </math>
wherein iInvActiveA、iInvActiveBAnd iInvActiveCInstantaneous current values, CosA, fed forward for phase A, phase B and phase C, respectivelyINV、CosBINVAnd CosCINVThe cosine values of the phase angles of the A-phase, B-phase and C-phase inverse output voltages are respectively.
Step 203, for iInvActiveA、iInvActiveBAnd iInvActiveCPerforming ABC/DQZ coordinate transformation to obtain id feedforward、iq feedforwardAnd iz feedforward
Referring specifically to fig. 3, fig. 3 is a schematic diagram of coordinate transformation for performing coordinate transformation on the first feedforward current. Wherein id feedforward、iq feedforwardAnd iz feedforwardFeed-forward current values for the D, Q, and Z axes, respectively, and in some embodiments, id feedforward=iInvActiveA,iq feedforward=iInvActiveB,iz feedforward=iInvActiveC
Step 204, adopting id feedforward、iq feedforwardAnd iz feedforwardAnd (3) carrying out rectification control: using i on the D axis of the rotation coordinated feedforwardCarrying out bus voltage control to obtain a voltage value u of D-axis feedforwardd1Using i on the Q-axis of the rotation coordinateq feedforwardPerforming reactive current control to obtain a Q-axis feedforward voltage value uq1Using i on the Z axis of the rotation coordinatez feedforwardCarrying out bus difference control to obtain a Z-axis feedforward voltage value uz1
Step 205, for ud1、uq1And uz1DQZ/ABC coordinate transformation is carried out to obtain uAfeedforward、uB feedforwardAnd uCfeedforwardThen to uAfeedforward、uB feedforwardAnd uCfeedforwardModulating to generate pulse signals PWM1A/1B, PWM2A/2B andPWM3A/3B inputs the pulse signal into the rectifier to control the voltage of the bus capacitor.
Referring to fig. 4, fig. 4 is a schematic diagram of coordinate transformation for performing coordinate transformation on the first feedforward voltage. u. ofd1、uq1And uz1Voltage values, u, fed-forward for D-, Q-and Z-axes, respectivelyAfeedforward、uB feedforwardAnd uCfeedforwardRespectively are feedforward voltage values of the phase A, the phase B and the phase C.
Further, referring to fig. 5, fig. 5 adopts id feedforward、iq feedforwardAnd iz feedforwardAnd carrying out rectification control.
Before step 204, the method may further include: obtaining rectified input currents of the A phase, the B phase and the C phase: i.e. iRECA、iRECBAnd iRECCAnd to iRECA、iRECBAnd iRECCAnd (3) carrying out coordinate transformation to obtain rectified input currents of a D axis, a Q axis and a Z axis: i.e. id、iqAnd iz(ii) a Rectified input voltage for phases a, B and C: u. ofRECA、uRECBAnd uRECCAnd obtaining rectified input voltages of a D axis, a Q axis and a Z axis after ABC/DQZ coordinate transformation: v. ofd、vqAnd vz. Referring specifically to fig. 6 and 7, fig. 6 is a schematic diagram of coordinate transformation for ABC/DQZ coordinate transformation of the rectified input current, and fig. 7 is a schematic diagram of coordinate transformation for ABC/DQZ coordinate transformation of the rectified input voltage.
Referring to FIG. 5, and also to FIGS. 3, 4, 6 and 7, in particular, step 204, using id feedforward、iq feedforwardAnd iz feedforwardThe rectification control may specifically include:
step 204-1, on the D axis of the rotating coordinate, adopting id feedforwardCarrying out bus voltage control to obtain a voltage value u of D-axis feedforwardd1Specifically, the method may include:
will preset the bus voltage value vbus_refWith the current bus voltage value vbusPerforming subtraction operation to obtain a bus voltage difference, and performing proportion (P) adjustment on the bus voltage difference to obtain a first input current;
feeding forward the first input current and the current value i of the D axisd feedforwardSuperposing to obtain a first reference current idref
A first reference current idrefInput D-axis current loop such that idrefRectified input current i with D axisdPerforming subtraction operation to obtain a first output current, performing Proportional and Integral (PI) regulation on the first output current to obtain a first input voltage, and rectifying the first input voltage with a D-axis rectified input voltage vdSuperposing to obtain a voltage value u of D-axis feedforwardd1
It should be noted that, the bus voltage control is performed on the D axis of the rotation coordinate, so that when the voltage of the bus capacitor fluctuates, the voltage of the bus capacitor can be balanced, and the voltage of the bus capacitor is stable and close to the preset bus capacitor voltage.
Step 204-2, on the Q axis of the rotating coordinate, i is adoptedq feedforwardPerforming reactive current control to obtain voltage value wave u of Q-axis feedforwardq2Specifically, the method may include:
obtaining a reactive current icqAnd will icqCurrent value i fed forward with Q axisq feedforwardSuperposing to obtain a second reference current iqref
A second reference current iqrefInput Q-axis current loop, such that iqrefWith Q-axis rectified input current iqCarrying out subtraction operation to obtain a second output current, carrying out PI regulation on the second output current to obtain a second input voltage, and carrying out PI regulation on the second input voltage and Q-axis rectification input voltage vqSuperposing to obtain a voltage value u of Q-axis feedforwardq1
It should be noted that the reactive current control is performed on the Q-axis of the rotation coordinate, that is, the reactive current control is performed on the Q-axis of the rotation coordinateObtaining a reactive current icqAnd in addition, the influence of the rectifying filter capacitor C on the power factor of the power grid end can be compensated in control, so that the power factor is close to 1.
Step 204-3, on the Z axis of the rotating coordinate, adopting iz feedforwardCarrying out bus difference control to obtain a Z-axis feedforward voltage value uz2Specifically, the method may include:
obtaining the current positive and negative bus voltage difference delta v according to the positive bus voltage and the negative bus voltagep-nP adjustment is carried out on the voltage difference of the positive bus and the negative bus to obtain a second input current; specifically, Δ v is obtainedp-nThen, the current positive and negative bus voltage difference Δ v needs to be measuredp-nVoltage difference delta v between the preset positive bus and the preset negative busrefDo subtraction, but Δ vrefIs 0, so it can directly match Δ vp-nP regulation is performed.
Feeding forward the second input current with the current value i of the Z-axisz feedforwardSuperposing to obtain a third reference current izref
Applying a third reference current izrefInputting a Z-axis current loop such that izrefWith Z-axis rectified input current izCarrying out subtraction operation to obtain a third output current, carrying out PI regulation on the third output current to obtain a first input voltage, and carrying out PI regulation on the first input voltage and a Z-axis rectification input voltage vzSuperposing to obtain a Z-axis feedforward voltage value uz1
It should be noted that, the steady-state control of the bus bar difference is performed on the Z axis of the rotation coordinate, so that when the midpoint of the bus bar capacitor is connected to the neutral line N, for example, when the inverter has an instantaneous unbalanced load (for example, suddenly dropping an L or LR load in a short time), the positive and negative bus bars may be unbalanced for a long time or the single-side bus bar capacitor may be over-voltage failed, and when the positive and negative bus bars have a difference, the positive and negative bus bars may be balanced, so that the voltage values of the positive and negative bus bars are stable and close to equal, that is, the voltage difference Δ v betweenp-nIs 0.
It should be noted that steps 204-1, 204-2, and 204-3 are not time-sequenced.
In summary, the embodiment of the present invention employs id feedforward、iq feedforwardAnd iz feedforwardAfter rectification control is carried out, each phase (A phase, B phase and C phase) of rectification input can be guaranteed to be a unit power factor, when the condition that an inverter carries a single-phase load, such as A phase inversion carrying load, the phase current of the rectification input A phase is increased, and finally the N-line current generated by rectification and the N-line current generated by inversion are mutually offset, so that the current flowing into the midpoint of a capacitor under the single-phase load is very small, and the unilateral bus ripple is reduced.
When the N-line current feed-forward is performed, the method specifically includes the following steps:
steps 301-302 refer to steps 201-202, which are similar to each other and are not described herein.
Step 303, pair iInvActiveA、iInvActiveBAnd iInvActiveCPerforming ABC/DQZ coordinate transformation to obtain iz feedforward(ii) a Wherein, i zfeedforward = i InvActiveA + i InvActiveB + i InvActiveC 3 ;
referring specifically to fig. 8, fig. 8 is another schematic diagram of coordinate transformation for the first feedforward current. Wherein iInvActiveA、iInvActiveBAnd iInvActiveCIs the current value of A phase, B phase and C phase feed forward, iz feedforwardIs the current value of the Z-axis feed forward.
Step 304, adopting i on the Z axis of the rotation coordinatez feedforwardCarrying out bus difference control to obtain a Z-axis feedforward voltage value uz1
Step 305, for uz1DQZ/ABC coordinate transformation is carried out to obtain uCfeedforwardTo u, to uCfeedforwardThe modulation is carried out, pulse signals PWM1A/1B, PWM2A/2B and PWM3A/3B are generated, and the pulse signals are input into the rectifier to control the voltage of the bus capacitor.
Referring specifically to fig. 9, fig. 9 is another schematic diagram of coordinate transformation for the first feedforward current. Wherein u isz1Is the voltage value of the Z-axis feed forward, uCfeedforwardIs the voltage value of the C-phase feed forward.
Further, referring to FIG. 10, FIG. 10 is a schematic diagram of a method using iz feedforwardAnd carrying out rectification control.
Before step 304, at least: obtaining rectified input currents of the A phase, the B phase and the C phase: i.e. iRECA、iRECBAnd iRECCAnd carrying out coordinate transformation to obtain rectified input currents of a D axis, a Q axis and a Z axis: i.e. id、iqAnd iz(ii) a Rectified input voltage for phases a, B and C: u. ofRECA、uRECBAnd uRECCAnd obtaining rectified input voltages of a D axis, a Q axis and a Z axis after ABC/DQZ coordinate transformation: v. ofd、vqAnd vz. Referring specifically to fig. 6 and 7, fig. 6 is a schematic diagram of coordinate transformation for ABC/DQZ coordinate transformation of the rectified input current, and fig. 7 is a schematic diagram of coordinate transformation for ABC/DQZ coordinate transformation of the rectified input voltage.
Referring to FIG. 10, and in particular to FIGS. 6-9, in step 304, i is applied to the Z axis of the rotation coordinatez feedforwardCarrying out bus difference control to obtain a Z-axis feedforward voltage value uz1Specifically, the method may include:
obtaining the current positive and negative bus voltage difference delta v according to the positive bus voltage and the negative bus voltagep-nP adjustment is carried out on the voltage difference of the positive bus and the negative bus to obtain a second input current; specifically, Δ v is obtainedp-nThen, it is required toThe current positive and negative bus voltage difference Deltavp-nVoltage difference delta v between the preset positive bus and the preset negative busrefDo subtraction, but Δ vrefIs 0, so it can directly match Δ vp-nP regulation is performed.
Feeding forward the second input current with the current value i of the Z-axisz feedforwardSuperposing to obtain a third reference current izref
Applying a third reference current izrefInputting a Z-axis current loop such that izrefWith Z-axis rectified input current izCarrying out subtraction operation to obtain a third output current, carrying out PI regulation on the third output current to obtain a first input voltage, and carrying out PI regulation on the first input voltage and a Z-axis rectification input voltage vzSuperposing to obtain a Z-axis feedforward voltage value uz1
In summary, the embodiment of the present invention employs iz feedforwardAfter rectification control is carried out, when the inversion carries a single-phase load, such as A-phase inversion carrying, the currents of the rectification input A phase, the B phase and the C phase are simultaneously increased, and finally the N-line current generated by rectification and the N-line current generated by inversion are mutually offset, so that the current flowing into the capacitance midpoint under the single-phase load is very small, and single-side bus ripple is reduced.
It should be noted that, the specific implementation of the embodiments can refer to the above embodiments, and the detailed description is omitted here.
In order to better implement the method for controlling the bus ripple provided by the embodiment of the present invention, an embodiment of the present invention further provides an apparatus based on the method for controlling the bus ripple. The terms are the same as those in the above method for controlling the bus ripple, and the details of the implementation can be referred to the description in the method embodiment.
In order to better implement the above solution, the present embodiment provides an apparatus 400 for controlling bus ripple, and in particular, refer to fig. 11.
An apparatus 400 for controlling bus ripple may specifically include: a detection unit 401, a data processing unit 402, a first coordinate transformation unit 403, a rectification loop control unit 404, a second coordinate transformation unit 405, and a modulation wave-transmitting unit 406.
A detection unit 401, configured to obtain a rectified input voltage, an inverted output voltage, and an inverted output current;
the data processing unit 402 is configured to obtain a first feed-forward current according to the rectified input voltage, the inverted output voltage, and the inverted output current obtained by the detection unit 401;
a first coordinate transformation unit 403, configured to perform coordinate transformation on the first feedforward current to obtain a second feedforward current;
a rectification loop control unit 404, configured to perform rectification control using the second feedforward current to obtain a first feedforward voltage;
a second coordinate transformation unit 405, configured to perform coordinate transformation on the first feedforward voltage to obtain a second feedforward voltage;
and a modulation wave generating unit 406, configured to modulate the second feed-forward voltage, generate a pulse signal, and input the pulse signal into the rectifier to control the voltage of the bus capacitor.
The second feed forward voltage comprises: feedforward voltage values of the A phase, the B phase and the C phase; correspondingly, the Modulation wave-sending unit 406 is configured to perform Pulse Modulation on the voltage values fed forward by the a phase, the B phase, and the C phase to obtain a Pulse Width Modulation (PWM) Pulse signal, and input the PWM Pulse signal to the rectifier to control the voltage of the bus capacitor. The generated PWM pulse signal is sent to the rectifier, and the midpoint voltage of a bridge arm of the rectifier can be controlled, so that the amplitude and the phase of the current of the inductor L between the power grid side and the rectifier are controlled, the input power factor of the rectifier is ensured to be 1, and the sum of the bus voltage and the bus voltage difference are ensured.
Further, the detecting unit 401 in the embodiment of the present invention is further configured to obtain a rectified input current, where the rectified input current includes: rectified input currents of the A phase, the B phase and the C phase.
The first feedforward current comprises instantaneous current values of A-phase feedforward, B-phase feedforward and C-phase feedforward. The data processing unit 402 is specifically configured to perform the following data processing:
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveA</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVA</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Aactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECA</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>A</mi> <mi>INV</mi> </msub> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveB</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVB</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Bactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECB</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>B</mi> <mi>INV</mi> </msub> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveC</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVC</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Cactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECC</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>C</mi> <mi>INV</mi> </msub> </mrow> </math>
wherein iInvActiveA、iInvActiveBAnd iInvActiveCInstantaneous current values of phase A, phase B and phase C feedforward respectively;
uINVA、uINVBand uINVCThe inverter output voltages of the phase A, the phase B and the phase C are respectively;
uRECA、uRECBand uRECCRectified input voltages of phase A, phase B and phase C respectively;
iAactive、iBactiveand iCactiveThe inverter output currents of the phase A, the phase B and the phase C are respectively;
CosAINV、CosBINVand CosCINVThe cosine values of the phase angles of the A-phase, B-phase and C-phase inverse output voltages are respectively.
It should be understood that the bus ripple may be controlled by instantaneous power feed-forward and N-line current feed-forward, wherein the instantaneous power feed-forward is to arrange the bus voltage control module, the reactive current control module and the first bus difference control module on the D axis, the Q axis and the Z axis respectively, and to perform transformation on the D axis, the Q axis and the Z axis of the rotation coordinate, and all the transformation is not 0. And in N-line current feedforward, a second bus difference control module is arranged on the Z axis only, and only the Z axis of the rotating coordinate is converted.
When fed forward by instantaneous power, the first feed forward current comprises: instantaneous current values of A-phase, B-phase and C-phase feed-forward, the second feed-forward current comprising: current values for D, Q and Z axis feed forward, the first feed forward voltage comprising: d-axis, Q-axis and Z-axis feed forward voltage values.
Accordingly, the rectification loop control unit includes: the bus voltage control module is used for carrying out bus voltage control on a D axis by adopting a D axis feedforward current value in second feedforward current to obtain a D axis feedforward voltage value; the reactive current control module is used for performing reactive current control on the Q axis by adopting the current value of the Q axis feedforward in the second feedforward current to obtain the voltage value of the Q axis feedforward; and the first bus difference control module is used for carrying out bus difference control on the Z axis by adopting the current value of the Z axis feedforward in the second feedforward current to obtain the voltage value of the Z axis feedforward.
In some embodiments, the second feed forward current comprises D, Q, and Z feed forward current values: i.e. id feedforward、iq feedforwardAnd iz feedforwardWherein i isd feedforward=iInvActiveA,iq feedforward=iInvActiveB,iz feedforward=iInvActiveC
The embodiment of the invention can also comprise: the third coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain the rectified input current of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: the rectified input voltages of the A phase, the B phase and the C phase are input into the first bus voltage control module respectively through the rectified input currents of the D axis, the Q axis and the Z axis after coordinate transformation is carried out by the third coordinate transformation unit and the rectified input voltages of the D axis, the Q axis and the Z axis. The embodiment of the invention can also comprise: the fourth coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain the rectified input current of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: and the rectified input voltages of the A phase, the B phase and the C phase are input into the reactive current control module respectively through the rectified input currents of the D axis, the Q axis and the Z axis after coordinate transformation is carried out by the fourth coordinate transformation unit and the rectified input voltages of the D axis, the Q axis and the Z axis. The embodiment of the invention can also comprise: the fifth coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain the rectified input current of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: rectified input voltages of the A phase, the B phase and the C phase are input into the first bus bar difference control module respectively, and rectified input currents of the D axis, the Q axis and the Z axis after coordinate transformation is carried out by the fifth coordinate transformation unit and the rectified input voltages of the D axis, the Q axis and the Z axis are input into the first bus bar difference control module respectively.
It should be noted that the third coordinate transformation unit, the fourth coordinate transformation unit, and the fifth coordinate transformation unit all perform coordinate transformation on the rectified input current and the rectified input voltage, and the "third", "fourth", and "fifth" are used to distinguish similar objects, and the three coordinate transformation units may be the same coordinate transformation unit.
Particularly, the bus voltage control module is used for adopting i on a D axis of a rotating coordinated feedforwardCarrying out bus voltage control to obtain a voltage value u of D-axis feedforwardd1Specifically, the method may include: will preset the bus voltage value vbus_refWith the current bus voltage value vbusPerforming subtraction operation to obtain a bus voltage difference, and performing proportion (P) on the bus voltage difference to obtain a first input current; feeding forward the first input current and the current value i of the D axisd feedforwardSuperposing to obtain a first reference current idref(ii) a A first reference current idrefInput D-axis current loop such that idrefRectified input current i with D axisdPerforming subtraction operation to obtain a first output current, performing Proportional and Integral (PI) regulation on the first output current to obtain a first input voltage, and rectifying the first input voltage with a D-axis rectified input voltage vdSuperposing to obtain a voltage value u of D-axis feedforwardd1
A reactive current control module for adopting i on the Q axis of the rotation coordinateq feedforwardPerforming reactive current control to obtain Q-axis feedforward voltage value waveuq2Specifically, the method may include: obtaining a reactive current icqAnd will icqCurrent value i fed forward with Q axisq feedforwardSuperposing to obtain a second reference current iqref(ii) a A second reference current iqrefInput Q-axis current loop, such that iqrefWith Q-axis rectified input current iqCarrying out subtraction operation to obtain a second output current, carrying out PI regulation on the second output current to obtain a second input voltage, and carrying out PI regulation on the second input voltage and Q-axis rectification input voltage vqSuperposing to obtain a voltage value u of Q-axis feedforwardq1
A first bus difference control module for adopting i on the Z axis of the rotation coordinatez feedforwardCarrying out bus difference control to obtain a Z-axis feedforward voltage value uz2Specifically, the method may include: obtaining the current positive and negative bus voltage difference delta v according to the positive bus voltage and the negative bus voltagep-nP adjustment is carried out on the voltage difference of the positive bus and the negative bus to obtain a second input current; specifically, Δ v is obtainedp-nThen, the current positive and negative bus voltage difference Δ v needs to be measuredp-nVoltage difference delta v between the preset positive bus and the preset negative busrefDo subtraction, but Δ vrefIs 0, so it can directly match Δ vp-nP regulation is performed. Feeding forward the second input current with the current value i of the Z-axisz feedforwardSuperposing to obtain a third reference current izref(ii) a Applying a third reference current izrefInputting a Z-axis current loop such that izrefWith Z-axis rectified input current izCarrying out subtraction operation to obtain a third output current, carrying out PI regulation on the third output current to obtain a first input voltage, and carrying out PI regulation on the first input voltage and a Z-axis rectification input voltage vzSuperposing to obtain a Z-axis feedforward voltage value uz1
When feeding forward through the N-line current, the first feed forward current comprises instantaneous current values of A-phase, B-phase and C-phase feed forward, and the second feed forward current comprises: a Z-axis feed forward current value, the first feed forward voltage comprising: the voltage value of the Z-axis feed forward.
Accordingly, the rectification loop control unit includes: and the second bus difference control module is specifically used for carrying out bus difference control on the Z axis by adopting the Z axis feedforward current value in the second feedforward current to obtain the Z axis feedforward voltage value.
In some embodiments, the second feed forward current comprises a Z-axis feed forward current value: i.e. iz feedforwardWherein i zfeedforward = i InvActiveA + i InvActiveB + i InvActiveC 3 .
the embodiment of the invention can also comprise: the sixth coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain the rectified input current of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phase a, phase B and phase C, the rectified input voltage comprising: and the rectified input voltages of the A phase, the B phase and the C phase are input into the second bus voltage control module respectively through the rectified input currents of the D axis, the Q axis and the Z axis after coordinate transformation is carried out by the third coordinate transformation unit and the rectified input voltages of the D axis, the Q axis and the Z axis.
The sixth coordinate transformation unit, the third coordinate transformation unit, the fourth coordinate transformation unit and the fifth coordinate transformation unit are all used for carrying out coordinate transformation on the rectified input current and the rectified input voltage, and the fourth coordinate transformation unit and the third coordinate transformation unit, the fourth coordinate transformation unit and the fifth coordinate transformation unit can be the same coordinate transformation unit.
Specifically, the second bus difference control module is used for adopting i on the Z axis of the rotating coordinatez feedforwardCarrying out bus difference control to obtain a Z-axis feedforward voltage value uz1Concretely, it can be wrappedComprises the following steps: obtaining the current positive and negative bus voltage difference delta v according to the positive bus voltage and the negative bus voltagep-nP adjustment is carried out on the voltage difference of the positive bus and the negative bus to obtain a second input current; specifically, Δ v is obtainedp-nThen, the current positive and negative bus voltage difference Δ v needs to be measuredp-nVoltage difference delta v between the preset positive bus and the preset negative busrefDo subtraction, but Δ vrefIs 0, so it can directly match Δ vp-nP regulation is performed. Feeding forward the second input current with the current value i of the Z-axisz feedforwardSuperposing to obtain a third reference current izref(ii) a Applying a third reference current izrefInputting a Z-axis current loop such that izrefWith Z-axis rectified input current izCarrying out subtraction operation to obtain a third output current, carrying out PI regulation on the third output current to obtain a first input voltage, and carrying out PI regulation on the first input voltage and a Z-axis rectification input voltage vzSuperposing to obtain a Z-axis feedforward voltage value uz1
In addition, the rectification loop control unit further includes: a proportional P regulator, and a proportional and integral PI regulator; the P regulator is used for regulating the bus voltage difference to obtain a first input current, and regulating the positive and negative bus voltage difference to obtain a second input current; the PI regulator is used for regulating the first output current to obtain a first input voltage; adjusting the second output current to obtain a second input voltage; and adjusting the third output current to obtain a third input voltage.
As can be seen from the above, in the embodiment of the present invention, the first feedforward current may be obtained according to the rectified input voltage, the inverted output voltage, and the inverted output current, then the coordinate transformation is performed on the first feedforward current to obtain the second feedforward current, then the second feedforward current is adopted to perform the rectification control to obtain the first feedforward voltage, and the coordinate transformation is performed on the first feedforward voltage to obtain the second feedforward voltage; and finally, modulating the second feedforward voltage to generate a pulse signal, and inputting the pulse signal into the rectifier. According to the embodiment of the invention, the power consumed by the power units such as the inverter and the like is directly fed forward to the rectifier, so that the N-line currents of the rectifier and the inverter are basically the same, namely the current flowing from the midpoint of the bus capacitor to the N line of the inverter is the minimum, the bus ripple is effectively reduced, and the control efficiency of the bus ripple is improved.
In addition, the present invention further provides a System for controlling bus ripples, where the System for controlling bus ripples may specifically be an Uninterruptible Power Supply (UPS) System, and the embodiments of the present invention are described in detail by taking the application to the UPS as an example, and do not form limitations on the present invention.
Referring to fig. 12, fig. 12 is a schematic structural diagram of a system for controlling bus ripple according to an embodiment of the present invention. The system for controlling the bus ripple specifically comprises: rectifier 500, inverter 600 and means for controlling bus ripple 400. The rectifier 500 supplies a stable dc voltage to power units such as the inverter 600, and the inverter 600 converts the dc voltage into an ac voltage and outputs the ac voltage to a load.
The bus ripple controlling device 400 is connected between the rectifier 500 and the inverter 600, and is used for obtaining a rectified input voltage, an inverted output voltage and an inverted output current; obtaining a first feedforward current according to the obtained rectified input voltage, the obtained inverted output voltage and the obtained inverted output current; performing coordinate transformation on the first feedforward current to obtain a second feedforward current; performing rectification control by adopting a second feedforward current to obtain a first feedforward voltage; performing coordinate transformation on the first feedforward voltage to obtain a second feedforward voltage; and modulating the second feedforward voltage to generate a pulse signal, and inputting the pulse signal into the rectifier to control the voltage of the bus capacitor.
It should be noted that, for the specific implementation of the apparatus 400 for controlling bus ripple, reference may be made to the above embodiments, and details are not described herein.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
It will be understood by those skilled in the art that all or part of the steps in the method for implementing the above embodiments may be implemented by hardware that is instructed to implement by a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
The method, the device and the system for controlling the bus ripple provided by the invention are described in detail above, and a specific example is applied in the description to explain the principle and the implementation of the invention, and the description of the above embodiment is only used to help understanding the method and the core idea of the invention; meanwhile, for those skilled in the art, according to the idea of the embodiment of the present invention, the specific implementation manner and the application range may be changed, and in summary, the content of the present specification should not be construed as limiting the present invention.

Claims (20)

1. A method of controlling bus ripple, comprising:
acquiring a rectification input voltage, an inversion output voltage and an inversion output current;
obtaining a first feed-forward current according to the obtained rectified input voltage, the obtained inverted output voltage and the obtained inverted output current;
performing coordinate transformation on the first feedforward current to obtain a second feedforward current;
performing rectification control by using the second feedforward current to obtain a first feedforward voltage;
performing coordinate transformation on the first feedforward voltage to obtain a second feedforward voltage;
and modulating the second feedforward voltage to generate a pulse signal, and inputting the pulse signal into the rectifier to control the voltage of the bus capacitor.
2. The method of claim 1, wherein the second feed forward current comprises: current values for D-axis, Q-axis, and Z-axis feed forward, the first feed forward voltage comprising: voltage values fed forward by a D axis, a Q axis and a Z axis;
the obtaining of the first feedforward voltage by performing rectification control on the second feedforward current specifically includes:
carrying out bus voltage control on the D axis by adopting the D axis feedforward current value in the second feedforward current to obtain a D axis feedforward voltage value;
performing reactive current control on the Q axis by adopting a Q axis feedforward current value in the second feedforward current to obtain a Q axis feedforward voltage value;
and carrying out bus difference control on the Z axis by adopting the current value of the Z axis feedforward in the second feedforward current to obtain the voltage value of the Z axis feedforward.
3. The method of claim 1, wherein the second feed forward current comprises: a Z-axis feed-forward current value, the first feed-forward voltage comprising: a Z-axis feed-forward voltage value;
the obtaining of the first feedforward voltage by performing rectification control on the second feedforward current specifically includes:
and carrying out bus difference control on the Z axis by adopting the current value of the Z axis feedforward in the second feedforward current to obtain the voltage value of the Z axis feedforward.
4. The method of claim 2, wherein the rectifying the input voltage comprises: rectified input voltages of phase A, phase B and phase C;
before the D-axis is subjected to bus voltage control by using the current value of the D-axis feedforward in the second feedforward current, and the voltage value of the D-axis feedforward is obtained, the method further includes:
performing coordinate transformation on the rectified input voltages of the A phase, the B phase and the C phase to obtain rectified input voltages of a D axis, a Q axis and a Z axis;
obtaining a rectified input current, the rectified input current comprising: rectified input currents of the A phase, the B phase and the C phase;
performing coordinate transformation on the rectified input currents of the A phase, the B phase and the C phase to obtain rectified input currents of a D axis, a Q axis and a Z axis;
the bus voltage control is carried out on the D axis by adopting the current value of the D axis feedforward in the second feedforward current to obtain the voltage value of the D axis feedforward, and the method specifically comprises the following steps:
subtracting a preset bus voltage value and a current bus voltage value to obtain a bus voltage difference, and adjusting the bus voltage difference to obtain a first input current;
superposing the first input current and the current value of the D-axis feedforward to obtain a first reference current;
inputting the first reference current into a D-axis current loop, so that the first reference current and the D-axis rectified input current are subjected to subtraction operation to obtain a first output current, and adjusting the first output current to obtain a first input voltage;
and superposing the first input voltage and the D-axis rectified input voltage to obtain a D-axis feedforward voltage value.
5. The method of claim 2 or 4, wherein the rectifying the input voltage comprises: rectified input voltages of phase A, phase B and phase C;
before the reactive current control is performed on the Q axis by using the Q axis feedforward current value in the second feedforward current to obtain the Q axis feedforward voltage value, the method further includes:
performing coordinate transformation on the rectified input voltages of the A phase, the B phase and the C phase to obtain rectified input voltages of a D axis, a Q axis and a Z axis;
obtaining a rectified input current, the rectified input current comprising: rectified input currents of the A phase, the B phase and the C phase;
performing coordinate transformation on the rectified input currents of the A phase, the B phase and the C phase to obtain rectified input currents of a D axis, a Q axis and a Z axis;
the method for controlling the reactive current on the Q axis by adopting the current value of the Q axis feedforward in the second feedforward current to obtain the voltage value of the Q axis feedforward specifically comprises the following steps:
obtaining reactive current, and superposing the reactive current and the current value of the Q-axis feedforward to obtain second reference current;
inputting the second reference current into a Q-axis current loop, so that the second reference current and the Q-axis rectified input current are subjected to subtraction operation to obtain a second output current, and adjusting the second output current to obtain a second input voltage;
and superposing the second input voltage and the Q-axis rectification input voltage to obtain a Q-axis feedforward voltage value.
6. The method of any of claims 2 to 5, wherein rectifying the input voltage comprises: rectified input voltages of phase A, phase B and phase C;
before the bus difference control is performed on the Z axis by adopting the current value of the Z axis feedforward in the second feedforward current to obtain the voltage value of the Z axis feedforward, the method further includes:
performing coordinate transformation on the rectified input voltages of the A phase, the B phase and the C phase to obtain rectified input voltages of a D axis, a Q axis and a Z axis;
obtaining a rectified input current, the rectified input current comprising: rectified input currents of the A phase, the B phase and the C phase;
performing coordinate transformation on the rectified input currents of the A phase, the B phase and the C phase to obtain rectified input currents of a D axis, a Q axis and a Z axis;
the bus difference control is carried out on the Z axis by adopting the current value of the Z axis feedforward in the second feedforward current to obtain the voltage value of the Z axis feedforward, and the method specifically comprises the following steps:
acquiring a positive bus voltage difference and a negative bus voltage difference according to the positive bus voltage and the negative bus voltage, and adjusting the positive bus voltage difference and the negative bus voltage difference to obtain a second input current;
superposing the second input current and the current value of the Z-axis feedforward to obtain a third reference current;
inputting the third reference current into a Z-axis current loop, so that the third reference current and the Z-axis rectified input current are subjected to subtraction operation to obtain a third output current, and adjusting the third output current to obtain a third input voltage;
and superposing the third input voltage and the Z-axis rectified input voltage to obtain a Z-axis feedforward voltage value.
7. The method of any of claims 1-6, wherein the first feed forward current comprises instantaneous current values for a-phase, B-phase, and C-phase feed forward; the obtaining of the first feedforward current according to the obtained rectified input voltage, the obtained inverted output voltage and the obtained inverted output current specifically includes:
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveA</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVA</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Aactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECA</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>A</mi> <mi>INV</mi> </msub> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveB</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVB</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Bactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECB</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>B</mi> <mi>INV</mi> </msub> <mo>;</mo> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveC</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVC</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Cactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECC</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>C</mi> <mi>INV</mi> </msub> </mrow> </math>
wherein iInvActiveA、iInvActiveBAnd iInvActiveCInstantaneous current values of phase A, phase B and phase C feedforward respectively;
uINVA、uINVBand uINVCThe inverter output voltages of the phase A, the phase B and the phase C are respectively;
uRECA、uRECBand uRECCRectified input voltages of phase A, phase B and phase C respectively;
iAactive、iBactiveand iCactiveThe inverter output currents of the phase A, the phase B and the phase C are respectively;
CosAINV、CosBINVand CosCINVThe cosine values of the phase angles of the A-phase, B-phase and C-phase inverse output voltages are respectively.
8. The method of claim 7, further comprising:
when the second feedforward current comprises current values of D-axis feedforward, Q-axis feedforward and Z-axis feedforward and the first feedforward voltage comprises voltage values of D-axis feedforward, Q-axis feedforward and Z-axis feedforward, the current value i of the D-axis feedforwardd feedforward=iInvActiveACurrent value i of said Q-axis feedforwardq feedforward=iInvActiveBCurrent value i of said Z-axis feedforwardz feedforward=iInvActiveC
9. The method of claim 7, further comprising:
when the second feedforward current comprises a current value of Z-axis feedforward and the first feedforward voltage comprises a voltage value of Z-axis feedforward, the current value i of the Z-axis feedforwardz feedforwardComprises the following steps:
i zfeedforward = i InvActiveA + i InvActiveB + i InvActiveC 3 .
10. an apparatus for controlling bus ripple, comprising:
the detection unit is used for acquiring a rectification input voltage, an inversion output voltage and an inversion output current;
the data processing unit is used for obtaining a first feedforward current according to the rectified input voltage, the inversion output voltage and the inversion output current obtained by the detection unit;
the first coordinate transformation unit is used for carrying out coordinate transformation on the first feedforward current to obtain a second feedforward current;
the rectification loop control unit is used for carrying out rectification control by adopting the second feedforward current to obtain a first feedforward voltage;
the second coordinate transformation unit is used for carrying out coordinate transformation on the first feedforward voltage to obtain a second feedforward voltage;
and the modulation wave-sending unit is used for modulating the second feedforward voltage to generate a pulse signal, and the pulse signal is input into the rectifier to control the voltage of the bus capacitor.
11. The apparatus of claim 10, wherein the second feed forward current comprises: current values for D-axis, Q-axis, and Z-axis feed forward, the first feed forward voltage comprising: voltage values fed forward by a D axis, a Q axis and a Z axis;
the rectification loop control unit includes: the system comprises a bus voltage control module, a reactive current control module and a first bus difference control module;
the bus voltage control module is used for carrying out bus voltage control on a D axis by adopting a D axis feedforward current value in second feedforward current to obtain a D axis feedforward voltage value; the reactive current control module is used for performing reactive current control on the Q axis by adopting a Q axis feedforward current value in the second feedforward current to obtain a Q axis feedforward voltage value; and the first bus difference control module is used for carrying out bus difference control on the Z axis by adopting the current value of the Z axis feedforward in the second feedforward current to obtain the voltage value of the Z axis feedforward.
12. The apparatus of claim 10, wherein the second feed forward current comprises: a Z-axis feed-forward current value, the first feed-forward voltage comprising: a Z-axis feed-forward voltage value;
the rectification loop control unit includes: a second bus bar difference control module;
and the second bus difference control module is used for carrying out bus difference control on the Z axis by adopting the current value of Z axis feedforward in the second feedforward current to obtain the voltage value of Z axis feedforward.
13. The apparatus of claim 11,
the detection unit is also used for acquiring a rectified input current;
the device further comprises: the third coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain rectified input currents of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phases A, B and C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
the bus voltage control module is used for subtracting a preset bus voltage value from a current bus voltage value to obtain a bus voltage difference, and regulating the bus voltage difference to obtain a first input current; superposing the first input current and the current value of the D-axis feedforward to obtain a first reference current; inputting the first reference current into a D-axis current loop, so that the first reference current and the D-axis rectified input current are subjected to subtraction operation to obtain a first output current, and adjusting the first output current to obtain a first input voltage; and superposing the first input voltage and the D-axis rectified input voltage to obtain a D-axis feedforward voltage value.
14. The apparatus of claim 11 or 13,
the detection unit is also used for acquiring a rectified input current;
the device further comprises: the fourth coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain rectified input currents of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phases A, B and C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
the reactive current control module is used for acquiring reactive current and superposing the reactive current and the current value of the Q-axis feedforward to obtain second reference current; inputting the second reference current into a Q-axis current loop, so that the second reference current and the Q-axis rectified input current are subjected to subtraction operation to obtain a second output current, and adjusting the second output current to obtain a second input voltage; and superposing the second input voltage and the Q-axis rectification input voltage to obtain a Q-axis feedforward voltage value.
15. The apparatus of any one of claims 11, 13 or 14,
the detection unit is also used for acquiring a rectified input current;
the device further comprises: the fifth coordinate transformation unit is used for carrying out coordinate transformation on the rectified input current to obtain rectified input currents of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phases A, B and C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
the first bus bar difference control module is used for acquiring a positive bus bar voltage difference and a negative bus bar voltage difference according to the positive bus bar voltage and the negative bus bar voltage, and regulating the positive bus bar voltage difference and the negative bus bar voltage difference to obtain a second input current; superposing the second input current and the current value of the Z-axis feedforward to obtain a third reference current; inputting the third reference current into a Z-axis current loop, so that the third reference current and the Z-axis rectified input current are subjected to subtraction operation to obtain a third output current, and adjusting the third output current to obtain a third input voltage; and superposing the third input voltage and the Z-axis rectified input voltage to obtain a Z-axis feedforward voltage value.
16. The apparatus of claim 12,
the detection unit is also used for acquiring a rectified input current;
the device further comprises: a sixth coordinate transformation unit, which performs coordinate transformation on the rectified input current to obtain rectified input currents of a D axis, a Q axis and a Z axis; and carrying out coordinate transformation on the rectified input voltage to obtain rectified input voltages of a D axis, a Q axis and a Z axis, wherein the rectified input current comprises: rectified input currents of phases A, B and C, the rectified input voltage comprising: rectified input voltages of phase A, phase B and phase C;
the second bus difference control module is used for acquiring a positive bus voltage difference and a negative bus voltage difference according to the positive bus voltage and the negative bus voltage, and regulating the positive bus voltage difference and the negative bus voltage difference to obtain a second input current; superposing the second input current and the current value of the Z-axis feedforward to obtain a third reference current; inputting the third reference current into a Z-axis current loop, so that the third reference current and the Z-axis rectified input current are subjected to subtraction operation to obtain a third output current, and adjusting the third output current to obtain a third input voltage; and superposing the third input voltage and the Z-axis rectified input voltage to obtain a Z-axis feedforward voltage value.
17. The apparatus according to any one of claims 10 to 16, wherein the first feedforward current comprises instantaneous current values of a-phase, B-phase and C-phase feedforward, wherein the data processing unit is specifically configured to perform the following data processing:
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveA</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVA</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Aactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECA</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>A</mi> <mi>INV</mi> </msub> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveB</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVB</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Bactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECB</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>B</mi> <mi>INV</mi> </msub> <mo>;</mo> </mrow> </math>
<math> <mrow> <msub> <mi>i</mi> <mi>InvActiveC</mi> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>u</mi> <mi>INVC</mi> </msub> <mo>&CenterDot;</mo> <msub> <mi>i</mi> <mi>Cactive</mi> </msub> </mrow> <msub> <mi>u</mi> <mi>RECC</mi> </msub> </mfrac> <mo>&CenterDot;</mo> <mi>Cos</mi> <msub> <mi>C</mi> <mi>INV</mi> </msub> </mrow> </math>
wherein iInvActiveA、iInvActiveBAnd iInvActiveCInstantaneous current values of phase A, phase B and phase C feedforward respectively;
uINVA、uINVBand uINVCThe inverter output voltages of the phase A, the phase B and the phase C are respectively;
uRECA、uRECBand uRECCRectified input voltages of phase A, phase B and phase C respectively;
iAactive、iBactiveand iCactiveThe inverter output currents of the phase A, the phase B and the phase C are respectively;
CosAINV、CosBINVand CosCINVThe cosine values of the phase angles of the A-phase, B-phase and C-phase inverse output voltages are respectively.
18. The apparatus of claim 17,
when the second feed forward current comprises: current values of D-, Q-and Z-axis feedforward, the first feedforwardThe voltages include: d-axis, Q-axis and Z-axis feedforward voltage values, and current value i of D-axis feedforwardd feedforward=iInvActiveACurrent value i of said Q-axis feedforwardq feedforward=iInvActiveBCurrent value i of said Z-axis feedforwardz feedforward=iInvActiveC
19. The apparatus of claim 17, further comprising:
when the second feed forward current comprises: a Z-axis feed-forward current value, the first feed-forward voltage comprising: the current value i of Z-axis feedforwardz feedforwardComprises the following steps:
i zfeedforward = i InvActiveA + i InvActiveB + i InvActiveC 3 .
20. a system for controlling bus ripple, comprising:
rectifier, inverter and device for controlling a bus ripple according to any of claims 10 to 19.
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