CN105120417A - Monolithic integrated chip and manufacturing method thereof - Google Patents
Monolithic integrated chip and manufacturing method thereof Download PDFInfo
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- CN105120417A CN105120417A CN201510612346.1A CN201510612346A CN105120417A CN 105120417 A CN105120417 A CN 105120417A CN 201510612346 A CN201510612346 A CN 201510612346A CN 105120417 A CN105120417 A CN 105120417A
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Abstract
The present invention provides a monolithic integrated chip and a manufacturing method thereof. The monolithic integrated chip includes a silicon chip, an integrated circuit arranged in a first region of the silicon chip, and a capacitance type micro-silicon microphone, wherein, the capacitance type micro-silicon microphone is arranged in a second region and electrically is connected with the integrated circuit. The silicon chip includes a silicon device layer and a silicon substrate, and the silicon device layer is a first pole plate. The monolithic integrated chip also includes a second pole plate and a cavity, wherein, the second pole plate is arranged in the second region and locates above the first pole plate, and the cavity locates between the first pole plate and the second pole plate. The first pole plate is provided with a plurality of sound apertures which run through up and down and connect the cavity. The second pole plate is provided with a movable cantilever beam type structure and suspends above the cavity, and the second pole plate is formed by adopting a low-temperature deposition process. According to the invention, the integrated circuit has a stable performance, and the capacitance type micro-silicon microphone has a high sensitivity.
Description
Technical field
The present invention relates to the integrated morphology of a kind of pressure sensor and integrated circuit, belong to the field such as microelectromechanical systems and pressure sensor.
Background technology
Microphone is a kind of transducer voice signal being converted into the signal of telecommunication.The basic structure of Electret Condencer Microphone comprises as the sensitive membrane of electric capacity one pole and the back pole plate as the other pole of electric capacity, when voice signal acts on microphone, acoustic pressure causes sensitive membrane to produce deformation, and then causing the electric capacity between sensitive membrane and back pole plate to change, this capacitance variations can be converted into the signal of telecommunication by subsequent process circuit.
From Bell laboratory scientist since 1962 invention electret capacitor microphone (ECM), through the development of decades, ECM is widely used in every field.But the resident electric charge of traditional E CM at high temperature in its sensitive membrane can leak, and then causes ECM to lose efficacy.And in the technique of assembling consumer electronics product, device automation surface mount process often need experience the welding temperature up to 260 DEG C, so ECM is when being fitted to circuit board, manpower hand assembled can only be relied at present, along with the development in the consumer electronics product markets such as mobile phone, PDA, MP3 player and digital camera, lose the upper hand in the consumer electronics product field that ECM produces in enormous quantities at these just gradually.
Micro-electromechanical system (MEMS) (Micro-Electro-MechanicalSystem) is a new technology of high speed development in recent years, and it adopts sophisticated semiconductor manufacturing process, can realize the batch micro operations of MEMS.Compared with corresponding traditional devices, MEMS is in high temperature resistant, volume, power consumption, weight and have fairly obvious advantage in price.And utilize the micro silicon microphone of MEMS technology manufacture owing to having the capability of doing sth by the advantage of high temperature in surface mount, become just rapidly the substitute of ECM product, there was suitable high growth in micro silicon microphone market in recent years.
The micro-silicon microphone utilizing MEMS technology to process and traditional E CM important difference are that bias voltage applies mode.ECM is biased it by the resident electric charge be stored in microphone sensitive diaphragm, and micro-silicon microphone directly provides bias voltage to microphone by external power, resident electric charge need not be stored in sensitive membrane, so the danger that not resident electric charge at high temperature runs off, therefore micro-silicon microphone can bear the high temperature of required experience in automation surface mount process, thus automation surface mount process can be adopted, but not adopt the manual installation of manpower.
At present, MEMS and integrated circuit (IC) generally adopt multi-disc integration mode integrated, namely adopted the making of different technological processes independently completing circuit and MEMS on different chips by different vendor, and then both hybrid package are integrated into a functional unit.The benefit of this method is that manufacturing process difficulty is little, and the design and manufacture of MEMS can single optimization.This kind of method has application in multiple MEMS is integrated, such as piezoresistive type sensors etc.
But for some application, as the transducer of the types such as the piezoelectricity of high output impedance and electric capacity, MEMS and IC carry out single-chip integration then advantageously, can effectively improve overall device performance and reduce the impact of interference noise.Namely capacitance-type micro silicon microphone has the feature of high output impedance, cause its impact being subject to environmental interference noise and parasitic capacitance comparatively large, therefore micro-silicon microphone adopts single-chip integration mode can improve a lot in overall device performance, size, power consumption etc. relative to employing multi-disc integrated form.
Realize MEMS and the single chip integrated manufacture method of IC has three kinds: the first, first complete the making of MEMS, and then complete the making of IC on same substrate; The second, MEMS and IC single-step process in manufacturing process is mutually intersected and is carried out; I.e. " rear semiconductor technology " the third method, first adopts standard technology to make IC, and then on same substrate, completes the making of MEMS.
The shortcoming of the first and second method possible introduce pollution, causes IC to lose efficacy, and have and may cause equipment pollution further.The benefit of the third integrated approach is the pollution that first two integrated approach can be avoided to introduce, and also can make full use of the IC standard manufacturing process of existing maturation, need not revise IC manufacturing process, and this contributes to the investment improving rate of finished products and reduce equipment.The shortcoming of the third integrated approach is after IC completes, and for not affecting IC performance, can not have high-temperature technology in MEMS manufacture process thereafter, because after IC manufacturing process completes, the metal such as aluminium as metal electrode can not bear the high temperature of more than 400 DEG C.And the materials such as polysilicons that adopt as structural material more in existing MEMS technology, and the temperature preparing polysilicon is generally higher than 400 DEG C.
In view of the above problems, be necessary to provide a kind of new technical scheme to solve the problem.
Summary of the invention
The object of the present invention is to provide a kind of single chip integrated monolithic die of integrated circuit and capacitance-type micro silicon microphone without the need to experiencing high temperature and preparation method thereof.
For achieving the above object, the present invention adopts following technical scheme: a kind of manufacture method of monolithic die, it comprises the steps:
(a). provide a silicon chip, described silicon chip has silicon device layer and is positioned at the first surface in described silicon device layer, and described first surface is provided with the first area for generating integrated circuit and the second area for generating capacitance-type micro silicon microphone;
(b). on described first area, generate the described integrated circuit be electrically connected with described capacitance-type micro silicon microphone, described second area is formed the insulating barrier covering described first surface and the conductive layer be formed on described insulating barrier;
(c). in described second area, part is removed insulating barrier and is exposed described silicon device layer with part, then etch described silicon device layer to form back pole plate figure and run through some acoustic aperture of described silicon device layer, described silicon device layer is the first pole plate of described capacitance-type micro silicon microphone;
(d). adopt low temperature deposition process deposit sacrifice layer on described back pole plate, described acoustic aperture is filled by described sacrifice layer;
(e). on described sacrifice layer, then generate the second pole plate of described capacitance-type micro silicon microphone;
(f). the second pole plate forming beam type is etched to described second pole plate;
(g). described silicon chip also comprises the silicon substrate relative with described silicon device layer, described silicon substrate has the second surface opposing with described first surface, described silicon substrate upwards caves in into from described second surface the back of the body chamber running through described silicon substrate, and upwards remove described sacrifice layer to form cavity between described first pole plate and the second pole plate from back of the body chamber, and then making described second pole plate become movable structure, described cavity, described acoustic aperture and described back of the body chamber are interconnected.
As further improved technical scheme of the present invention, in step (d), described sacrifice layer adopts to generate lower than the low-pressure vapor phase depositing technics of 400 DEG C or plasma-enhanced vapor depositing technics, and the material of described sacrifice layer is amorphous carbon.
As further improved technical scheme of the present invention, in step (e), the material of described second pole plate is polycrystalline silicon germanium, and described second pole plate adopts the polycrystalline silicon germanium film generated lower than the low-pressure vapor phase depositing technics of 400 DEG C or plasma-enhanced vapor depositing technics.
As further improved technical scheme of the present invention, in the process that described second pole plate generates, adopt silane or germane or borine as reactant.
As further improved technical scheme of the present invention, described silicon chip also comprises the dielectric layer between described silicon device layer and described silicon substrate, and in step (a)., described acoustic aperture does not run through described dielectric layer.
As further improved technical scheme of the present invention, in step (g), described silicon substrate and described dielectric layer are run through in described back of the body chamber.
As further improved technical scheme of the present invention, the step that described back of the body chamber is formed is: first carry out photoetching at the second surface place of the described silicon substrate of second area, adopts anisotropic etchant wet etching or dry etching subsequently thus part removes described dielectric layer.
As further improved technical scheme of the present invention, the corrosive liquid adopted in described anisotropic etchant wet etching is potassium hydroxide or Tetramethylammonium hydroxide.
As further improved technical scheme of the present invention, described dry etching is deep trouth reactive ion etching.
As further improved technical scheme of the present invention, in step (g), described sacrifice layer is removed the anchor point of rear left part formation in order to support described second pole plate, and described second pole plate is sound sensitive film, and described anchor point is positioned at the edge of described sound sensitive film.
For achieving the above object, the present invention also adopts following a kind of technical scheme: a kind of monolithic die, comprise a silicon chip, be located at the integrated circuit in silicon chip first area and be located at the capacitance-type micro silicon microphone be electrically connected with integrated circuit in second area, described silicon chip comprises a silicon device layer and the silicon substrate under being positioned at silicon device layer, described silicon device layer is the first pole plate, described monolithic die also comprises to be located in second area and the second pole plate be positioned at above described first pole plate and be positioned at first, cavity between second pole plate, described first pole plate be provided with run through up and down and with some acoustic aperture of described cavity connects, described second pole plate is movable beam type structure, be suspended from the top of described cavity, described second pole plate is formed for adopting low temperature deposition process.
As further improved technical scheme of the present invention, described silicon chip also comprises the dielectric layer be located between described silicon substrate and described silicon device layer, described silicon substrate is provided with the bottom-up back of the body chamber running through described silicon substrate, and described back of the body chamber is equally upwards run through described dielectric layer and is communicated with described acoustic aperture.
As further improved technical scheme of the present invention, in the second area of described monolithic die, described silicon device layer is also provided with the some anchor points supporting described second pole plate, described anchor point continuously or the edge being distributed in described second pole plate be interrupted.
Compared to prior art, the manufacture method of monolithic die of the present invention, the silicon chip being included in standard semi-conductor processes adopt low temperature process form the structure composition capacitance-type micro silicon microphone such as sound sensitive film 41, sacrifice layer 3, reach integrated to realize existing circuit on capacitance-type micro silicon microphone and silicon chip, so make the metal conducting layer in integrated circuit not need scorching through high temperature, thus make the stable performance of integrated circuit.Adopt cantilever beam structure to design the second pole plate in addition, make it have stronger sensitivity, so integrated circuit (IC)-components can be integrated formation with micro silicon microphone and there is highly sensitive monolithic die.
Accompanying drawing explanation
Fig. 1 is the cross-sectional view that the first step of monolithic die manufacture method of the present invention presents.
Fig. 2 is the cross-sectional view that the second step of monolithic die manufacture method of the present invention presents.
Fig. 3 is the cross-sectional view that the 3rd step of monolithic die manufacture method of the present invention presents.
Fig. 4 is the cross-sectional view that the 4th step of monolithic die manufacture method of the present invention presents.
Fig. 5 is the cross-sectional view that the 5th step of monolithic die manufacture method of the present invention presents.
Fig. 6 is the cross-sectional view that the 6th step of monolithic die manufacture method of the present invention presents.
Fig. 7 is the cross-sectional view that the 7th step of monolithic die manufacture method of the present invention presents.
Fig. 8 is the perspective view of monolithic die of the present invention.
Embodiment
The object of the present invention is to provide a kind of single chip integrated monolithic die of integrated circuit and capacitance-type micro silicon microphone without the need to experiencing high temperature and preparation method thereof, for the single-chip integration of realizing circuit device and MEMS.Shown in please refer to the drawing 1 to Fig. 7, below will with based on SOI(Silicon-On-Insulator, the silicon in dielectric substrate) integrated circuit (non-label) of substrate and capacitance-type micro silicon microphone (non-label) single-chip integration be example, be described in detail.
Shown in please refer to the drawing 1, first provide a SOI silicon chip 1, described SOI silicon chip 1 comprises a silicon substrate 13 in below, the silicon device layer 11 in top and the dielectric layer 12 between silicon substrate 13 and silicon device layer 11.The upper surface of described silicon device layer 11 is the first surface 111 of described SOI silicon chip 1, and the lower surface of described silicon substrate 13 is second surface 112.Described SOI silicon chip 1 is provided with the first area A for generating integrated circuit and the second area B for generating capacitance-type micro silicon microphone on first surface 111.Described dielectric layer 12 is insulating oxide silicon layer.Then on described first area A, generate the integrated circuit be electrically connected with capacitance-type micro silicon microphone according to standard semi-conductor processes flow process, described integrated circuit can be field-effect transistor, resistance capacitance etc.Only be described for MOS (metal-oxide-semiconductor) memory in the present embodiment.First area A generates field oxide 21, dielectric insulation layer 22, metal conducting layer 23 and passivation layer 24 etc.Simultaneously while generation integrated circuit, in described first area A, dielectric insulation layer 22, metal conducting layer 23 extend to described second area 22 further, namely described second area have and the dielectric insulation layer 22 together made when making integrated circuit and metal conducting layer 23.
Shown in please refer to the drawing 2, in described second area B, part removes dielectric insulation layer 22 and metal conducting layer 23 exposes the silicon device layer 11 of described SOI silicon chip 1 with part, then photoresist is adopted to make mask, adopt anisotropic rie technique in described silicon device layer 11, carry out etching and form back pole plate figure, until the dielectric layer 12 of described SOI silicon chip 1 stops, and obtain some some acoustic aperture 113 running through described silicon device layer 11.The described silicon device layer 11 having formed back pole plate figure and acoustic aperture 113 is the first pole plate of described capacitance-type micro silicon microphone.
Shown in please refer to the drawing 3, in present embodiment, above described silicon substrate 13, the low temperature deposition process deposit amorphous carbon lower than 400 DEG C is adopted to form sacrifice layer 3.Described sacrifice layer 3 also can in described acoustic aperture 113 growth inside while described silicon device layer 11 grown on top.In other embodiments, described sacrifice layer 3 also can utilize plasma enhanced chemical vapor deposition to form amorphous carbon layer as sacrifice layer 3, and the temperature of described plasma enhanced chemical vapor deposition is 350 DEG C ~ 450 DEG C.The kind of the MEMS formed according to actual needs carries out the thickness determining formed sacrifice layer 3.
Shown in please refer to the drawing 4, described sacrifice layer 3 adopts the low-pressure vapor phase depositing technics lower than 400 DEG C or plasma-enhanced vapor depositing technics, generate polycrystalline silicon germanium thin layer 4 described in polycrystalline silicon germanium (PolySi1-xGex) thin layer 4, except covering on described sacrifice layer 3, also to cover on dielectric insulation layer 22.Need to adopt silane, germane, borine etc. as reactant in above-mentioned technical process, regulate the flow of each reactant, pressure, ratio etc. to form required SiGe ratio as required simultaneously, the polycrystalline silicon germanium film of certain stress and corrosion-resistant requirement can be met like this.
Next, shown in please refer to the drawing 5, carry out photoetching and etching to described polycrystalline silicon germanium film 4, to form the second pole plate 41 of the microphone electric capacity of beam type, the second pole plate 41 is sound sensitive film 41 in the present embodiment.Meanwhile, also achieved the object carrying out with metal conducting layer 23 being electrically connected by described polycrystalline silicon germanium film 4, so make described capacitance-type micro silicon microphone and described integrated circuit realize both electrical connection.The shape of described sound sensitive film 4 can be circle, rectangle, polygon etc.In the present embodiment, described second pole plate 41 is beam type structure, and object is the susceptibility improving small size sound sensitive film 4, and easily discharges stress.
Shown in please refer to the drawing 6, at the lower surface of the described silicon substrate 13 of described silicon chip 1, namely second surface 112 carries out photoetching corresponding to second area B place, adopts the partial silicon substrate 13 below anisotropic etchant wet etching or dry etching removal dielectric layer 12 subsequently, forms back of the body chamber 131 thus.This back of the body chamber 131 has transmits the function such as sound, adjustment frequency response.In the present embodiment, described anisotropic etchant is potassium hydroxide (KOH) corrosive liquid or Tetramethylammonium hydroxide (TMAH) corrosive liquid.Described dry etching is deep trouth reactive ion etching.
Shown in please refer to the drawing 7, from described back of the body chamber 131 further upwards by dilution hydrofluoric acid solution or gas phase hydrofluoric acid erode dielectric layer 12, then the smooth amorphous carbon layer in acoustic aperture 113 cylindrical non-carbon crystalline substance and described silicon device layer 11 is eroded with dry method oxonium ion or hydrofluoric acid sulfuric acid solution, namely erode described sacrifice layer 3, thus make the second pole plate 41 become movable structure.And between described sound sensitive film 41 and described silicon device layer 11, define cavity 5.Part left after described sacrifice layer 3 is corroded, namely cover the part on dielectric insulation layer 22, form described anchor point 31, the edge that described anchor point 31 is positioned at described sound sensitive film 41 is used for supporting described sound sensitive film 41.Described anchor point 31 can be in whole edges of sound sensitive film 41 continuously, also can to disperse the edge being in described sound sensitive film 41 continuously or discontinuously.
So, through above-mentioned numerous step, then complete a monolithic die 100 with integrated circuit and capacitance-type micro silicon microphone.Described monolithic die 100 comprises a silicon chip 1, the capacitance-type micro silicon microphone be located at the integrated circuit in the A of silicon chip first area and be located in second area B, described silicon chip 1 comprises silicon device layer 11 and the silicon substrate below silicon device layer 11 13 and the dielectric layer 12 between described silicon device layer 11 and described silicon substrate 13, in described second area B, described monolithic die 100 also comprises beam type and is suspended from the second pole plate 41 above described silicon device layer 11, described first pole plate is silicon device layer 11, described second pole plate is sound sensitive film 41.Cavity 5 between described first pole plate, the second pole plate makes described sound sensitive film 41 susceptibility improve.Described silicon substrate 13 is provided with the back of the body chamber 131 running through described silicon substrate up and down, and described silicon device layer is also provided with the acoustic aperture 113 running through described silicon device layer 11 up and down, described acoustic aperture 113, back of the body chamber 131 and described cavity 5 up/down perforation.
In the present embodiment, described monolithic die 100 described integrated circuit comprise field oxide 21, source and drain doped region 25, grid conductive layer 26, dielectric insulation layer 22, metal conducting layer 23 and passivation layer 24.It should be noted that: in the process making integrated circuit, the dielectric insulation layer 22 at least on first area 21 and metal conducting layer 23 extend to described second area 22 further.Described first pole plate 11 and the second pole plate 41 form two pole plates of capacitance-type micro silicon microphone electric capacity.Described integrated circuit and described capacitance-type micro silicon microphone are electrically connected by metal conducting layer 23.
In sum, the manufacture method of monolithic die described in the present invention, by on SOI silicon substrate in conjunction with integrated circuit and the single chip integrated manufacture method of capacitance-type micro silicon microphone, the silicon chip being included in standard semi-conductor processes adopt low temperature process form the structure composition capacitance-type micro silicon microphone such as sound sensitive film 41, sacrifice layer 3, the integrated of circuit is had with on silicon chip to realize capacitance-type micro silicon microphone, so make the metal conducting layer in integrated circuit not need scorching through high temperature, thus make the stable performance of integrated circuit.Adopt cantilever beam structure design acoustic sensitive membrane 41 in addition, make it have stronger sensitivity, so integrated circuit (IC)-components can be integrated formation with micro silicon microphone and there is highly sensitive monolithic die 100.
In addition, above embodiment is only for illustration of the present invention and unrestricted technical scheme described in the invention, understanding of this description should based on person of ordinary skill in the field, although this specification reference the above embodiments are to present invention has been detailed description, but, those of ordinary skill in the art is to be understood that, person of ordinary skill in the field still can modify to the present invention or equivalent replacement, and all do not depart from technical scheme and the improvement thereof of the spirit and scope of the present invention, all should be encompassed in right of the present invention.
Claims (13)
1. a manufacture method for monolithic die, it comprises the steps:
(a). provide a silicon chip, described silicon chip has silicon device layer and is positioned at the first surface in described silicon device layer, and described first surface is provided with the first area for generating integrated circuit and the second area for generating capacitance-type micro silicon microphone;
(b). on described first area, generate the described integrated circuit be electrically connected with described capacitance-type micro silicon microphone, described second area is formed the insulating barrier covering described first surface and the conductive layer be formed on described insulating barrier;
(c). in described second area, part removes insulating barrier exposes described silicon device layer first surface with part, then etch described silicon device layer to form back pole plate figure and run through some acoustic aperture of described silicon device layer, described silicon device layer is the first pole plate of described capacitance-type micro silicon microphone;
(d). adopt low temperature deposition process deposit sacrifice layer on described back pole plate, described acoustic aperture is filled by described sacrifice layer;
(e). on described sacrifice layer, then generate the second pole plate of described capacitance-type micro silicon microphone;
(f). the second pole plate forming beam type is etched to described second pole plate;
(g). described silicon chip also comprises the silicon substrate relative with described silicon device layer, described silicon substrate has the second surface opposing with described first surface, described silicon substrate upwards caves in into from described second surface the back of the body chamber running through described silicon substrate, and upwards remove described sacrifice layer to form cavity between described first pole plate and the second pole plate from back of the body chamber, and then making described second pole plate become movable structure, described cavity, described acoustic aperture and described back of the body chamber are interconnected.
2. the manufacture method of monolithic die as claimed in claim 1, it is characterized in that: in step (d), described sacrifice layer adopts to generate lower than the low-pressure vapor phase depositing technics of 400 DEG C or plasma-enhanced vapor depositing technics, and the material of described sacrifice layer is amorphous carbon.
3. the manufacture method of monolithic die as claimed in claim 1, it is characterized in that: in step (e), the material of described second pole plate is polycrystalline silicon germanium, and described second pole plate adopts the polycrystalline silicon germanium film generated lower than the low-pressure vapor phase depositing technics of 400 DEG C or plasma-enhanced vapor depositing technics.
4. the manufacture method of monolithic die as claimed in claim 3, is characterized in that: adopt silane or germane or borine as reactant in the process that described second pole plate generates.
5. the manufacture method of monolithic die as claimed in claim 1, it is characterized in that: described silicon chip also comprises the dielectric layer between described silicon device layer and described silicon substrate, in step (a)., described acoustic aperture does not run through described dielectric layer.
6. the manufacture method of monolithic die as claimed in claim 5, it is characterized in that: in step (g), described silicon substrate and described dielectric layer are run through in described back of the body chamber.
7. the manufacture method of monolithic die as claimed in claim 6, it is characterized in that: the step that described back of the body chamber is formed is: first carry out photoetching at the second surface place of the described silicon substrate of second area, adopt anisotropic etchant wet etching or dry etching subsequently thus part removes described dielectric layer.
8. the manufacture method of monolithic die as claimed in claim 7, is characterized in that: the corrosive liquid adopted in described anisotropic etchant wet etching is potassium hydroxide or Tetramethylammonium hydroxide.
9. the manufacture method of monolithic die as claimed in claim 7, is characterized in that: described dry etching is deep trouth reactive ion etching.
10. the manufacture method of monolithic die as claimed in claim 1, it is characterized in that: in step (g), described sacrifice layer is removed the anchor point of rear left part formation in order to support described second pole plate, described second pole plate is sound sensitive film, and described anchor point is positioned at the edge of described sound sensitive film.
11. 1 kinds of monolithic die, comprise a silicon chip, be located at the integrated circuit in silicon chip first area and be located at the capacitance-type micro silicon microphone be electrically connected with integrated circuit in second area, described silicon chip comprises a silicon device layer and the silicon substrate under being positioned at silicon device layer, described silicon device layer is the first pole plate, it is characterized in that: described monolithic die also comprises to be located in second area and the second pole plate be positioned at above described first pole plate and be positioned at first, cavity between second pole plate, described first pole plate be provided with run through up and down and with some acoustic aperture of described cavity connects, described second pole plate is movable beam type structure, be suspended from the top of described cavity, described second pole plate is formed for adopting low temperature deposition process.
12. monolithic die as claimed in claim 11, it is characterized in that: described silicon chip also comprises the dielectric layer be located between described silicon substrate and described silicon device layer, described silicon substrate is provided with the bottom-up back of the body chamber running through described silicon substrate, and described back of the body chamber is equally upwards run through described dielectric layer and is communicated with described acoustic aperture.
13. monolithic die as claimed in claim 11, it is characterized in that: in the second area of described monolithic die, described silicon device layer is also provided with the some anchor points supporting described second pole plate, and described anchor point continuously or the edge being distributed in described second pole plate be interrupted.
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Application publication date: 20151202 |